From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Subject: [PATCH 24/92] ram: rk3399: Add cs1_col enc macro Date: Tue, 11 Jun 2019 20:20:27 +0530 Message-ID: <20190611145135.21399-25-jagan@amarulasolutions.com> References: <20190611145135.21399-1-jagan@amarulasolutions.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190611145135.21399-1-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Simon Glass , Philipp Tomsich , Kever Yang , YouMin Chen , u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Jagan Teki , gajjar04akash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org List-Id: linux-rockchip.vger.kernel.org Add dram config macro for handling cs1 column. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 3 +++ drivers/ram/rockchip/sdram_rk3399.c | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h index dc7275656e..637a0de902 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -74,6 +74,9 @@ (4 + 2 * (ch)); \ } while (0) +#define SYS_REG_CS1_COL_SHIFT(ch) (0 + 2 * (ch)) +#define SYS_REG_ENC_CS1_COL(n, ch) (((n) - 9) << SYS_REG_CS1_COL_SHIFT(ch)) + /* Get sdram size decode from reg */ size_t rockchip_sdram_size(phys_addr_t reg); diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 772fde9732..d77a8310cd 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1033,6 +1033,7 @@ static void dram_all_config(struct dram_info *dram, if (info->cs1_row) SYS_REG_ENC_CS1_ROW(info->cs1_row, sys_reg2, sys_reg3, channel); + sys_reg3 |= SYS_REG_ENC_CS1_COL(info->col, channel); ddr_msch_regs = dram->chan[channel].msch; noc_timing = &sdram_params->ch[channel].noc_timings; -- 2.18.0.321.gffc6fa0e3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Tue, 11 Jun 2019 20:20:27 +0530 Subject: [U-Boot] [PATCH 24/92] ram: rk3399: Add cs1_col enc macro In-Reply-To: <20190611145135.21399-1-jagan@amarulasolutions.com> References: <20190611145135.21399-1-jagan@amarulasolutions.com> Message-ID: <20190611145135.21399-25-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add dram config macro for handling cs1 column. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 3 +++ drivers/ram/rockchip/sdram_rk3399.c | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h index dc7275656e..637a0de902 100644 --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h @@ -74,6 +74,9 @@ (4 + 2 * (ch)); \ } while (0) +#define SYS_REG_CS1_COL_SHIFT(ch) (0 + 2 * (ch)) +#define SYS_REG_ENC_CS1_COL(n, ch) (((n) - 9) << SYS_REG_CS1_COL_SHIFT(ch)) + /* Get sdram size decode from reg */ size_t rockchip_sdram_size(phys_addr_t reg); diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 772fde9732..d77a8310cd 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -1033,6 +1033,7 @@ static void dram_all_config(struct dram_info *dram, if (info->cs1_row) SYS_REG_ENC_CS1_ROW(info->cs1_row, sys_reg2, sys_reg3, channel); + sys_reg3 |= SYS_REG_ENC_CS1_COL(info->col, channel); ddr_msch_regs = dram->chan[channel].msch; noc_timing = &sdram_params->ch[channel].noc_timings; -- 2.18.0.321.gffc6fa0e3