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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v5 2/3] drm/i915: whitelist PS_(DEPTH|INVOCATION)_COUNT
Date: Tue, 25 Jun 2019 21:22:56 +0300	[thread overview]
Message-ID: <20190625182257.22075-3-lionel.g.landwerlin@intel.com> (raw)
In-Reply-To: <20190625182257.22075-1-lionel.g.landwerlin@intel.com>

CFL:C0+ changed the status of those registers which are now
blacklisted by default.

This is breaking a number of CTS tests on GL & Vulkan :

  KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations (GL)

  dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.* (Vulkan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 993804d09517..da7d48ac4ee7 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1092,10 +1092,18 @@ static void glk_whitelist_build(struct intel_engine_cs *engine)
 
 static void cfl_whitelist_build(struct intel_engine_cs *engine)
 {
+	struct i915_wa_list *w = &engine->whitelist;
+
 	if (engine->class != RENDER_CLASS)
 		return;
 
-	gen9_whitelist_build(&engine->whitelist);
+	gen9_whitelist_build(w);
+
+	/* WaAllowPMDepthAndInvocationCountAccessFromUMD:cfl,whl,cml,aml */
+	whitelist_reg_ext(w, PS_DEPTH_COUNT, RING_FORCE_TO_NONPRIV_RD);
+	whitelist_reg_ext(w, PS_DEPTH_COUNT_UDW, RING_FORCE_TO_NONPRIV_RD);
+	whitelist_reg_ext(w, PS_INVOCATION_COUNT, RING_FORCE_TO_NONPRIV_RD);
+	whitelist_reg_ext(w, PS_INVOCATION_COUNT_UDW, RING_FORCE_TO_NONPRIV_RD);
 }
 
 static void cnl_whitelist_build(struct intel_engine_cs *engine)
-- 
2.21.0.392.gf8f6787159e

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  parent reply	other threads:[~2019-06-25 18:23 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-25 18:22 [PATCH v5 0/3] drm/i915: CTS fixes Lionel Landwerlin
2019-06-25 18:22 ` [PATCH v5 1/3] drm/i915: fix whitelist selftests with readonly registers Lionel Landwerlin
2019-06-25 18:22 ` Lionel Landwerlin [this message]
2019-06-25 18:22 ` [PATCH v5 3/3] drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT Lionel Landwerlin
2019-06-26  0:25 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: CTS fixes (rev5) Patchwork
2019-06-26  1:45 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-06-26  6:09   ` Lionel Landwerlin

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