From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DD3CC06511 for ; Wed, 3 Jul 2019 02:02:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C29662184B for ; Wed, 3 Jul 2019 02:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562119323; bh=Snc/t/lCtkBERwsYIRCa83hFKhk04PY6amxMNM7o1jw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=Ys5ZZZGQEmz9eFMIF4VXkEx635qUk1pXOCDTNcJnpbNzfKF/Cq3nG63gyrB9K3B8z irTiptbg+8Pb77Lbpll0oRDUfUXgsmbYXz2eKVhi9RpbRYKCm12E2ziGH+POWUosPZ elMGthdj4fxZbVVaaUoa6awdjKvkv/dT+jbVPUBc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727206AbfGCCCC (ORCPT ); Tue, 2 Jul 2019 22:02:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:51576 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726329AbfGCCCC (ORCPT ); Tue, 2 Jul 2019 22:02:02 -0400 Received: from localhost (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4A66321721; Wed, 3 Jul 2019 02:02:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1562119321; bh=Snc/t/lCtkBERwsYIRCa83hFKhk04PY6amxMNM7o1jw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=0GoMmqJgtYnQap3xsd7R6I9G+9mr8xeeYGzCMG/thnbVnsTHoLKQ5dKzmfJVUFPIr bz7CSoLz9kByvAE9LEwBIAsgdHV2DAxdN5gGInlggcSfmBzZWFLOJovNMnI4aPkyVk ZAVK+7jz/WWa2Hbi+L5PwIe4sy8lbgD6GUL2QGbs= Date: Tue, 2 Jul 2019 22:02:00 -0400 From: Sasha Levin To: Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, Daniel Borkmann , Jean-Philippe Brucker , Will Deacon , Alexei Starovoitov Subject: Re: [PATCH 5.1 51/55] bpf, arm64: use more scalable stadd over ldxr / stxr loop in xadd Message-ID: <20190703020200.GR11506@sasha-vm> References: <20190702080124.103022729@linuxfoundation.org> <20190702080126.728030225@linuxfoundation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20190702080126.728030225@linuxfoundation.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 02, 2019 at 10:01:59AM +0200, Greg Kroah-Hartman wrote: >From: Daniel Borkmann > >commit 34b8ab091f9ef57a2bb3c8c8359a0a03a8abf2f9 upstream. > >Since ARMv8.1 supplement introduced LSE atomic instructions back in 2016, >lets add support for STADD and use that in favor of LDXR / STXR loop for >the XADD mapping if available. STADD is encoded as an alias for LDADD with >XZR as the destination register, therefore add LDADD to the instruction >encoder along with STADD as special case and use it in the JIT for CPUs >that advertise LSE atomics in CPUID register. If immediate offset in the >BPF XADD insn is 0, then use dst register directly instead of temporary >one. > >Signed-off-by: Daniel Borkmann >Acked-by: Jean-Philippe Brucker >Acked-by: Will Deacon >Signed-off-by: Alexei Starovoitov >Signed-off-by: Greg Kroah-Hartman This one has a fix upstream: c5e2edeb01ae9ffbdde95bdcdb6d3614ba1eb195 ("arm64: insn: Fix ldadd instruction encoding"). -- Thanks, Sasha