From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65668C7618B for ; Mon, 29 Jul 2019 06:36:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4058A2070B for ; Mon, 29 Jul 2019 06:36:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726862AbfG2Ggn (ORCPT ); Mon, 29 Jul 2019 02:36:43 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:57143 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725934AbfG2Ggm (ORCPT ); Mon, 29 Jul 2019 02:36:42 -0400 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1hrzGq-0006RE-Jk; Mon, 29 Jul 2019 08:36:32 +0200 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1hrzGo-0003FU-Dg; Mon, 29 Jul 2019 08:36:30 +0200 Date: Mon, 29 Jul 2019 08:36:30 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Jernej Skrabec Cc: thierry.reding@gmail.com, mripard@kernel.org, wens@csie.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Philipp Zabel Subject: Re: [PATCH 2/6] pwm: sun4i: Add a quirk for reset line Message-ID: <20190729063630.rn325whatfnc3m7n@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <20190726184045.14669-3-jernej.skrabec@siol.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20190726184045.14669-3-jernej.skrabec@siol.net> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Cc += reset framework maintainer Hello Jernej, On Fri, Jul 26, 2019 at 08:40:41PM +0200, Jernej Skrabec wrote: > H6 PWM core needs deasserted reset line in order to work. > > Add a quirk for it. > > Signed-off-by: Jernej Skrabec > --- > drivers/pwm/pwm-sun4i.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > > diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c > index de78c824bbfd..1b7be8fbde86 100644 > --- a/drivers/pwm/pwm-sun4i.c > +++ b/drivers/pwm/pwm-sun4i.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -72,12 +73,14 @@ static const u32 prescaler_table[] = { > > struct sun4i_pwm_data { > bool has_prescaler_bypass; > + bool has_reset; > unsigned int npwm; > }; > > struct sun4i_pwm_chip { > struct pwm_chip chip; > struct clk *clk; > + struct reset_control *rst; > void __iomem *base; > spinlock_t ctrl_lock; > const struct sun4i_pwm_data *data; > @@ -371,6 +374,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev) > if (IS_ERR(pwm->clk)) > return PTR_ERR(pwm->clk); > > + if (pwm->data->has_reset) { > + pwm->rst = devm_reset_control_get(&pdev->dev, NULL); > + if (IS_ERR(pwm->rst)) > + return PTR_ERR(pwm->rst); > + > + reset_control_deassert(pwm->rst); > + } > + I wonder why there is a need to track if a given chip needs a reset line. I'd just use devm_reset_control_get_optional() and drop the .has_reset member in struct sun4i_pwm_data. > pwm->chip.dev = &pdev->dev; > pwm->chip.ops = &sun4i_pwm_ops; > pwm->chip.base = -1; > @@ -383,19 +394,31 @@ static int sun4i_pwm_probe(struct platform_device *pdev) > ret = pwmchip_add(&pwm->chip); > if (ret < 0) { > dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret); > - return ret; > + goto err_pwm_add; > } > > platform_set_drvdata(pdev, pwm); > > return 0; > + > +err_pwm_add: > + reset_control_assert(pwm->rst); > + > + return ret; > } > > static int sun4i_pwm_remove(struct platform_device *pdev) > { > struct sun4i_pwm_chip *pwm = platform_get_drvdata(pdev); > + int ret; > + > + ret = pwmchip_remove(&pwm->chip); > + if (ret) > + return ret; > > - return pwmchip_remove(&pwm->chip); > + reset_control_assert(pwm->rst); > + > + return 0; > } > > static struct platform_driver sun4i_pwm_driver = { -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ | From mboxrd@z Thu Jan 1 00:00:00 1970 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= Subject: Re: [PATCH 2/6] pwm: sun4i: Add a quirk for reset line Date: Mon, 29 Jul 2019 08:36:30 +0200 Message-ID: <20190729063630.rn325whatfnc3m7n@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <20190726184045.14669-3-jernej.skrabec@siol.net> Reply-To: u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20190726184045.14669-3-jernej.skrabec-gGgVlfcn5nU@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jernej Skrabec Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, mripard-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, wens-jdAy2FN1RRM@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Philipp Zabel List-Id: devicetree@vger.kernel.org Cc +=3D reset framework maintainer Hello Jernej, On Fri, Jul 26, 2019 at 08:40:41PM +0200, Jernej Skrabec wrote: > H6 PWM core needs deasserted reset line in order to work. >=20 > Add a quirk for it. >=20 > Signed-off-by: Jernej Skrabec > --- > drivers/pwm/pwm-sun4i.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c > index de78c824bbfd..1b7be8fbde86 100644 > --- a/drivers/pwm/pwm-sun4i.c > +++ b/drivers/pwm/pwm-sun4i.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -72,12 +73,14 @@ static const u32 prescaler_table[] =3D { > =20 > struct sun4i_pwm_data { > bool has_prescaler_bypass; > + bool has_reset; > unsigned int npwm; > }; > =20 > struct sun4i_pwm_chip { > struct pwm_chip chip; > struct clk *clk; > + struct reset_control *rst; > void __iomem *base; > spinlock_t ctrl_lock; > const struct sun4i_pwm_data *data; > @@ -371,6 +374,14 @@ static int sun4i_pwm_probe(struct platform_device *p= dev) > if (IS_ERR(pwm->clk)) > return PTR_ERR(pwm->clk); > =20 > + if (pwm->data->has_reset) { > + pwm->rst =3D devm_reset_control_get(&pdev->dev, NULL); > + if (IS_ERR(pwm->rst)) > + return PTR_ERR(pwm->rst); > + > + reset_control_deassert(pwm->rst); > + } > + I wonder why there is a need to track if a given chip needs a reset line. I'd just use devm_reset_control_get_optional() and drop the .has_reset member in struct sun4i_pwm_data. > pwm->chip.dev =3D &pdev->dev; > pwm->chip.ops =3D &sun4i_pwm_ops; > pwm->chip.base =3D -1; > @@ -383,19 +394,31 @@ static int sun4i_pwm_probe(struct platform_device *= pdev) > ret =3D pwmchip_add(&pwm->chip); > if (ret < 0) { > dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret); > - return ret; > + goto err_pwm_add; > } > =20 > platform_set_drvdata(pdev, pwm); > =20 > return 0; > + > +err_pwm_add: > + reset_control_assert(pwm->rst); > + > + return ret; > } > =20 > static int sun4i_pwm_remove(struct platform_device *pdev) > { > struct sun4i_pwm_chip *pwm =3D platform_get_drvdata(pdev); > + int ret; > + > + ret =3D pwmchip_remove(&pwm->chip); > + if (ret) > + return ret; > =20 > - return pwmchip_remove(&pwm->chip); > + reset_control_assert(pwm->rst); > + > + return 0; > } > =20 > static struct platform_driver sun4i_pwm_driver =3D { --=20 Pengutronix e.K. | Uwe Kleine-K=C3=B6nig = | Industrial Linux Solutions | http://www.pengutronix.de/ | --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org To view this discussion on the web, visit https://groups.google.com/d/msgid= /linux-sunxi/20190729063630.rn325whatfnc3m7n%40pengutronix.de. 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hrzH4-0004Ea-E9; Mon, 29 Jul 2019 06:36:46 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1hrzGx-0004AA-Vj for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2019 06:36:41 +0000 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1hrzGq-0006RE-Jk; Mon, 29 Jul 2019 08:36:32 +0200 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1hrzGo-0003FU-Dg; Mon, 29 Jul 2019 08:36:30 +0200 Date: Mon, 29 Jul 2019 08:36:30 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Jernej Skrabec Subject: Re: [PATCH 2/6] pwm: sun4i: Add a quirk for reset line Message-ID: <20190729063630.rn325whatfnc3m7n@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <20190726184045.14669-3-jernej.skrabec@siol.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190726184045.14669-3-jernej.skrabec@siol.net> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190728_233640_097202_CB4AD602 X-CRM114-Status: GOOD ( 19.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, mripard@kernel.org, wens@csie.org, robh+dt@kernel.org, thierry.reding@gmail.com, Philipp Zabel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Cc +=3D reset framework maintainer Hello Jernej, On Fri, Jul 26, 2019 at 08:40:41PM +0200, Jernej Skrabec wrote: > H6 PWM core needs deasserted reset line in order to work. > = > Add a quirk for it. > = > Signed-off-by: Jernej Skrabec > --- > drivers/pwm/pwm-sun4i.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > = > diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c > index de78c824bbfd..1b7be8fbde86 100644 > --- a/drivers/pwm/pwm-sun4i.c > +++ b/drivers/pwm/pwm-sun4i.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -72,12 +73,14 @@ static const u32 prescaler_table[] =3D { > = > struct sun4i_pwm_data { > bool has_prescaler_bypass; > + bool has_reset; > unsigned int npwm; > }; > = > struct sun4i_pwm_chip { > struct pwm_chip chip; > struct clk *clk; > + struct reset_control *rst; > void __iomem *base; > spinlock_t ctrl_lock; > const struct sun4i_pwm_data *data; > @@ -371,6 +374,14 @@ static int sun4i_pwm_probe(struct platform_device *p= dev) > if (IS_ERR(pwm->clk)) > return PTR_ERR(pwm->clk); > = > + if (pwm->data->has_reset) { > + pwm->rst =3D devm_reset_control_get(&pdev->dev, NULL); > + if (IS_ERR(pwm->rst)) > + return PTR_ERR(pwm->rst); > + > + reset_control_deassert(pwm->rst); > + } > + I wonder why there is a need to track if a given chip needs a reset line. I'd just use devm_reset_control_get_optional() and drop the .has_reset member in struct sun4i_pwm_data. > pwm->chip.dev =3D &pdev->dev; > pwm->chip.ops =3D &sun4i_pwm_ops; > pwm->chip.base =3D -1; > @@ -383,19 +394,31 @@ static int sun4i_pwm_probe(struct platform_device *= pdev) > ret =3D pwmchip_add(&pwm->chip); > if (ret < 0) { > dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret); > - return ret; > + goto err_pwm_add; > } > = > platform_set_drvdata(pdev, pwm); > = > return 0; > + > +err_pwm_add: > + reset_control_assert(pwm->rst); > + > + return ret; > } > = > static int sun4i_pwm_remove(struct platform_device *pdev) > { > struct sun4i_pwm_chip *pwm =3D platform_get_drvdata(pdev); > + int ret; > + > + ret =3D pwmchip_remove(&pwm->chip); > + if (ret) > + return ret; > = > - return pwmchip_remove(&pwm->chip); > + reset_control_assert(pwm->rst); > + > + return 0; > } > = > static struct platform_driver sun4i_pwm_driver =3D { -- = Pengutronix e.K. | Uwe Kleine-K=F6nig | Industrial Linux Solutions | http://www.pengutronix.de/ | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel