From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA104C433FF for ; Mon, 29 Jul 2019 18:51:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AC0B7206BA for ; Mon, 29 Jul 2019 18:51:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728790AbfG2SvP (ORCPT ); Mon, 29 Jul 2019 14:51:15 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:33323 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728342AbfG2SvP (ORCPT ); Mon, 29 Jul 2019 14:51:15 -0400 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1hsAjl-000690-SO; Mon, 29 Jul 2019 20:51:09 +0200 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1hsAjk-0002Ay-OI; Mon, 29 Jul 2019 20:51:08 +0200 Date: Mon, 29 Jul 2019 20:51:08 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Jernej =?utf-8?Q?=C5=A0krabec?= Cc: linux-sunxi@googlegroups.com, Chen-Yu Tsai , Mark Rutland , linux-pwm@vger.kernel.org, devicetree , linux-kernel , Maxime Ripard , Rob Herring , Thierry Reding , kernel@pengutronix.de, linux-arm-kernel Subject: Re: [linux-sunxi] Re: [PATCH 4/6] pwm: sun4i: Add support for H6 PWM Message-ID: <20190729185108.tpilwoooxvi2z72e@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <2346193.MplWYqIveT@jernej-laptop> <20190729184041.vlvfz3vz3ykhufdk@pengutronix.de> <173825848.1FZsmuHfpq@jernej-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <173825848.1FZsmuHfpq@jernej-laptop> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 29, 2019 at 08:46:25PM +0200, Jernej Škrabec wrote: > Dne ponedeljek, 29. julij 2019 ob 20:40:41 CEST je Uwe Kleine-König > napisal(a): > > On Mon, Jul 29, 2019 at 06:40:15PM +0200, Jernej Škrabec wrote: > > > Dne ponedeljek, 29. julij 2019 ob 18:24:28 CEST je Uwe Kleine-König > > > > > > napisal(a): > > > > Hello, > > > > > > > > On Tue, Jul 30, 2019 at 12:09:40AM +0800, Chen-Yu Tsai wrote: > > > > > On Tue, Jul 30, 2019 at 12:07 AM Uwe Kleine-König > > > > > > > > > > wrote: > > > > > > On Mon, Jul 29, 2019 at 05:55:52PM +0200, Jernej Škrabec wrote: > > > > > > > Dne ponedeljek, 29. julij 2019 ob 08:40:30 CEST je Uwe > > > > > > > Kleine-König > > > > > > > > > > > > > > napisal(a): > > > > > > > > On Fri, Jul 26, 2019 at 08:40:43PM +0200, Jernej Skrabec wrote: > > > > > > > > > --- a/drivers/pwm/pwm-sun4i.c > > > > > > > > > +++ b/drivers/pwm/pwm-sun4i.c > > > > > > > > > @@ -331,6 +331,13 @@ static const struct sun4i_pwm_data > > > > > > > > > sun4i_pwm_single_bypass = {> > > > > > > > > > > > > > > > > > > .npwm = 1, > > > > > > > > > > > > > > > > > > }; > > > > > > > > > > > > > > > > > > +static const struct sun4i_pwm_data > > > > > > > > > sun50i_pwm_dual_bypass_clk_rst > > > > > > > > > = { > > > > > > > > > + .has_bus_clock = true, > > > > > > > > > + .has_prescaler_bypass = true, > > > > > > > > > + .has_reset = true, > > > > > > > > > + .npwm = 2, > > > > > > > > > +}; > > > > > > > > > + > > > > > > > > > > > > > > > > > > static const struct of_device_id sun4i_pwm_dt_ids[] = { > > > > > > > > > > > > > > > > > > { > > > > > > > > > > > > > > > > > > .compatible = "allwinner,sun4i-a10-pwm", > > > > > > > > > > > > > > > > > > @@ -347,6 +354,9 @@ static const struct of_device_id > > > > > > > > > sun4i_pwm_dt_ids[] = > > > > > > > > > { > > > > > > > > > > > > > > > > > > }, { > > > > > > > > > > > > > > > > > > .compatible = "allwinner,sun8i-h3-pwm", > > > > > > > > > .data = &sun4i_pwm_single_bypass, > > > > > > > > > > > > > > > > > > + }, { > > > > > > > > > + .compatible = "allwinner,sun50i-h6-pwm", > > > > > > > > > + .data = &sun50i_pwm_dual_bypass_clk_rst, > > > > > > > > > > > > > > > > If you follow my suggestion for the two previous patches, you > > > > > > > > can > > > > > > > > just > > > > > > > > > > > > > > > > use: > > > > > > > > compatible = "allwinner,sun50i-h6-pwm", > > > > > > > > "allwinner,sun5i-a10s-pwm"; > > > > > > > > > > > > > > > > and drop this patch. > > > > > > > > > > > > > > Maxime found out that it's not compatible with A10s due to > > > > > > > difference > > > > > > > in bypass bit, but yes, I know what you mean. > > > > > > > > > > > > > > Since H6 requires reset line and bus clock to be specified, it's > > > > > > > not > > > > > > > compatible from DT binding side. New yaml based binding must > > > > > > > somehow > > > > > > > know that in order to be able to validate DT node, so it needs > > > > > > > standalone compatible. However, depending on conclusions of other > > > > > > > discussions, this new compatible can be associated with already > > > > > > > available quirks structure or have it's own.> > > > > > > > > > > > > > I cannot follow. You should be able to specify in the binding that > > > > > > the > > > > > > reset line and bus clock is optional. Then allwinner,sun50i-h6-pwm > > > > > > without a reset line and bus clock also verifies, but this doesn't > > > > > > really hurt (and who knows, maybe the next allwinner chip needs > > > > > > exactly > > > > > > this). > > > > > > > > > > It is not optional. It will not work if either the clocks or reset > > > > > controls > > > > > are missing. How would these be optional anyway? Either it's connected > > > > > and > > > > > thus required, or it's not and therefore should be omitted from the > > > > > description. > > > > > > > > [Just arguing about the clock here, the argumentation is analogous for > > > > the reset control.] > > > > > > > > From the driver's perspective it's optional: There are devices with and > > > > without a bus clock. This doesn't mean that you can just ignore this > > > > clock if it's specified. It's optional in the sense "If dt doesn't > > > > specify it, then assume this is a device that doesn't have it and so you > > > > don't need to handle it." but not in the sense "it doesn't matter if > > > > you handle it or not.". > > > > > > > > Other than that I'm on your side. So for example I think it's not > > > > optimal that gpiod_get_optional returns NULL if GPIOLIB=n or that > > > > devm_reset_control_get_optional returns NULL if RESET_CONTROLLER=n > > > > because this hides exactly the kind of problem you point out here. > > > > > > I think there's misunderstanding. I only argued that we can't use > > > > > > compatible = "allwinner,sun50i-h6-pwm", > > > > > > "allwinner,sun5i-a10s-pwm"; > > > > > > as you suggested and only > > > > > > compatible = "allwinner,sun50i-h6-pwm"; > > > > > > will work. Not because of driver itself (it can still use _optional() > > > variants), but because of DT binding, which should be able to validate H6 > > > PWM node - reset and bus clock references are required in this case. > > > > I think I understood. In my eyes there is no need to let validation of > > the DT bindings catch a missing "optional" property that is needed on > > H6. > > > > You have to draw the line somewhere which information the driver has > > hard-coded and what is only provided by the device tree and just assumed > > to be correct by the driver. You argue the driver should know that > > No, in this thread I argue that DT validation tool, executed by > > make ARCH=arm64 dtbs_check > > should catch that. This is not a driver, but DT binding described in YAML. The argumentation is the same. dtbs_check doesn't notice if the base address of your "allwinner,sun50i-h6-pwm" device is wrong. So why should it catch a missing reset controller phandle? Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | http://www.pengutronix.de/ | From mboxrd@z Thu Jan 1 00:00:00 1970 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= Subject: Re: Re: [PATCH 4/6] pwm: sun4i: Add support for H6 PWM Date: Mon, 29 Jul 2019 20:51:08 +0200 Message-ID: <20190729185108.tpilwoooxvi2z72e@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <2346193.MplWYqIveT@jernej-laptop> <20190729184041.vlvfz3vz3ykhufdk@pengutronix.de> <173825848.1FZsmuHfpq@jernej-laptop> Reply-To: u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <173825848.1FZsmuHfpq@jernej-laptop> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Jernej =?utf-8?Q?=C5=A0krabec?= Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Chen-Yu Tsai , Mark Rutland , linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree , linux-kernel , Maxime Ripard , Rob Herring , Thierry Reding , kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, linux-arm-kernel List-Id: devicetree@vger.kernel.org On Mon, Jul 29, 2019 at 08:46:25PM +0200, Jernej =C5=A0krabec wrote: > Dne ponedeljek, 29. julij 2019 ob 20:40:41 CEST je Uwe Kleine-K=C3=B6nig= =20 > napisal(a): > > On Mon, Jul 29, 2019 at 06:40:15PM +0200, Jernej =C5=A0krabec wrote: > > > Dne ponedeljek, 29. julij 2019 ob 18:24:28 CEST je Uwe Kleine-K=C3=B6= nig > > >=20 > > > napisal(a): > > > > Hello, > > > >=20 > > > > On Tue, Jul 30, 2019 at 12:09:40AM +0800, Chen-Yu Tsai wrote: > > > > > On Tue, Jul 30, 2019 at 12:07 AM Uwe Kleine-K=C3=B6nig > > > > >=20 > > > > > wrote: > > > > > > On Mon, Jul 29, 2019 at 05:55:52PM +0200, Jernej =C5=A0krabec w= rote: > > > > > > > Dne ponedeljek, 29. julij 2019 ob 08:40:30 CEST je Uwe > > > > > > > Kleine-K=C3=B6nig > > > > > > >=20 > > > > > > > napisal(a): > > > > > > > > On Fri, Jul 26, 2019 at 08:40:43PM +0200, Jernej Skrabec wr= ote: > > > > > > > > > --- a/drivers/pwm/pwm-sun4i.c > > > > > > > > > +++ b/drivers/pwm/pwm-sun4i.c > > > > > > > > > @@ -331,6 +331,13 @@ static const struct sun4i_pwm_data > > > > > > > > > sun4i_pwm_single_bypass =3D {> > > > > > > > > >=20 > > > > > > > > > .npwm =3D 1, > > > > > > > > > =20 > > > > > > > > > }; > > > > > > > > >=20 > > > > > > > > > +static const struct sun4i_pwm_data > > > > > > > > > sun50i_pwm_dual_bypass_clk_rst > > > > > > > > > =3D { > > > > > > > > > + .has_bus_clock =3D true, > > > > > > > > > + .has_prescaler_bypass =3D true, > > > > > > > > > + .has_reset =3D true, > > > > > > > > > + .npwm =3D 2, > > > > > > > > > +}; > > > > > > > > > + > > > > > > > > >=20 > > > > > > > > > static const struct of_device_id sun4i_pwm_dt_ids[] =3D = { > > > > > > > > > =20 > > > > > > > > > { > > > > > > > > > =20 > > > > > > > > > .compatible =3D "allwinner,sun4i-a10-pwm", > > > > > > > > >=20 > > > > > > > > > @@ -347,6 +354,9 @@ static const struct of_device_id > > > > > > > > > sun4i_pwm_dt_ids[] =3D > > > > > > > > > { > > > > > > > > >=20 > > > > > > > > > }, { > > > > > > > > > =20 > > > > > > > > > .compatible =3D "allwinner,sun8i-h3-pwm", > > > > > > > > > .data =3D &sun4i_pwm_single_bypass, > > > > > > > > >=20 > > > > > > > > > + }, { > > > > > > > > > + .compatible =3D "allwinner,sun50i-h6-pwm", > > > > > > > > > + .data =3D &sun50i_pwm_dual_bypass_clk_rst, > > > > > > > >=20 > > > > > > > > If you follow my suggestion for the two previous patches, y= ou > > > > > > > > can > > > > > > > > just > > > > > > > >=20 > > > > > > > > use: > > > > > > > > compatible =3D "allwinner,sun50i-h6-pwm", > > > > > > > > "allwinner,sun5i-a10s-pwm"; > > > > > > > >=20 > > > > > > > > and drop this patch. > > > > > > >=20 > > > > > > > Maxime found out that it's not compatible with A10s due to > > > > > > > difference > > > > > > > in bypass bit, but yes, I know what you mean. > > > > > > >=20 > > > > > > > Since H6 requires reset line and bus clock to be specified, i= t's > > > > > > > not > > > > > > > compatible from DT binding side. New yaml based binding must > > > > > > > somehow > > > > > > > know that in order to be able to validate DT node, so it need= s > > > > > > > standalone compatible. However, depending on conclusions of o= ther > > > > > > > discussions, this new compatible can be associated with alrea= dy > > > > > > > available quirks structure or have it's own.> > > > > > > >=20 > > > > > > I cannot follow. You should be able to specify in the binding t= hat > > > > > > the > > > > > > reset line and bus clock is optional. Then allwinner,sun50i-h6-= pwm > > > > > > without a reset line and bus clock also verifies, but this does= n't > > > > > > really hurt (and who knows, maybe the next allwinner chip needs > > > > > > exactly > > > > > > this). > > > > >=20 > > > > > It is not optional. It will not work if either the clocks or rese= t > > > > > controls > > > > > are missing. How would these be optional anyway? Either it's conn= ected > > > > > and > > > > > thus required, or it's not and therefore should be omitted from t= he > > > > > description. > > > >=20 > > > > [Just arguing about the clock here, the argumentation is analogous = for > > > > the reset control.] > > > >=20 > > > > From the driver's perspective it's optional: There are devices with= and > > > > without a bus clock. This doesn't mean that you can just ignore thi= s > > > > clock if it's specified. It's optional in the sense "If dt doesn't > > > > specify it, then assume this is a device that doesn't have it and s= o you > > > > don't need to handle it." but not in the sense "it doesn't matter i= f > > > > you handle it or not.". > > > >=20 > > > > Other than that I'm on your side. So for example I think it's not > > > > optimal that gpiod_get_optional returns NULL if GPIOLIB=3Dn or that > > > > devm_reset_control_get_optional returns NULL if RESET_CONTROLLER=3D= n > > > > because this hides exactly the kind of problem you point out here. > > >=20 > > > I think there's misunderstanding. I only argued that we can't use > > >=20 > > > compatible =3D "allwinner,sun50i-h6-pwm", > > >=20 > > > "allwinner,sun5i-a10s-pwm"; > > >=20 > > > as you suggested and only > > >=20 > > > compatible =3D "allwinner,sun50i-h6-pwm"; > > >=20 > > > will work. Not because of driver itself (it can still use _optional() > > > variants), but because of DT binding, which should be able to validat= e H6 > > > PWM node - reset and bus clock references are required in this case. > >=20 > > I think I understood. In my eyes there is no need to let validation of > > the DT bindings catch a missing "optional" property that is needed on > > H6. > >=20 > > You have to draw the line somewhere which information the driver has > > hard-coded and what is only provided by the device tree and just assume= d > > to be correct by the driver. You argue the driver should know that=20 >=20 > No, in this thread I argue that DT validation tool, executed by >=20 > make ARCH=3Darm64 dtbs_check >=20 > should catch that. This is not a driver, but DT binding described in YAML= . The argumentation is the same. dtbs_check doesn't notice if the base address of your "allwinner,sun50i-h6-pwm" device is wrong. So why should it catch a missing reset controller phandle? Best regards Uwe --=20 Pengutronix e.K. | Uwe Kleine-K=C3=B6nig = | Industrial Linux Solutions | http://www.pengutronix.de/ | --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org To view this discussion on the web, visit https://groups.google.com/d/msgid= /linux-sunxi/20190729185108.tpilwoooxvi2z72e%40pengutronix.de. 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20:51:08 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Jernej =?utf-8?Q?=C5=A0krabec?= Subject: Re: [linux-sunxi] Re: [PATCH 4/6] pwm: sun4i: Add support for H6 PWM Message-ID: <20190729185108.tpilwoooxvi2z72e@pengutronix.de> References: <20190726184045.14669-1-jernej.skrabec@siol.net> <2346193.MplWYqIveT@jernej-laptop> <20190729184041.vlvfz3vz3ykhufdk@pengutronix.de> <173825848.1FZsmuHfpq@jernej-laptop> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <173825848.1FZsmuHfpq@jernej-laptop> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190729_115118_743861_758C607F X-CRM114-Status: GOOD ( 34.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-pwm@vger.kernel.org, devicetree , Chen-Yu Tsai , Maxime Ripard , linux-kernel , linux-sunxi@googlegroups.com, Rob Herring , Thierry Reding , kernel@pengutronix.de, linux-arm-kernel Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCBKdWwgMjksIDIwMTkgYXQgMDg6NDY6MjVQTSArMDIwMCwgSmVybmVqIMWga3JhYmVj IHdyb3RlOgo+IERuZSBwb25lZGVsamVrLCAyOS4ganVsaWogMjAxOSBvYiAyMDo0MDo0MSBDRVNU IGplIFV3ZSBLbGVpbmUtS8O2bmlnIAo+IG5hcGlzYWwoYSk6Cj4gPiBPbiBNb24sIEp1bCAyOSwg MjAxOSBhdCAwNjo0MDoxNVBNICswMjAwLCBKZXJuZWogxaBrcmFiZWMgd3JvdGU6Cj4gPiA+IERu ZSBwb25lZGVsamVrLCAyOS4ganVsaWogMjAxOSBvYiAxODoyNDoyOCBDRVNUIGplIFV3ZSBLbGVp bmUtS8O2bmlnCj4gPiA+IAo+ID4gPiBuYXBpc2FsKGEpOgo+ID4gPiA+IEhlbGxvLAo+ID4gPiA+ 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