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From: Andrew Murray <andrew.murray@arm.com>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>
Subject: Re: [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required properties
Date: Mon, 12 Aug 2019 09:45:17 +0100	[thread overview]
Message-ID: <20190812084517.GW56241@e119886-lin.cambridge.arm.com> (raw)
In-Reply-To: <20190812042435.25102-2-Zhiqiang.Hou@nxp.com>

On Mon, Aug 12, 2019 at 04:22:16AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> The num-lanes is not a mandatory property, e.g. on FSL
> Layerscape SoCs, the PCIe link training is completed
> automatically base on the selected SerDes protocol, it
> doesn't need the num-lanes to set-up the link width.
> 
> It has been added in the Optional properties. This
> patch is to remove it from the Required properties.

For clarity, maybe this paragraph can be reworded to:

"It is previously in both Required and Optional properties,
 let's remove it from the Required properties".

I don't understand why this property is previously in
both required and optional...

It looks like num-lanes was first made optional back in
2015 and removed from the Required section (907fce090253).
But then re-added back into the Required section in 2017
with the adition of bindings for EP mode (b12befecd7de).

Is num-lanes actually required for EP mode?

Thanks,

Andrew Murray

> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> index 5561a1c060d0..bd880df39a79 100644
> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -11,7 +11,6 @@ Required properties:
>  	     the ATU address space.
>      (The old way of getting the configuration address space from "ranges"
>      is deprecated and should be avoided.)
> -- num-lanes: number of lanes to use
>  RC mode:
>  - #address-cells: set to <3>
>  - #size-cells: set to <2>
> -- 
> 2.17.1
> 

  reply	other threads:[~2019-08-12  8:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12  4:22 [PATCH 0/4] Layerscape: Remove num-lanes property from PCIe nodes Z.q. Hou
2019-08-12  4:22 ` [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required properties Z.q. Hou
2019-08-12  8:45   ` Andrew Murray [this message]
2019-08-13  3:07     ` Z.q. Hou
2019-08-13  4:35       ` Kishon Vijay Abraham I
2019-08-19 19:20   ` Bjorn Helgaas
2019-08-19 23:57     ` Z.q. Hou
2019-08-12  4:22 ` [PATCH 2/4] PCI: dwc: Return directly when num-lanes is not found Z.q. Hou
2019-08-12  8:34   ` Andrew Murray
2019-08-13  3:13     ` Z.q. Hou
2019-08-12  4:22 ` [PATCH 3/4] ARM: dts: ls1021a: Remove num-lanes property from PCIe nodes Z.q. Hou
2019-08-12  8:35   ` Andrew Murray
2019-08-13  3:13     ` Z.q. Hou
2019-08-19 19:24   ` Bjorn Helgaas
2019-08-20  0:12     ` Z.q. Hou
2019-08-12  4:22 ` [PATCH 4/4] arm64: dts: fsl: " Z.q. Hou
2019-08-12  8:35   ` Andrew Murray
2019-08-13  3:14     ` Z.q. Hou

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