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From: David Francis <David.Francis-5C7GfCeVMHo@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Leo Li <sunpeng.li-5C7GfCeVMHo@public.gmane.org>,
	David Francis <David.Francis-5C7GfCeVMHo@public.gmane.org>,
	Nicholas Kazlauskas
	<nicholas.kazlauskas-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 14/14] drm/amd/display: Trigger modesets on MST DSC connectors
Date: Mon, 19 Aug 2019 11:50:38 -0400	[thread overview]
Message-ID: <20190819155038.1771-15-David.Francis@amd.com> (raw)
In-Reply-To: <20190819155038.1771-1-David.Francis-5C7GfCeVMHo@public.gmane.org>

Whenever a connector on an MST network is attached, detached, or
undergoes a modeset, the DSC configs for each stream on that
topology will be recalculated. This can change their required
bandwidth, requiring a full reprogramming, as though a modeset
was performed, even if that stream did not change timing.

Therefore, whenever a crtc has drm_atomic_crtc_needs_modeset,
for each crtc that shares a MST topology with that stream and
supports DSC, add that crtc (and all affected connectors and
planes) to the atomic state and set mode_changed on its state

Cc: Leo Li <sunpeng.li@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 80 +++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 145fd73025dc..8d5357aec5e8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6475,7 +6475,78 @@ static int do_aquire_global_lock(struct drm_device *dev,
 
 	return ret < 0 ? ret : 0;
 }
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm_crtc *crtc)
+{
+	struct drm_connector *connector;
+	struct drm_connector_state *conn_state;
+	struct drm_connector_list_iter conn_iter;
+	struct drm_crtc_state *new_crtc_state;
+	struct amdgpu_dm_connector *aconnector = NULL, *aconnector_to_add;
+	int i, j, ret;
+	struct drm_crtc *crtcs_affected[MAX_PIPES] = { 0 };
+
+	for_each_new_connector_in_state(state, connector, conn_state, i) {
+		if (conn_state->crtc != crtc)
+			continue;
+
+		aconnector = to_amdgpu_dm_connector(connector);
+		if (!aconnector->port)
+			aconnector = NULL;
+		else
+			break;
+	}
+
+	if (!aconnector)
+		return 0;
+
+	i = 0;
+	drm_connector_list_iter_begin(state->dev, &conn_iter);
+	drm_for_each_connector_iter(connector, &conn_iter) {
+		if (!connector->state || !connector->state->crtc)
+			continue;
+
+		aconnector_to_add = to_amdgpu_dm_connector(connector);
+		if (!aconnector_to_add->port)
+			continue;
+
+		if (aconnector_to_add->port->mgr != aconnector->port->mgr)
+			continue;
+
+		if (!aconnector_to_add->dc_sink)
+			continue;
+
+		if (!aconnector_to_add->dc_sink->sink_dsc_caps.dsc_dec_caps.is_dsc_supported)
+			continue;
 
+		if (i >= MAX_PIPES)
+			continue;
+
+		crtcs_affected[i] = connector->state->crtc;
+		i++;
+	}
+	drm_connector_list_iter_end(&conn_iter);
+
+	for (j = 0; j < i; j++) {
+		new_crtc_state = drm_atomic_get_crtc_state(state, crtcs_affected[j]);
+		if (IS_ERR(new_crtc_state))
+			return PTR_ERR(new_crtc_state);
+
+		new_crtc_state->mode_changed = true;
+
+		ret = drm_atomic_add_affected_connectors(state, crtcs_affected[j]);
+		if (ret)
+			return ret;
+
+		ret = drm_atomic_add_affected_planes(state, crtcs_affected[j]);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+
+}
+#endif
 static void get_freesync_config_for_crtc(
 	struct dm_crtc_state *new_crtc_state,
 	struct dm_connector_state *new_con_state)
@@ -7178,6 +7249,15 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
 			goto fail;
 	}
 
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+		if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
+			ret = add_affected_mst_dsc_crtcs(state, crtc);
+			if (ret)
+				goto fail;
+		}
+	}
+#endif
 	/*
 	 * Add all primary and overlay planes on the CRTC to the state
 	 * whenever a plane is enabled to maintain correct z-ordering
-- 
2.17.1

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  parent reply	other threads:[~2019-08-19 15:50 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-19 15:50 [PATCH 00/14] Display Stream Compression (DSC) for AMD Navi David Francis
2019-08-19 15:50 ` [PATCH 02/14] Revert "drm/amd/display: navi10 bring up skip dsc encoder config" David Francis
     [not found] ` <20190819155038.1771-1-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-19 15:50   ` [PATCH 01/14] Revert "drm/amd/display: skip dsc config for navi10 bring up" David Francis
2019-08-19 15:50   ` [PATCH 03/14] Revert "drm/amd/display: add global master update lock for DCN2" David Francis
2019-08-19 15:50   ` [PATCH 04/14] Revert "drm/amd/display: Fix underscan not using proper scaling" David Francis
2019-08-19 15:50   ` [PATCH 05/14] drm/amd/display: Enable SST DSC in DM David Francis
     [not found]     ` <20190819155038.1771-6-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-19 18:46       ` Mikita Lipski
2019-08-19 15:50   ` [PATCH 06/14] drm/amd/display: Use dc helpers to compute timeslot distribution David Francis
     [not found]     ` <20190819155038.1771-7-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-19 19:21       ` Kazlauskas, Nicholas
2019-08-19 19:35         ` Francis, David
2019-08-19 15:50   ` [PATCH 07/14] drm/amd/display: Initialize DSC PPS variables to 0 David Francis
2019-08-19 19:36     ` Kazlauskas, Nicholas
2019-08-19 15:50   ` [PATCH 08/14] drm/dp-mst: Parse FEC capability on MST ports David Francis
2019-08-19 15:50   ` [PATCH 09/14] drm/dp-mst: Export symbols for dpcd read/write David Francis
2019-08-19 15:50   ` [PATCH 10/14] drm/dp-mst: Fill branch->num_ports David Francis
2019-08-19 15:50   ` [PATCH 11/14] drm/amd/display: Validate DSC caps on MST endpoints David Francis
2019-08-19 15:50   ` [PATCH 12/14] drm/amd/display: Write DSC enable to MST DPCD David Francis
2019-08-19 15:50   ` [PATCH 13/14] drm/amd/display: MST DSC compute fair share David Francis
2019-08-19 15:50   ` David Francis [this message]
     [not found]     ` <20190819155038.1771-15-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-19 19:34       ` [PATCH 14/14] drm/amd/display: Trigger modesets on MST DSC connectors Kazlauskas, Nicholas
2019-08-19 19:40         ` Francis, David
2019-10-01 16:17 [PATCH v2 00/14] DSC MST support for AMDGPU mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17 ` [PATCH 01/14] drm/amd/display: Add MST atomic routines mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17   ` [PATCH 02/14] drm/dp_mst: Add PBN calculation for DSC modes mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17     ` [PATCH 03/14] drm/dp_mst: Parse FEC capability on MST ports mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17       ` [PATCH 04/14] drm/dp_mst: Add MST support to DP DPCD R/W functions mikita.lipski
2019-10-01 16:17         ` [PATCH 05/14] drm/dp_mst: Fill branch->num_ports mikita.lipski
2019-10-01 16:17           ` [PATCH 06/14] drm/dp_mst: Add helpers for MST DSC and virtual DPCD aux mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17             ` [PATCH 07/14] drm/dp_mst: Add new quirk for Synaptics MST hubs mikita.lipski
2019-10-01 16:17               ` [PATCH 08/14] drm/amd/display: Use correct helpers to compute timeslots mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                 ` [PATCH 09/14] drm/amd/display: Initialize DSC PPS variables to 0 mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                   ` [PATCH 10/14] drm/amd/display: Validate DSC caps on MST endpoints mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                     ` [PATCH 11/14] drm/amd/display: Write DSC enable to MST DPCD mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                       ` [PATCH 12/14] drm/amd/display: MST DSC compute fair share mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                         ` [PATCH 13/14] drm/amd/display: Recalculate VCPI slots for new DSC connectors mikita.lipski-5C7GfCeVMHo
2019-10-01 16:17                           ` [PATCH 14/14] drm/amd/display: Trigger modesets on MST " mikita.lipski

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