From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC56AC3A59D for ; Thu, 22 Aug 2019 09:34:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 98D68233FD for ; Thu, 22 Aug 2019 09:34:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387463AbfHVJeb (ORCPT ); Thu, 22 Aug 2019 05:34:31 -0400 Received: from shell.v3.sk ([90.176.6.54]:35953 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731541AbfHVJe2 (ORCPT ); Thu, 22 Aug 2019 05:34:28 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id BF9C0D7563; Thu, 22 Aug 2019 11:34:24 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id ye-Fov3VnB4j; Thu, 22 Aug 2019 11:33:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id B3DE3D7556; Thu, 22 Aug 2019 11:33:05 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id miP-xL8D7hA4; Thu, 22 Aug 2019 11:32:58 +0200 (CEST) Received: from belphegor.brq.redhat.com (nat-pool-brq-t.redhat.com [213.175.37.10]) by zimbra.v3.sk (Postfix) with ESMTPSA id 9B051D756A; Thu, 22 Aug 2019 11:26:51 +0200 (CEST) From: Lubomir Rintel To: Olof Johansson Cc: Rob Herring , Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Kishon Vijay Abraham I , Russell King , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 16/20] ARM: mmp: add SMP support Date: Thu, 22 Aug 2019 11:26:39 +0200 Message-Id: <20190822092643.593488-17-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190822092643.593488-1-lkundrak@v3.sk> References: <20190822092643.593488-1-lkundrak@v3.sk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Used to bring up the second core on MMP3. Signed-off-by: Lubomir Rintel --- Changes since v1: - Wrap SW_BRANCH_VIRT_ADDR with __pa_symbol() arch/arm/mach-mmp/Makefile | 3 +++ arch/arm/mach-mmp/platsmp.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 arch/arm/mach-mmp/platsmp.c diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 322c1c97dc900..7b3a7f979eece 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -22,6 +22,9 @@ ifeq ($(CONFIG_PM),y) obj-$(CONFIG_CPU_PXA910) +=3D pm-pxa910.o obj-$(CONFIG_CPU_MMP2) +=3D pm-mmp2.o endif +ifeq ($(CONFIG_SMP),y) +obj-$(CONFIG_MACH_MMP3_DT) +=3D platsmp.o +endif =20 # board support obj-$(CONFIG_MACH_ASPENITE) +=3D aspenite.o diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c new file mode 100644 index 0000000000000..98d5ef23623cb --- /dev/null +++ b/arch/arm/mach-mmp/platsmp.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Lubomir Rintel + */ +#include +#include +#include +#include "addr-map.h" + +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) + +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idl= e) +{ + /* + * Apparently, the boot ROM on the second core spins on this + * register becoming non-zero and then jumps to the address written + * there. No IPIs involved. + */ + __raw_writel(virt_to_phys(secondary_startup), + __pa_symbol(SW_BRANCH_VIRT_ADDR)); + return 0; +} + +static void mmp3_smp_prepare_cpus(unsigned int max_cpus) +{ + scu_enable(SCU_VIRT_BASE); +} + +static const struct smp_operations mmp3_smp_ops __initconst =3D { + .smp_prepare_cpus =3D mmp3_smp_prepare_cpus, + .smp_boot_secondary =3D mmp3_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mmp3_smp, "marvell,mmp3-smp", &mmp3_smp_ops); --=20 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C0BCC3A59D for ; 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Thu, 22 Aug 2019 11:33:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id B3DE3D7556; Thu, 22 Aug 2019 11:33:05 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id miP-xL8D7hA4; Thu, 22 Aug 2019 11:32:58 +0200 (CEST) Received: from belphegor.brq.redhat.com (nat-pool-brq-t.redhat.com [213.175.37.10]) by zimbra.v3.sk (Postfix) with ESMTPSA id 9B051D756A; Thu, 22 Aug 2019 11:26:51 +0200 (CEST) From: Lubomir Rintel To: Olof Johansson Subject: [PATCH v2 16/20] ARM: mmp: add SMP support Date: Thu, 22 Aug 2019 11:26:39 +0200 Message-Id: <20190822092643.593488-17-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190822092643.593488-1-lkundrak@v3.sk> References: <20190822092643.593488-1-lkundrak@v3.sk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190822_023427_491752_87B78165 X-CRM114-Status: GOOD ( 13.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jason Cooper , Stephen Boyd , Marc Zyngier , Michael Turquette , Russell King , Kishon Vijay Abraham I , Lubomir Rintel , Rob Herring , linux-arm-kernel@lists.infradead.org, Thomas Gleixner , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Used to bring up the second core on MMP3. Signed-off-by: Lubomir Rintel --- Changes since v1: - Wrap SW_BRANCH_VIRT_ADDR with __pa_symbol() arch/arm/mach-mmp/Makefile | 3 +++ arch/arm/mach-mmp/platsmp.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) create mode 100644 arch/arm/mach-mmp/platsmp.c diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 322c1c97dc900..7b3a7f979eece 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -22,6 +22,9 @@ ifeq ($(CONFIG_PM),y) obj-$(CONFIG_CPU_PXA910) += pm-pxa910.o obj-$(CONFIG_CPU_MMP2) += pm-mmp2.o endif +ifeq ($(CONFIG_SMP),y) +obj-$(CONFIG_MACH_MMP3_DT) += platsmp.o +endif # board support obj-$(CONFIG_MACH_ASPENITE) += aspenite.o diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c new file mode 100644 index 0000000000000..98d5ef23623cb --- /dev/null +++ b/arch/arm/mach-mmp/platsmp.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Lubomir Rintel + */ +#include +#include +#include +#include "addr-map.h" + +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) + +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + /* + * Apparently, the boot ROM on the second core spins on this + * register becoming non-zero and then jumps to the address written + * there. No IPIs involved. + */ + __raw_writel(virt_to_phys(secondary_startup), + __pa_symbol(SW_BRANCH_VIRT_ADDR)); + return 0; +} + +static void mmp3_smp_prepare_cpus(unsigned int max_cpus) +{ + scu_enable(SCU_VIRT_BASE); +} + +static const struct smp_operations mmp3_smp_ops __initconst = { + .smp_prepare_cpus = mmp3_smp_prepare_cpus, + .smp_boot_secondary = mmp3_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mmp3_smp, "marvell,mmp3-smp", &mmp3_smp_ops); -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel