From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3500CC3A5A2 for ; Fri, 23 Aug 2019 12:16:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFC9A22CEC for ; Fri, 23 Aug 2019 12:16:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=onstation.org header.i=@onstation.org header.b="elD65P21" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393411AbfHWMQ5 (ORCPT ); Fri, 23 Aug 2019 08:16:57 -0400 Received: from onstation.org ([52.200.56.107]:50786 "EHLO onstation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393361AbfHWMQ4 (ORCPT ); Fri, 23 Aug 2019 08:16:56 -0400 Received: from localhost.localdomain (wsip-184-191-162-253.sd.sd.cox.net [184.191.162.253]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: masneyb) by onstation.org (Postfix) with ESMTPSA id 2F8773E83A; Fri, 23 Aug 2019 12:16:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=onstation.org; s=default; t=1566562615; bh=ARCZOnEhVAy5Qim6i4ZVFh52htTlXZFDp6eWNXzUNyk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=elD65P21LEh0X+VLuoa3kOusrTWAxfQgArK5aIhvT3kR5T0vkgY0iGTdK0P2egoK5 cUm5mhu/orFjxuYFRYAVrDoUR54z9oeMy19uV4lJvRtamirL7trjNJDUlukcaoGpLN f5SdvUWMtPIK5yPSGaFcCE4qTrJ5C9C843yz9YjA= From: Brian Masney To: agross@kernel.org, robdclark@gmail.com, sean@poorly.run, robh+dt@kernel.org, bjorn.andersson@linaro.org Cc: airlied@linux.ie, daniel@ffwll.ch, mark.rutland@arm.com, jonathan@marek.ca, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, jcrouse@codeaurora.org Subject: [PATCH v7 3/7] firmware: qcom: scm: add OCMEM lock/unlock interface Date: Fri, 23 Aug 2019 05:16:33 -0700 Message-Id: <20190823121637.5861-4-masneyb@onstation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190823121637.5861-1-masneyb@onstation.org> References: <20190823121637.5861-1-masneyb@onstation.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark Add support for the OCMEM lock/unlock interface that is needed by the On Chip MEMory (OCMEM) that is present on some Snapdragon devices. Signed-off-by: Rob Clark [masneyb@onstation.org: ported to latest kernel; minor reformatting.] Signed-off-by: Brian Masney Reviewed-by: Bjorn Andersson --- Changes since v6: - None Changes since v5: - None Changes since v4: - None Changes since v3: - None Changes since v2: - None Changes since v1: - None Rob's last version of this patch: https://patchwork.kernel.org/patch/7340711/ drivers/firmware/qcom_scm-32.c | 35 +++++++++++++++++++++++++++++ drivers/firmware/qcom_scm-64.c | 12 ++++++++++ drivers/firmware/qcom_scm.c | 40 ++++++++++++++++++++++++++++++++++ drivers/firmware/qcom_scm.h | 9 ++++++++ include/linux/qcom_scm.h | 15 +++++++++++++ 5 files changed, 111 insertions(+) diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index 215061c581e1..4c2514e5e249 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -442,6 +442,41 @@ int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req, req, req_cnt * sizeof(*req), resp, sizeof(*resp)); } +int __qcom_scm_ocmem_lock(struct device *dev, u32 id, u32 offset, u32 size, + u32 mode) +{ + struct ocmem_tz_lock { + __le32 id; + __le32 offset; + __le32 size; + __le32 mode; + } request; + + request.id = cpu_to_le32(id); + request.offset = cpu_to_le32(offset); + request.size = cpu_to_le32(size); + request.mode = cpu_to_le32(mode); + + return qcom_scm_call(dev, QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_LOCK_CMD, + &request, sizeof(request), NULL, 0); +} + +int __qcom_scm_ocmem_unlock(struct device *dev, u32 id, u32 offset, u32 size) +{ + struct ocmem_tz_unlock { + __le32 id; + __le32 offset; + __le32 size; + } request; + + request.id = cpu_to_le32(id); + request.offset = cpu_to_le32(offset); + request.size = cpu_to_le32(size); + + return qcom_scm_call(dev, QCOM_SCM_OCMEM_SVC, QCOM_SCM_OCMEM_UNLOCK_CMD, + &request, sizeof(request), NULL, 0); +} + void __qcom_scm_init(void) { } diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 91d5ad7cf58b..c3a3d9874def 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -241,6 +241,18 @@ int __qcom_scm_hdcp_req(struct device *dev, struct qcom_scm_hdcp_req *req, return ret; } +int __qcom_scm_ocmem_lock(struct device *dev, uint32_t id, uint32_t offset, + uint32_t size, uint32_t mode) +{ + return -ENOTSUPP; +} + +int __qcom_scm_ocmem_unlock(struct device *dev, uint32_t id, uint32_t offset, + uint32_t size) +{ + return -ENOTSUPP; +} + void __qcom_scm_init(void) { u64 cmd; diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 4802ab170fe5..7e285ff3961d 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -191,6 +191,46 @@ bool qcom_scm_pas_supported(u32 peripheral) } EXPORT_SYMBOL(qcom_scm_pas_supported); +/** + * qcom_scm_ocmem_lock_available() - is OCMEM lock/unlock interface available + */ +bool qcom_scm_ocmem_lock_available(void) +{ + return __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_OCMEM_SVC, + QCOM_SCM_OCMEM_LOCK_CMD); +} +EXPORT_SYMBOL(qcom_scm_ocmem_lock_available); + +/** + * qcom_scm_ocmem_lock() - call OCMEM lock interface to assign an OCMEM + * region to the specified initiator + * + * @id: tz initiator id + * @offset: OCMEM offset + * @size: OCMEM size + * @mode: access mode (WIDE/NARROW) + */ +int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, u32 size, + u32 mode) +{ + return __qcom_scm_ocmem_lock(__scm->dev, id, offset, size, mode); +} +EXPORT_SYMBOL(qcom_scm_ocmem_lock); + +/** + * qcom_scm_ocmem_unlock() - call OCMEM unlock interface to release an OCMEM + * region from the specified initiator + * + * @id: tz initiator id + * @offset: OCMEM offset + * @size: OCMEM size + */ +int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size) +{ + return __qcom_scm_ocmem_unlock(__scm->dev, id, offset, size); +} +EXPORT_SYMBOL(qcom_scm_ocmem_unlock); + /** * qcom_scm_pas_init_image() - Initialize peripheral authentication service * state machine for a given peripheral, using the diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 99506bd873c0..ef293ee67ec1 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -42,6 +42,15 @@ extern int __qcom_scm_hdcp_req(struct device *dev, extern void __qcom_scm_init(void); +#define QCOM_SCM_OCMEM_SVC 0xf +#define QCOM_SCM_OCMEM_LOCK_CMD 0x1 +#define QCOM_SCM_OCMEM_UNLOCK_CMD 0x2 + +extern int __qcom_scm_ocmem_lock(struct device *dev, u32 id, u32 offset, + u32 size, u32 mode); +extern int __qcom_scm_ocmem_unlock(struct device *dev, u32 id, u32 offset, + u32 size); + #define QCOM_SCM_SVC_PIL 0x2 #define QCOM_SCM_PAS_INIT_IMAGE_CMD 0x1 #define QCOM_SCM_PAS_MEM_SETUP_CMD 0x2 diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index 2d5eff506e13..b49b734d662c 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -24,6 +24,16 @@ struct qcom_scm_vmperm { int perm; }; +enum qcom_scm_ocmem_client { + QCOM_SCM_OCMEM_UNUSED_ID = 0x0, + QCOM_SCM_OCMEM_GRAPHICS_ID, + QCOM_SCM_OCMEM_VIDEO_ID, + QCOM_SCM_OCMEM_LP_AUDIO_ID, + QCOM_SCM_OCMEM_SENSORS_ID, + QCOM_SCM_OCMEM_OTHER_OS_ID, + QCOM_SCM_OCMEM_DEBUG_ID, +}; + #define QCOM_SCM_VMID_HLOS 0x3 #define QCOM_SCM_VMID_MSS_MSA 0xF #define QCOM_SCM_VMID_WLAN 0x18 @@ -41,6 +51,11 @@ extern bool qcom_scm_is_available(void); extern bool qcom_scm_hdcp_available(void); extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); +extern bool qcom_scm_ocmem_lock_available(void); +extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, + u32 size, u32 mode); +extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, + u32 size); extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size); -- 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brian Masney Subject: [PATCH v7 3/7] firmware: qcom: scm: add OCMEM lock/unlock interface Date: Fri, 23 Aug 2019 05:16:33 -0700 Message-ID: <20190823121637.5861-4-masneyb@onstation.org> References: <20190823121637.5861-1-masneyb@onstation.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190823121637.5861-1-masneyb-1iNe0GrtECGEi8DpZVb4nw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: agross-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, sean-p7yTbzM4H96eqtR555YLDQ@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, jonathan-eSc4qw6YbEQ@public.gmane.org, airlied-cv59FeDIM0c@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, daniel-/w4YWyX8dFk@public.gmane.org, freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org List-Id: devicetree@vger.kernel.org RnJvbTogUm9iIENsYXJrIDxyb2JkY2xhcmtAZ21haWwuY29tPgoKQWRkIHN1cHBvcnQgZm9yIHRo ZSBPQ01FTSBsb2NrL3VubG9jayBpbnRlcmZhY2UgdGhhdCBpcyBuZWVkZWQgYnkgdGhlCk9uIENo aXAgTUVNb3J5IChPQ01FTSkgdGhhdCBpcyBwcmVzZW50IG9uIHNvbWUgU25hcGRyYWdvbiBkZXZp Y2VzLgoKU2lnbmVkLW9mZi1ieTogUm9iIENsYXJrIDxyb2JkY2xhcmtAZ21haWwuY29tPgpbbWFz bmV5YkBvbnN0YXRpb24ub3JnOiBwb3J0ZWQgdG8gbGF0ZXN0IGtlcm5lbDsgbWlub3IgcmVmb3Jt YXR0aW5nLl0KU2lnbmVkLW9mZi1ieTogQnJpYW4gTWFzbmV5IDxtYXNuZXliQG9uc3RhdGlvbi5v cmc+ClJldmlld2VkLWJ5OiBCam9ybiBBbmRlcnNzb24gPGJqb3JuLmFuZGVyc3NvbkBsaW5hcm8u b3JnPgotLS0KQ2hhbmdlcyBzaW5jZSB2NjoKLSBOb25lCgpDaGFuZ2VzIHNpbmNlIHY1OgotIE5v bmUKCkNoYW5nZXMgc2luY2UgdjQ6Ci0gTm9uZQoKQ2hhbmdlcyBzaW5jZSB2MzoKLSBOb25lCgpD aGFuZ2VzIHNpbmNlIHYyOgotIE5vbmUKCkNoYW5nZXMgc2luY2UgdjE6Ci0gTm9uZQoKUm9iJ3Mg bGFzdCB2ZXJzaW9uIG9mIHRoaXMgcGF0Y2g6Cmh0dHBzOi8vcGF0Y2h3b3JrLmtlcm5lbC5vcmcv cGF0Y2gvNzM0MDcxMS8KCiBkcml2ZXJzL2Zpcm13YXJlL3Fjb21fc2NtLTMyLmMgfCAzNSArKysr KysrKysrKysrKysrKysrKysrKysrKysrKwogZHJpdmVycy9maXJtd2FyZS9xY29tX3NjbS02NC5j IHwgMTIgKysrKysrKysrKwogZHJpdmVycy9maXJtd2FyZS9xY29tX3NjbS5jICAgIHwgNDAgKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKwogZHJpdmVycy9maXJtd2FyZS9xY29tX3Nj bS5oICAgIHwgIDkgKysrKysrKysKIGluY2x1ZGUvbGludXgvcWNvbV9zY20uaCAgICAgICB8IDE1 ICsrKysrKysrKysrKysKIDUgZmlsZXMgY2hhbmdlZCwgMTExIGluc2VydGlvbnMoKykKCmRpZmYg LS1naXQgYS9kcml2ZXJzL2Zpcm13YXJlL3Fjb21fc2NtLTMyLmMgYi9kcml2ZXJzL2Zpcm13YXJl L3Fjb21fc2NtLTMyLmMKaW5kZXggMjE1MDYxYzU4MWUxLi40YzI1MTRlNWUyNDkgMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvZmlybXdhcmUvcWNvbV9zY20tMzIuYworKysgYi9kcml2ZXJzL2Zpcm13YXJl L3Fjb21fc2NtLTMyLmMKQEAgLTQ0Miw2ICs0NDIsNDEgQEAgaW50IF9fcWNvbV9zY21faGRjcF9y ZXEoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgcWNvbV9zY21faGRjcF9yZXEgKnJlcSwKIAkJ cmVxLCByZXFfY250ICogc2l6ZW9mKCpyZXEpLCByZXNwLCBzaXplb2YoKnJlc3ApKTsKIH0KIAor aW50IF9fcWNvbV9zY21fb2NtZW1fbG9jayhzdHJ1Y3QgZGV2aWNlICpkZXYsIHUzMiBpZCwgdTMy IG9mZnNldCwgdTMyIHNpemUsCisJCQkgIHUzMiBtb2RlKQoreworCXN0cnVjdCBvY21lbV90el9s b2NrIHsKKwkJX19sZTMyIGlkOworCQlfX2xlMzIgb2Zmc2V0OworCQlfX2xlMzIgc2l6ZTsKKwkJ X19sZTMyIG1vZGU7CisJfSByZXF1ZXN0OworCisJcmVxdWVzdC5pZCA9IGNwdV90b19sZTMyKGlk KTsKKwlyZXF1ZXN0Lm9mZnNldCA9IGNwdV90b19sZTMyKG9mZnNldCk7CisJcmVxdWVzdC5zaXpl ID0gY3B1X3RvX2xlMzIoc2l6ZSk7CisJcmVxdWVzdC5tb2RlID0gY3B1X3RvX2xlMzIobW9kZSk7 CisKKwlyZXR1cm4gcWNvbV9zY21fY2FsbChkZXYsIFFDT01fU0NNX09DTUVNX1NWQywgUUNPTV9T Q01fT0NNRU1fTE9DS19DTUQsCisJCQkgICAgICZyZXF1ZXN0LCBzaXplb2YocmVxdWVzdCksIE5V TEwsIDApOworfQorCitpbnQgX19xY29tX3NjbV9vY21lbV91bmxvY2soc3RydWN0IGRldmljZSAq ZGV2LCB1MzIgaWQsIHUzMiBvZmZzZXQsIHUzMiBzaXplKQoreworCXN0cnVjdCBvY21lbV90el91 bmxvY2sgeworCQlfX2xlMzIgaWQ7CisJCV9fbGUzMiBvZmZzZXQ7CisJCV9fbGUzMiBzaXplOwor CX0gcmVxdWVzdDsKKworCXJlcXVlc3QuaWQgPSBjcHVfdG9fbGUzMihpZCk7CisJcmVxdWVzdC5v ZmZzZXQgPSBjcHVfdG9fbGUzMihvZmZzZXQpOworCXJlcXVlc3Quc2l6ZSA9IGNwdV90b19sZTMy KHNpemUpOworCisJcmV0dXJuIHFjb21fc2NtX2NhbGwoZGV2LCBRQ09NX1NDTV9PQ01FTV9TVkMs IFFDT01fU0NNX09DTUVNX1VOTE9DS19DTUQsCisJCQkgICAgICZyZXF1ZXN0LCBzaXplb2YocmVx dWVzdCksIE5VTEwsIDApOworfQorCiB2b2lkIF9fcWNvbV9zY21faW5pdCh2b2lkKQogewogfQpk aWZmIC0tZ2l0IGEvZHJpdmVycy9maXJtd2FyZS9xY29tX3NjbS02NC5jIGIvZHJpdmVycy9maXJt d2FyZS9xY29tX3NjbS02NC5jCmluZGV4IDkxZDVhZDdjZjU4Yi4uYzNhM2Q5ODc0ZGVmIDEwMDY0 NAotLS0gYS9kcml2ZXJzL2Zpcm13YXJlL3Fjb21fc2NtLTY0LmMKKysrIGIvZHJpdmVycy9maXJt d2FyZS9xY29tX3NjbS02NC5jCkBAIC0yNDEsNiArMjQxLDE4IEBAIGludCBfX3Fjb21fc2NtX2hk Y3BfcmVxKHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IHFjb21fc2NtX2hkY3BfcmVxICpyZXEs CiAJcmV0dXJuIHJldDsKIH0KIAoraW50IF9fcWNvbV9zY21fb2NtZW1fbG9jayhzdHJ1Y3QgZGV2 aWNlICpkZXYsIHVpbnQzMl90IGlkLCB1aW50MzJfdCBvZmZzZXQsCisJCQkgIHVpbnQzMl90IHNp emUsIHVpbnQzMl90IG1vZGUpCit7CisJcmV0dXJuIC1FTk9UU1VQUDsKK30KKworaW50IF9fcWNv bV9zY21fb2NtZW1fdW5sb2NrKHN0cnVjdCBkZXZpY2UgKmRldiwgdWludDMyX3QgaWQsIHVpbnQz Ml90IG9mZnNldCwKKwkJCSAgICB1aW50MzJfdCBzaXplKQoreworCXJldHVybiAtRU5PVFNVUFA7 Cit9CisKIHZvaWQgX19xY29tX3NjbV9pbml0KHZvaWQpCiB7CiAJdTY0IGNtZDsKZGlmZiAtLWdp dCBhL2RyaXZlcnMvZmlybXdhcmUvcWNvbV9zY20uYyBiL2RyaXZlcnMvZmlybXdhcmUvcWNvbV9z Y20uYwppbmRleCA0ODAyYWIxNzBmZTUuLjdlMjg1ZmYzOTYxZCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9maXJtd2FyZS9xY29tX3NjbS5jCisrKyBiL2RyaXZlcnMvZmlybXdhcmUvcWNvbV9zY20uYwpA QCAtMTkxLDYgKzE5MSw0NiBAQCBib29sIHFjb21fc2NtX3Bhc19zdXBwb3J0ZWQodTMyIHBlcmlw aGVyYWwpCiB9CiBFWFBPUlRfU1lNQk9MKHFjb21fc2NtX3Bhc19zdXBwb3J0ZWQpOwogCisvKioK KyAqIHFjb21fc2NtX29jbWVtX2xvY2tfYXZhaWxhYmxlKCkgLSBpcyBPQ01FTSBsb2NrL3VubG9j ayBpbnRlcmZhY2UgYXZhaWxhYmxlCisgKi8KK2Jvb2wgcWNvbV9zY21fb2NtZW1fbG9ja19hdmFp bGFibGUodm9pZCkKK3sKKwlyZXR1cm4gX19xY29tX3NjbV9pc19jYWxsX2F2YWlsYWJsZShfX3Nj bS0+ZGV2LCBRQ09NX1NDTV9PQ01FTV9TVkMsCisJCQkJCSAgICBRQ09NX1NDTV9PQ01FTV9MT0NL X0NNRCk7Cit9CitFWFBPUlRfU1lNQk9MKHFjb21fc2NtX29jbWVtX2xvY2tfYXZhaWxhYmxlKTsK KworLyoqCisgKiBxY29tX3NjbV9vY21lbV9sb2NrKCkgLSBjYWxsIE9DTUVNIGxvY2sgaW50ZXJm YWNlIHRvIGFzc2lnbiBhbiBPQ01FTQorICogcmVnaW9uIHRvIHRoZSBzcGVjaWZpZWQgaW5pdGlh dG9yCisgKgorICogQGlkOiAgICAgdHogaW5pdGlhdG9yIGlkCisgKiBAb2Zmc2V0OiBPQ01FTSBv ZmZzZXQKKyAqIEBzaXplOiAgIE9DTUVNIHNpemUKKyAqIEBtb2RlOiAgIGFjY2VzcyBtb2RlIChX SURFL05BUlJPVykKKyAqLworaW50IHFjb21fc2NtX29jbWVtX2xvY2soZW51bSBxY29tX3NjbV9v Y21lbV9jbGllbnQgaWQsIHUzMiBvZmZzZXQsIHUzMiBzaXplLAorCQkJdTMyIG1vZGUpCit7CisJ cmV0dXJuIF9fcWNvbV9zY21fb2NtZW1fbG9jayhfX3NjbS0+ZGV2LCBpZCwgb2Zmc2V0LCBzaXpl LCBtb2RlKTsKK30KK0VYUE9SVF9TWU1CT0wocWNvbV9zY21fb2NtZW1fbG9jayk7CisKKy8qKgor ICogcWNvbV9zY21fb2NtZW1fdW5sb2NrKCkgLSBjYWxsIE9DTUVNIHVubG9jayBpbnRlcmZhY2Ug dG8gcmVsZWFzZSBhbiBPQ01FTQorICogcmVnaW9uIGZyb20gdGhlIHNwZWNpZmllZCBpbml0aWF0 b3IKKyAqCisgKiBAaWQ6ICAgICB0eiBpbml0aWF0b3IgaWQKKyAqIEBvZmZzZXQ6IE9DTUVNIG9m ZnNldAorICogQHNpemU6ICAgT0NNRU0gc2l6ZQorICovCitpbnQgcWNvbV9zY21fb2NtZW1fdW5s b2NrKGVudW0gcWNvbV9zY21fb2NtZW1fY2xpZW50IGlkLCB1MzIgb2Zmc2V0LCB1MzIgc2l6ZSkK K3sKKwlyZXR1cm4gX19xY29tX3NjbV9vY21lbV91bmxvY2soX19zY20tPmRldiwgaWQsIG9mZnNl dCwgc2l6ZSk7Cit9CitFWFBPUlRfU1lNQk9MKHFjb21fc2NtX29jbWVtX3VubG9jayk7CisKIC8q KgogICogcWNvbV9zY21fcGFzX2luaXRfaW1hZ2UoKSAtIEluaXRpYWxpemUgcGVyaXBoZXJhbCBh dXRoZW50aWNhdGlvbiBzZXJ2aWNlCiAgKgkJCSAgICAgICBzdGF0ZSBtYWNoaW5lIGZvciBhIGdp dmVuIHBlcmlwaGVyYWwsIHVzaW5nIHRoZQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9maXJtd2FyZS9x Y29tX3NjbS5oIGIvZHJpdmVycy9maXJtd2FyZS9xY29tX3NjbS5oCmluZGV4IDk5NTA2YmQ4NzNj MC4uZWYyOTNlZTY3ZWMxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Zpcm13YXJlL3Fjb21fc2NtLmgK KysrIGIvZHJpdmVycy9maXJtd2FyZS9xY29tX3NjbS5oCkBAIC00Miw2ICs0MiwxNSBAQCBleHRl cm4gaW50IF9fcWNvbV9zY21faGRjcF9yZXEoc3RydWN0IGRldmljZSAqZGV2LAogCiBleHRlcm4g dm9pZCBfX3Fjb21fc2NtX2luaXQodm9pZCk7CiAKKyNkZWZpbmUgUUNPTV9TQ01fT0NNRU1fU1ZD CQkJMHhmCisjZGVmaW5lIFFDT01fU0NNX09DTUVNX0xPQ0tfQ01ECQkweDEKKyNkZWZpbmUgUUNP TV9TQ01fT0NNRU1fVU5MT0NLX0NNRAkJMHgyCisKK2V4dGVybiBpbnQgX19xY29tX3NjbV9vY21l bV9sb2NrKHN0cnVjdCBkZXZpY2UgKmRldiwgdTMyIGlkLCB1MzIgb2Zmc2V0LAorCQkJCSB1MzIg c2l6ZSwgdTMyIG1vZGUpOworZXh0ZXJuIGludCBfX3Fjb21fc2NtX29jbWVtX3VubG9jayhzdHJ1 Y3QgZGV2aWNlICpkZXYsIHUzMiBpZCwgdTMyIG9mZnNldCwKKwkJCQkgICB1MzIgc2l6ZSk7CisK ICNkZWZpbmUgUUNPTV9TQ01fU1ZDX1BJTAkJMHgyCiAjZGVmaW5lIFFDT01fU0NNX1BBU19JTklU X0lNQUdFX0NNRAkweDEKICNkZWZpbmUgUUNPTV9TQ01fUEFTX01FTV9TRVRVUF9DTUQJMHgyCmRp ZmYgLS1naXQgYS9pbmNsdWRlL2xpbnV4L3Fjb21fc2NtLmggYi9pbmNsdWRlL2xpbnV4L3Fjb21f c2NtLmgKaW5kZXggMmQ1ZWZmNTA2ZTEzLi5iNDliNzM0ZDY2MmMgMTAwNjQ0Ci0tLSBhL2luY2x1 ZGUvbGludXgvcWNvbV9zY20uaAorKysgYi9pbmNsdWRlL2xpbnV4L3Fjb21fc2NtLmgKQEAgLTI0 LDYgKzI0LDE2IEBAIHN0cnVjdCBxY29tX3NjbV92bXBlcm0gewogCWludCBwZXJtOwogfTsKIAor ZW51bSBxY29tX3NjbV9vY21lbV9jbGllbnQgeworCVFDT01fU0NNX09DTUVNX1VOVVNFRF9JRCA9 IDB4MCwKKwlRQ09NX1NDTV9PQ01FTV9HUkFQSElDU19JRCwKKwlRQ09NX1NDTV9PQ01FTV9WSURF T19JRCwKKwlRQ09NX1NDTV9PQ01FTV9MUF9BVURJT19JRCwKKwlRQ09NX1NDTV9PQ01FTV9TRU5T T1JTX0lELAorCVFDT01fU0NNX09DTUVNX09USEVSX09TX0lELAorCVFDT01fU0NNX09DTUVNX0RF QlVHX0lELAorfTsKKwogI2RlZmluZSBRQ09NX1NDTV9WTUlEX0hMT1MgICAgICAgMHgzCiAjZGVm aW5lIFFDT01fU0NNX1ZNSURfTVNTX01TQSAgICAweEYKICNkZWZpbmUgUUNPTV9TQ01fVk1JRF9X TEFOICAgICAgIDB4MTgKQEAgLTQxLDYgKzUxLDExIEBAIGV4dGVybiBib29sIHFjb21fc2NtX2lz X2F2YWlsYWJsZSh2b2lkKTsKIGV4dGVybiBib29sIHFjb21fc2NtX2hkY3BfYXZhaWxhYmxlKHZv aWQpOwogZXh0ZXJuIGludCBxY29tX3NjbV9oZGNwX3JlcShzdHJ1Y3QgcWNvbV9zY21faGRjcF9y ZXEgKnJlcSwgdTMyIHJlcV9jbnQsCiAJCQkgICAgIHUzMiAqcmVzcCk7CitleHRlcm4gYm9vbCBx Y29tX3NjbV9vY21lbV9sb2NrX2F2YWlsYWJsZSh2b2lkKTsKK2V4dGVybiBpbnQgcWNvbV9zY21f b2NtZW1fbG9jayhlbnVtIHFjb21fc2NtX29jbWVtX2NsaWVudCBpZCwgdTMyIG9mZnNldCwKKwkJ CSAgICAgICB1MzIgc2l6ZSwgdTMyIG1vZGUpOworZXh0ZXJuIGludCBxY29tX3NjbV9vY21lbV91 bmxvY2soZW51bSBxY29tX3NjbV9vY21lbV9jbGllbnQgaWQsIHUzMiBvZmZzZXQsCisJCQkJIHUz MiBzaXplKTsKIGV4dGVybiBib29sIHFjb21fc2NtX3Bhc19zdXBwb3J0ZWQodTMyIHBlcmlwaGVy YWwpOwogZXh0ZXJuIGludCBxY29tX3NjbV9wYXNfaW5pdF9pbWFnZSh1MzIgcGVyaXBoZXJhbCwg Y29uc3Qgdm9pZCAqbWV0YWRhdGEsCiAJCQkJICAgc2l6ZV90IHNpemUpOwotLSAKMi4yMS4wCgpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpGcmVlZHJlbm8g bWFpbGluZyBsaXN0CkZyZWVkcmVub0BsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9mcmVlZHJlbm8=