From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Murray Subject: Re: [PATCH V3 2/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Date: Mon, 2 Sep 2019 11:41:08 +0100 Message-ID: <20190902104108.GC9720@e119886-lin.cambridge.arm.com> References: <20190828172850.19871-1-vidyas@nvidia.com> <20190828172850.19871-3-vidyas@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20190828172850.19871-3-vidyas@nvidia.com> Sender: linux-kernel-owner@vger.kernel.org To: Vidya Sagar Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, kishon@ti.com, gustavo.pimentel@synopsys.com, digetx@gmail.com, mperttunen@nvidia.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com List-Id: linux-tegra@vger.kernel.org On Wed, Aug 28, 2019 at 10:58:46PM +0530, Vidya Sagar wrote: > Add optional bindings "vpcie3v3-supply" and "vpcie12v-supply" to describe > regulators of a PCIe slot's supplies 3.3V and 12V provided the platform > is designed to have regulator controlled slot supplies. > > Signed-off-by: Vidya Sagar Reviewed-by: Andrew Murray > --- > V3: > * None > > V2: > * None > > .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > index 0ac1b867ac24..b739f92da58e 100644 > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > @@ -104,6 +104,12 @@ Optional properties: > specified in microseconds > - nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be > specified in microseconds > +- vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > +- vpcie12v-supply: A phandle to the regulator node that supplies 12V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > > Examples: > ========= > @@ -156,6 +162,8 @@ Tegra194: > 0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory (16GB) */ > > vddio-pex-ctl-supply = <&vdd_1v8ao>; > + vpcie3v3-supply = <&vdd_3v3_pcie>; > + vpcie12v-supply = <&vdd_12v_pcie>; > > phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>, > <&p2u_hsio_5>; > -- > 2.17.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B5E6C3A59E for ; Mon, 2 Sep 2019 10:41:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D218B217D7 for ; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i4jlr-0005WJ-LU; Mon, 02 Sep 2019 10:41:15 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i4jlo-0005VI-Cn for linux-arm-kernel@lists.infradead.org; Mon, 02 Sep 2019 10:41:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 123DC28; Mon, 2 Sep 2019 03:41:11 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 563FF3F246; Mon, 2 Sep 2019 03:41:10 -0700 (PDT) Date: Mon, 2 Sep 2019 11:41:08 +0100 From: Andrew Murray To: Vidya Sagar Subject: Re: [PATCH V3 2/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Message-ID: <20190902104108.GC9720@e119886-lin.cambridge.arm.com> References: <20190828172850.19871-1-vidyas@nvidia.com> <20190828172850.19871-3-vidyas@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190828172850.19871-3-vidyas@nvidia.com> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190902_034112_483558_038FFED5 X-CRM114-Status: GOOD ( 14.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com, mperttunen@nvidia.com, mmaddireddy@nvidia.com, kthota@nvidia.com, gustavo.pimentel@synopsys.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, kishon@ti.com, linux-tegra@vger.kernel.org, thierry.reding@gmail.com, linux-pci@vger.kernel.org, bhelgaas@google.com, digetx@gmail.com, jonathanh@nvidia.com, linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Aug 28, 2019 at 10:58:46PM +0530, Vidya Sagar wrote: > Add optional bindings "vpcie3v3-supply" and "vpcie12v-supply" to describe > regulators of a PCIe slot's supplies 3.3V and 12V provided the platform > is designed to have regulator controlled slot supplies. > > Signed-off-by: Vidya Sagar Reviewed-by: Andrew Murray > --- > V3: > * None > > V2: > * None > > .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > index 0ac1b867ac24..b739f92da58e 100644 > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt > @@ -104,6 +104,12 @@ Optional properties: > specified in microseconds > - nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be > specified in microseconds > +- vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > +- vpcie12v-supply: A phandle to the regulator node that supplies 12V to the slot > + if the platform has one such slot. (Ex:- x16 slot owned by C5 controller > + in p2972-0000 platform). > > Examples: > ========= > @@ -156,6 +162,8 @@ Tegra194: > 0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory (16GB) */ > > vddio-pex-ctl-supply = <&vdd_1v8ao>; > + vpcie3v3-supply = <&vdd_3v3_pcie>; > + vpcie12v-supply = <&vdd_12v_pcie>; > > phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>, > <&p2u_hsio_5>; > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel