* [PATCH 0/4] drm/i915: deconflate display disable from no display
@ 2019-09-02 18:08 Jani Nikula
2019-09-02 18:08 ` [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it Jani Nikula
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Jani Nikula @ 2019-09-02 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Deconflate not having display hardware from having disabled display
hardware, with some collateral improvements.
This doesn't actually fix any of the issues resulting from the two being
conflated, but unblocks fixing both independently.
Read the commit messages for details.
BR,
Jani.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Jani Nikula (4):
drm/i915: add INTEL_NUM_PIPES() and use it
drm/i915: convert device info num_pipes to pipe_mask
drm/i915: introduce INTEL_DISPLAY_ENABLED()
drm/i915: stop conflating HAS_DISPLAY() and disabled display
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 30 ++++++++++---------
drivers/gpu/drm/i915/display/intel_display.h | 4 +--
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +-
.../gpu/drm/i915/display/intel_lpe_audio.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 10 +++----
drivers/gpu/drm/i915/i915_drv.h | 7 ++++-
drivers/gpu/drm/i915/i915_pci.c | 24 +++++++--------
drivers/gpu/drm/i915/intel_device_info.c | 16 ++++------
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
drivers/gpu/drm/i915/intel_pch.c | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 6 ++--
13 files changed, 56 insertions(+), 53 deletions(-)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
@ 2019-09-02 18:08 ` Jani Nikula
2019-09-04 23:35 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask Jani Nikula
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2019-09-02 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Abstract away direct access to ->num_pipes to allow further
refactoring. No functional changes.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_display.h | 4 ++--
drivers/gpu/drm/i915/display/intel_lpe_audio.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +++-
drivers/gpu/drm/i915/intel_pm.c | 6 +++---
6 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e661e2099118..e480ffe0ae6e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7188,7 +7188,7 @@ static int ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
}
}
- if (INTEL_INFO(dev_priv)->num_pipes == 2)
+ if (INTEL_NUM_PIPES(dev_priv) == 2)
return 0;
/* Ivybridge 3 pipe is really complicated */
@@ -9572,7 +9572,7 @@ static void ironlake_compute_dpll(struct intel_crtc *crtc,
* clear if it''s a win or loss power wise. No point in doing
* this on ILK at all since it has a fixed DPLL<->pipe mapping.
*/
- if (INTEL_INFO(dev_priv)->num_pipes == 3 &&
+ if (INTEL_NUM_PIPES(dev_priv) == 3 &&
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
dpll |= DPLL_SDVO_HIGH_SPEED;
@@ -13863,7 +13863,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
entries,
- INTEL_INFO(dev_priv)->num_pipes, i))
+ INTEL_NUM_PIPES(dev_priv), i))
continue;
updated |= cmask;
@@ -16214,8 +16214,8 @@ int intel_modeset_init(struct drm_device *dev)
}
DRM_DEBUG_KMS("%d display pipe%s available.\n",
- INTEL_INFO(dev_priv)->num_pipes,
- INTEL_INFO(dev_priv)->num_pipes > 1 ? "s" : "");
+ INTEL_NUM_PIPES(dev_priv),
+ INTEL_NUM_PIPES(dev_priv) > 1 ? "s" : "");
for_each_pipe(dev_priv, pipe) {
ret = intel_crtc_init(dev_priv, pipe);
@@ -17306,7 +17306,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
if (!error)
return;
- err_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev_priv)->num_pipes);
+ err_printf(m, "Num Pipes: %d\n", INTEL_NUM_PIPES(dev_priv));
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
err_printf(m, "PWR_WELL_CTL2: %08x\n",
error->power_well_driver);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 33fd523c4622..f4ddde171655 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -307,10 +307,10 @@ enum phy_fia {
};
#define for_each_pipe(__dev_priv, __p) \
- for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
+ for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
#define for_each_pipe_masked(__dev_priv, __p, __mask) \
- for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++) \
+ for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
for_each_if((__mask) & BIT(__p))
#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
index b19800b58442..0b67f7887cd0 100644
--- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
@@ -114,7 +114,7 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
pinfo.size_data = sizeof(*pdata);
pinfo.dma_mask = DMA_BIT_MASK(32);
- pdata->num_pipes = INTEL_INFO(dev_priv)->num_pipes;
+ pdata->num_pipes = INTEL_NUM_PIPES(dev_priv);
pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */
pdata->port[0].pipe = -1;
pdata->port[1].pipe = -1;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index bec25942d77d..cad4d6ba2d2c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -340,7 +340,7 @@ static int i915_driver_modeset_probe(struct drm_device *dev)
if (HAS_DISPLAY(dev_priv)) {
ret = drm_vblank_init(&dev_priv->drm,
- INTEL_INFO(dev_priv)->num_pipes);
+ INTEL_NUM_PIPES(dev_priv));
if (ret)
goto out;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index db7480831e52..f4fc72e2118c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2182,7 +2182,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define GT_FREQUENCY_MULTIPLIER 50
#define GEN9_FREQ_SCALER 3
-#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->num_pipes > 0)
+#define INTEL_NUM_PIPES(dev_priv) (INTEL_INFO(dev_priv)->num_pipes)
+
+#define HAS_DISPLAY(dev_priv) (INTEL_NUM_PIPES(dev_priv) > 0)
static inline bool intel_vtd_active(void)
{
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4fa9bc83c8b4..6211f9d74f3a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1909,7 +1909,7 @@ static int vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
for (level = 0; level < wm_state->num_levels; level++) {
const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level];
- const int sr_fifo_size = INTEL_INFO(dev_priv)->num_pipes * 512 - 1;
+ const int sr_fifo_size = INTEL_NUM_PIPES(dev_priv) * 512 - 1;
if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))
break;
@@ -2648,7 +2648,7 @@ static unsigned int ilk_plane_wm_max(const struct drm_i915_private *dev_priv,
/* HSW allows LP1+ watermarks even with multiple pipes */
if (level == 0 || config->num_pipes_active > 1) {
- fifo_size /= INTEL_INFO(dev_priv)->num_pipes;
+ fifo_size /= INTEL_NUM_PIPES(dev_priv);
/*
* For some reason the non self refresh
@@ -9728,7 +9728,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
dev_priv->display.update_wm = i9xx_update_wm;
dev_priv->display.get_fifo_size = i9xx_get_fifo_size;
} else if (IS_GEN(dev_priv, 2)) {
- if (INTEL_INFO(dev_priv)->num_pipes == 1) {
+ if (INTEL_NUM_PIPES(dev_priv) == 1) {
dev_priv->display.update_wm = i845_update_wm;
dev_priv->display.get_fifo_size = i845_get_fifo_size;
} else {
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
2019-09-02 18:08 ` [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it Jani Nikula
@ 2019-09-02 18:08 ` Jani Nikula
2019-09-04 23:35 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED() Jani Nikula
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2019-09-02 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Replace device info number of pipes with a bit mask of available
pipes. This will prove handy in the future. There's still a bunch of
future work to do to actually allow a non-consecutive mask of pipes, but
it's a start. No functional changes.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_pci.c | 24 ++++++++++++------------
drivers/gpu/drm/i915/intel_device_info.c | 10 +++++-----
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
4 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f4fc72e2118c..6557cd8ddd7a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2182,9 +2182,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define GT_FREQUENCY_MULTIPLIER 50
#define GEN9_FREQ_SCALER 3
-#define INTEL_NUM_PIPES(dev_priv) (INTEL_INFO(dev_priv)->num_pipes)
+#define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)->pipe_mask))
-#define HAS_DISPLAY(dev_priv) (INTEL_NUM_PIPES(dev_priv) > 0)
+#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
static inline bool intel_vtd_active(void)
{
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index fbe98a2db88e..17ddc03df005 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -147,7 +147,7 @@
#define I830_FEATURES \
GEN(2), \
.is_mobile = 1, \
- .num_pipes = 2, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.has_overlay = 1, \
.display.cursor_needs_physical = 1, \
.display.overlay_needs_physical = 1, \
@@ -165,7 +165,7 @@
#define I845_FEATURES \
GEN(2), \
- .num_pipes = 1, \
+ .pipe_mask = BIT(PIPE_A), \
.display.has_overlay = 1, \
.display.overlay_needs_physical = 1, \
.display.has_gmch = 1, \
@@ -203,7 +203,7 @@ static const struct intel_device_info intel_i865g_info = {
#define GEN3_FEATURES \
GEN(3), \
- .num_pipes = 2, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
.engine_mask = BIT(RCS0), \
@@ -287,7 +287,7 @@ static const struct intel_device_info intel_pineview_m_info = {
#define GEN4_FEATURES \
GEN(4), \
- .num_pipes = 2, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.has_hotplug = 1, \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
@@ -337,7 +337,7 @@ static const struct intel_device_info intel_gm45_info = {
#define GEN5_FEATURES \
GEN(5), \
- .num_pipes = 2, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0), \
.has_snoop = true, \
@@ -363,7 +363,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
#define GEN6_FEATURES \
GEN(6), \
- .num_pipes = 2, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -411,7 +411,7 @@ static const struct intel_device_info intel_sandybridge_m_gt2_info = {
#define GEN7_FEATURES \
GEN(7), \
- .num_pipes = 3, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -462,7 +462,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
GEN7_FEATURES,
PLATFORM(INTEL_IVYBRIDGE),
.gt = 2,
- .num_pipes = 0, /* legal, last one wins */
+ .pipe_mask = 0, /* legal, last one wins */
.has_l3_dpf = 1,
};
@@ -470,7 +470,7 @@ static const struct intel_device_info intel_valleyview_info = {
PLATFORM(INTEL_VALLEYVIEW),
GEN(7),
.is_lp = 1,
- .num_pipes = 2,
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.has_runtime_pm = 1,
.has_rc6 = 1,
.has_rps = true,
@@ -560,7 +560,7 @@ static const struct intel_device_info intel_broadwell_gt3_info = {
static const struct intel_device_info intel_cherryview_info = {
PLATFORM(INTEL_CHERRYVIEW),
GEN(8),
- .num_pipes = 3,
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
.display.has_hotplug = 1,
.is_lp = 1,
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
@@ -631,7 +631,7 @@ static const struct intel_device_info intel_skylake_gt4_info = {
.is_lp = 1, \
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
- .num_pipes = 3, \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
.has_64bit_reloc = 1, \
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
@@ -792,7 +792,7 @@ static const struct intel_device_info intel_elkhartlake_info = {
static const struct intel_device_info intel_tigerlake_12_info = {
GEN12_FEATURES,
PLATFORM(INTEL_TIGERLAKE),
- .num_pipes = 4,
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
.require_force_probe = 1,
.display.has_modular_fia = 1,
.engine_mask =
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index d9b5baaef5d0..50b05a5de53b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -896,7 +896,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
if (i915_modparams.disable_display) {
DRM_INFO("Display disabled (module parameter)\n");
- info->num_pipes = 0;
+ info->pipe_mask = 0;
} else if (HAS_DISPLAY(dev_priv) &&
(IS_GEN_RANGE(dev_priv, 7, 8)) &&
HAS_PCH_SPLIT(dev_priv)) {
@@ -917,14 +917,14 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
(HAS_PCH_CPT(dev_priv) &&
!(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
DRM_INFO("Display fused off, disabling\n");
- info->num_pipes = 0;
+ info->pipe_mask = 0;
} else if (fuse_strap & IVB_PIPE_C_DISABLE) {
DRM_INFO("PipeC fused off\n");
- info->num_pipes -= 1;
+ info->pipe_mask &= ~BIT(PIPE_C);
}
} else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
u32 dfsm = I915_READ(SKL_DFSM);
- u8 enabled_mask = BIT(info->num_pipes) - 1;
+ u8 enabled_mask = info->pipe_mask;
if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
enabled_mask &= ~BIT(PIPE_A);
@@ -945,7 +945,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
DRM_ERROR("invalid pipe fuse configuration: enabled_mask=0x%x\n",
enabled_mask);
else
- info->num_pipes = hweight8(enabled_mask);
+ info->pipe_mask = enabled_mask;
}
/* Initialize slice/subslice/EU info */
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 92e0c2e0954c..d4c288860aed 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -161,7 +161,7 @@ struct intel_device_info {
u32 display_mmio_offset;
- u8 num_pipes;
+ u8 pipe_mask;
#define DEFINE_FLAG(name) u8 name:1
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED()
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
2019-09-02 18:08 ` [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it Jani Nikula
2019-09-02 18:08 ` [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask Jani Nikula
@ 2019-09-02 18:08 ` Jani Nikula
2019-09-05 0:00 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display Jani Nikula
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2019-09-02 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Prepare for making a distinction between not having display and having
disabled display. Add INTEL_DISPLAY_ENABLED() and use it where
HAS_DISPLAY() is used. This is initially duplication, as disabling
display still leads to ->pipe_mask = 0 and HAS_DISPLAY() being false.
Since INTEL_DISPLAY_ENABLED() will not make sense unless HAS_DISPLAY()
is true, include a warning for catching misuses making decisions on
INTEL_DISPLAY_ENABLED() when HAS_DISPLAY() is false.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 8 ++++----
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/intel_pch.c | 2 +-
7 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index efb39f350b19..1def550c68c8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1833,7 +1833,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
const struct bdb_header *bdb;
u8 __iomem *bios = NULL;
- if (!HAS_DISPLAY(dev_priv)) {
+ if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
return;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e480ffe0ae6e..c3bb18afe6d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15324,7 +15324,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
intel_pps_init(dev_priv);
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return;
if (INTEL_GEN(dev_priv) >= 12) {
@@ -17227,7 +17227,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error->transcoder));
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return NULL;
error = kzalloc(sizeof(*error), GFP_ATOMIC);
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index d59eee5c5d9c..68338669f054 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -444,7 +444,7 @@ int intel_fbdev_init(struct drm_device *dev)
struct intel_fbdev *ifbdev;
int ret;
- if (WARN_ON(!HAS_DISPLAY(dev_priv)))
+ if (WARN_ON(!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)))
return -ENODEV;
ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index d6775a005726..3d4d19ac1d14 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -836,7 +836,7 @@ int intel_gmbus_setup(struct drm_i915_private *dev_priv)
unsigned int pin;
int ret;
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return 0;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index cad4d6ba2d2c..f7266d405978 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -338,7 +338,7 @@ static int i915_driver_modeset_probe(struct drm_device *dev)
if (i915_inject_probe_failure(dev_priv))
return -ENODEV;
- if (HAS_DISPLAY(dev_priv)) {
+ if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
ret = drm_vblank_init(&dev_priv->drm,
INTEL_NUM_PIPES(dev_priv));
if (ret)
@@ -389,7 +389,7 @@ static int i915_driver_modeset_probe(struct drm_device *dev)
intel_overlay_setup(dev_priv);
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return 0;
ret = intel_fbdev_init(dev);
@@ -1381,7 +1381,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
} else
DRM_ERROR("Failed to register driver for userspace access!\n");
- if (HAS_DISPLAY(dev_priv)) {
+ if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
/* Must be done after probing outputs */
intel_opregion_register(dev_priv);
acpi_video_register();
@@ -1405,7 +1405,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
* We need to coordinate the hotplugs with the asynchronous fbdev
* configuration, for which we use the fbdev->async_cookie.
*/
- if (HAS_DISPLAY(dev_priv))
+ if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv))
drm_kms_helper_poll_init(dev);
intel_power_domains_enable(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6557cd8ddd7a..ee84370ff7c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2186,6 +2186,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
+/* Only valid when HAS_DISPLAY() is true */
+#define INTEL_DISPLAY_ENABLED(dev_priv) (WARN_ON(!HAS_DISPLAY(dev_priv)), !i915_modparams.disable_display)
+
static inline bool intel_vtd_active(void)
{
#ifdef CONFIG_INTEL_IOMMU
diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index fa864d8f2b73..111867569efd 100644
--- a/drivers/gpu/drm/i915/intel_pch.c
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -188,7 +188,7 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
* Use PCH_NOP (PCH but no South Display) for PCH platforms without
* display.
*/
- if (pch && !HAS_DISPLAY(dev_priv)) {
+ if (pch && (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))) {
DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
dev_priv->pch_type = PCH_NOP;
dev_priv->pch_id = 0;
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
` (2 preceding siblings ...)
2019-09-02 18:08 ` [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED() Jani Nikula
@ 2019-09-02 18:08 ` Jani Nikula
2019-09-04 23:57 ` Souza, Jose
2019-09-02 18:13 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: deconflate display disable from no display Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Jani Nikula @ 2019-09-02 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Stop setting ->pipe_mask to zero when display is disabled, allowing us
to have different code paths for not actually having display hardware,
and having display hardware disabled. This lets us develop those two
avenues independently.
There are no functional changes for when there is no display. However,
all uses of for_each_pipe() and for_each_pipe_masked() will start
running for the disabled display case. Put one of the more significant
ones behind checks for INTEL_DISPLAY_ENABLED(), otherwise the cases
should not be hit with disabled display, or they seem benign. Fingers
crossed.
All in all, this might not be the ideal solution. In fact we may have
had something along the lines of this in the past, but we ended up
conflating the two cases. Possibly even by recommendation by yours
truly; I did not dare dig up that part of the history. But the perfect
is the enemy of the good, this is a straightforward change, and lets us
get actual work done in both fronts without interfering with each other.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++-----
drivers/gpu/drm/i915/intel_device_info.c | 8 ++------
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c3bb18afe6d7..15f00dee6368 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16217,11 +16217,13 @@ int intel_modeset_init(struct drm_device *dev)
INTEL_NUM_PIPES(dev_priv),
INTEL_NUM_PIPES(dev_priv) > 1 ? "s" : "");
- for_each_pipe(dev_priv, pipe) {
- ret = intel_crtc_init(dev_priv, pipe);
- if (ret) {
- drm_mode_config_cleanup(dev);
- return ret;
+ if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
+ for_each_pipe(dev_priv, pipe) {
+ ret = intel_crtc_init(dev_priv, pipe);
+ if (ret) {
+ drm_mode_config_cleanup(dev);
+ return ret;
+ }
}
}
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 50b05a5de53b..5d2da7e68a60 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -894,12 +894,8 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
runtime->num_sprites[pipe] = 1;
}
- if (i915_modparams.disable_display) {
- DRM_INFO("Display disabled (module parameter)\n");
- info->pipe_mask = 0;
- } else if (HAS_DISPLAY(dev_priv) &&
- (IS_GEN_RANGE(dev_priv, 7, 8)) &&
- HAS_PCH_SPLIT(dev_priv)) {
+ if (HAS_DISPLAY(dev_priv) && IS_GEN_RANGE(dev_priv, 7, 8) &&
+ HAS_PCH_SPLIT(dev_priv)) {
u32 fuse_strap = I915_READ(FUSE_STRAP);
u32 sfuse_strap = I915_READ(SFUSE_STRAP);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: deconflate display disable from no display
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
` (3 preceding siblings ...)
2019-09-02 18:08 ` [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display Jani Nikula
@ 2019-09-02 18:13 ` Patchwork
2019-09-02 18:37 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-09-05 12:28 ` [PATCH 0/4] " Ville Syrjälä
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2019-09-02 18:13 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: deconflate display disable from no display
URL : https://patchwork.freedesktop.org/series/66135/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a903450383fb drm/i915: add INTEL_NUM_PIPES() and use it
f3f10b13127d drm/i915: convert device info num_pipes to pipe_mask
70a2a78c083a drm/i915: introduce INTEL_DISPLAY_ENABLED()
-:133: WARNING:LONG_LINE: line over 100 characters
#133: FILE: drivers/gpu/drm/i915/i915_drv.h:2190:
+#define INTEL_DISPLAY_ENABLED(dev_priv) (WARN_ON(!HAS_DISPLAY(dev_priv)), !i915_modparams.disable_display)
total: 0 errors, 1 warnings, 0 checks, 89 lines checked
442ed634ab9f drm/i915: stop conflating HAS_DISPLAY() and disabled display
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: deconflate display disable from no display
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
` (4 preceding siblings ...)
2019-09-02 18:13 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: deconflate display disable from no display Patchwork
@ 2019-09-02 18:37 ` Patchwork
2019-09-05 12:28 ` [PATCH 0/4] " Ville Syrjälä
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2019-09-02 18:37 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: deconflate display disable from no display
URL : https://patchwork.freedesktop.org/series/66135/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6821 -> Patchwork_14259
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14259 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14259, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14259:
### IGT changes ###
#### Possible regressions ####
* igt@i915_pm_rpm@module-reload:
- fi-cfl-8700k: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-8700k/igt@i915_pm_rpm@module-reload.html
- fi-kbl-x1275: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
- fi-skl-guc: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-guc/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-guc/igt@i915_pm_rpm@module-reload.html
- fi-cfl-guc: [PASS][7] -> [DMESG-WARN][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-cfl-guc/igt@i915_pm_rpm@module-reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-guc/igt@i915_pm_rpm@module-reload.html
- fi-skl-iommu: [PASS][9] -> [DMESG-WARN][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-iommu/igt@i915_pm_rpm@module-reload.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-iommu/igt@i915_pm_rpm@module-reload.html
- fi-whl-u: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-whl-u/igt@i915_pm_rpm@module-reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-whl-u/igt@i915_pm_rpm@module-reload.html
- fi-skl-6260u: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-6260u/igt@i915_pm_rpm@module-reload.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-6260u/igt@i915_pm_rpm@module-reload.html
- fi-skl-6770hq: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
- fi-bdw-5557u: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-bdw-5557u/igt@i915_pm_rpm@module-reload.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-bdw-5557u/igt@i915_pm_rpm@module-reload.html
- fi-kbl-r: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-r/igt@i915_pm_rpm@module-reload.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-r/igt@i915_pm_rpm@module-reload.html
- fi-skl-lmem: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-lmem/igt@i915_pm_rpm@module-reload.html
- fi-hsw-peppy: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-hsw-peppy/igt@i915_pm_rpm@module-reload.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-hsw-peppy/igt@i915_pm_rpm@module-reload.html
- fi-cfl-8109u: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
- fi-skl-6600u: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
- fi-skl-6700k2: [PASS][29] -> [DMESG-WARN][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-6700k2/igt@i915_pm_rpm@module-reload.html
- fi-cml-u2: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-cml-u2/igt@i915_pm_rpm@module-reload.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cml-u2/igt@i915_pm_rpm@module-reload.html
- fi-kbl-guc: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
- fi-kbl-7500u: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-7500u/igt@i915_pm_rpm@module-reload.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-7500u/igt@i915_pm_rpm@module-reload.html
- fi-kbl-8809g: [PASS][37] -> [DMESG-WARN][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-8809g/igt@i915_pm_rpm@module-reload.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-8809g/igt@i915_pm_rpm@module-reload.html
* igt@runner@aborted:
- fi-cfl-8109u: NOTRUN -> [FAIL][39]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-8109u/igt@runner@aborted.html
- fi-whl-u: NOTRUN -> [FAIL][40]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-whl-u/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][41]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cml-u2/igt@runner@aborted.html
- fi-cfl-guc: NOTRUN -> [FAIL][42]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-guc/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][43]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-cfl-8700k/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rpm@module-reload:
- {fi-kbl-soraka}: [PASS][44] -> [DMESG-WARN][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-soraka/igt@i915_pm_rpm@module-reload.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-soraka/igt@i915_pm_rpm@module-reload.html
Known issues
------------
Here are the changes found in Patchwork_14259 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_reset:
- fi-icl-u2: [PASS][46] -> [INCOMPLETE][47] ([fdo#107713])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-icl-u2/igt@i915_selftest@live_reset.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-icl-u2/igt@i915_selftest@live_reset.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [PASS][48] -> [FAIL][49] ([fdo#103167])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_ringfill@basic-default:
- fi-icl-u3: [DMESG-WARN][50] ([fdo#107724]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-icl-u3/igt@gem_ringfill@basic-default.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-icl-u3/igt@gem_ringfill@basic-default.html
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][52] ([fdo#107724] / [fdo#111214]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-icl-u3/igt@i915_module_load@reload.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-icl-u3/igt@i915_module_load@reload.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][54] ([fdo#111108]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_frontbuffer_tracking@basic:
- {fi-icl-guc}: [FAIL][56] ([fdo#103167]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-icl-guc/igt@kms_frontbuffer_tracking@basic.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-icl-guc/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][58] ([fdo#111407]) -> [FAIL][59] ([fdo#111096])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6821/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
Participating hosts (53 -> 46)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6821 -> Patchwork_14259
CI-20190529: 20190529
CI_DRM_6821: 62659d8a3af61190f79ceca1be30f0d7e7582ade @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5162: e62ea305fdba2a9cd0dadfa527b54529cb0d1438 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14259: 442ed634ab9f309cb16e6f904f5680ccfa1a6a1c @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
442ed634ab9f drm/i915: stop conflating HAS_DISPLAY() and disabled display
70a2a78c083a drm/i915: introduce INTEL_DISPLAY_ENABLED()
f3f10b13127d drm/i915: convert device info num_pipes to pipe_mask
a903450383fb drm/i915: add INTEL_NUM_PIPES() and use it
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14259/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it
2019-09-02 18:08 ` [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it Jani Nikula
@ 2019-09-04 23:35 ` Souza, Jose
0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2019-09-04 23:35 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Abstract away direct access to ->num_pipes to allow further
> refactoring. No functional changes.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++------
> drivers/gpu/drm/i915/display/intel_display.h | 4 ++--
> drivers/gpu/drm/i915/display/intel_lpe_audio.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 4 +++-
> drivers/gpu/drm/i915/intel_pm.c | 6 +++---
> 6 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e661e2099118..e480ffe0ae6e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7188,7 +7188,7 @@ static int ironlake_check_fdi_lanes(struct
> drm_device *dev, enum pipe pipe,
> }
> }
>
> - if (INTEL_INFO(dev_priv)->num_pipes == 2)
> + if (INTEL_NUM_PIPES(dev_priv) == 2)
> return 0;
>
> /* Ivybridge 3 pipe is really complicated */
> @@ -9572,7 +9572,7 @@ static void ironlake_compute_dpll(struct
> intel_crtc *crtc,
> * clear if it''s a win or loss power wise. No point in doing
> * this on ILK at all since it has a fixed DPLL<->pipe mapping.
> */
> - if (INTEL_INFO(dev_priv)->num_pipes == 3 &&
> + if (INTEL_NUM_PIPES(dev_priv) == 3 &&
> intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
> dpll |= DPLL_SDVO_HIGH_SPEED;
>
> @@ -13863,7 +13863,7 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
>
> if
> (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> entries,
> - INTEL_INFO(dev_
> priv)->num_pipes, i))
> + INTEL_NUM_PIPES
> (dev_priv), i))
> continue;
>
> updated |= cmask;
> @@ -16214,8 +16214,8 @@ int intel_modeset_init(struct drm_device
> *dev)
> }
>
> DRM_DEBUG_KMS("%d display pipe%s available.\n",
> - INTEL_INFO(dev_priv)->num_pipes,
> - INTEL_INFO(dev_priv)->num_pipes > 1 ? "s" : "");
> + INTEL_NUM_PIPES(dev_priv),
> + INTEL_NUM_PIPES(dev_priv) > 1 ? "s" : "");
>
> for_each_pipe(dev_priv, pipe) {
> ret = intel_crtc_init(dev_priv, pipe);
> @@ -17306,7 +17306,7 @@ intel_display_print_error_state(struct
> drm_i915_error_state_buf *m,
> if (!error)
> return;
>
> - err_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev_priv)-
> >num_pipes);
> + err_printf(m, "Num Pipes: %d\n", INTEL_NUM_PIPES(dev_priv));
> if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> err_printf(m, "PWR_WELL_CTL2: %08x\n",
> error->power_well_driver);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 33fd523c4622..f4ddde171655 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -307,10 +307,10 @@ enum phy_fia {
> };
>
> #define for_each_pipe(__dev_priv, __p) \
> - for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes;
> (__p)++)
> + for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
>
> #define for_each_pipe_masked(__dev_priv, __p, __mask) \
> - for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes;
> (__p)++) \
> + for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
> for_each_if((__mask) & BIT(__p))
>
> #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
> diff --git a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> index b19800b58442..0b67f7887cd0 100644
> --- a/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.c
> @@ -114,7 +114,7 @@ lpe_audio_platdev_create(struct drm_i915_private
> *dev_priv)
> pinfo.size_data = sizeof(*pdata);
> pinfo.dma_mask = DMA_BIT_MASK(32);
>
> - pdata->num_pipes = INTEL_INFO(dev_priv)->num_pipes;
> + pdata->num_pipes = INTEL_NUM_PIPES(dev_priv);
> pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or
> B,C */
> pdata->port[0].pipe = -1;
> pdata->port[1].pipe = -1;
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index bec25942d77d..cad4d6ba2d2c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -340,7 +340,7 @@ static int i915_driver_modeset_probe(struct
> drm_device *dev)
>
> if (HAS_DISPLAY(dev_priv)) {
> ret = drm_vblank_init(&dev_priv->drm,
> - INTEL_INFO(dev_priv)->num_pipes);
> + INTEL_NUM_PIPES(dev_priv));
> if (ret)
> goto out;
> }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index db7480831e52..f4fc72e2118c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2182,7 +2182,9 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
> #define GT_FREQUENCY_MULTIPLIER 50
> #define GEN9_FREQ_SCALER 3
>
> -#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->num_pipes > 0)
> +#define INTEL_NUM_PIPES(dev_priv) (INTEL_INFO(dev_priv)->num_pipes)
> +
> +#define HAS_DISPLAY(dev_priv) (INTEL_NUM_PIPES(dev_priv) > 0)
>
> static inline bool intel_vtd_active(void)
> {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 4fa9bc83c8b4..6211f9d74f3a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1909,7 +1909,7 @@ static int vlv_compute_pipe_wm(struct
> intel_crtc_state *crtc_state)
>
> for (level = 0; level < wm_state->num_levels; level++) {
> const struct g4x_pipe_wm *raw = &crtc_state-
> >wm.vlv.raw[level];
> - const int sr_fifo_size = INTEL_INFO(dev_priv)-
> >num_pipes * 512 - 1;
> + const int sr_fifo_size = INTEL_NUM_PIPES(dev_priv) *
> 512 - 1;
>
> if (!vlv_raw_crtc_wm_is_valid(crtc_state, level))
> break;
> @@ -2648,7 +2648,7 @@ static unsigned int ilk_plane_wm_max(const
> struct drm_i915_private *dev_priv,
>
> /* HSW allows LP1+ watermarks even with multiple pipes */
> if (level == 0 || config->num_pipes_active > 1) {
> - fifo_size /= INTEL_INFO(dev_priv)->num_pipes;
> + fifo_size /= INTEL_NUM_PIPES(dev_priv);
>
> /*
> * For some reason the non self refresh
> @@ -9728,7 +9728,7 @@ void intel_init_pm(struct drm_i915_private
> *dev_priv)
> dev_priv->display.update_wm = i9xx_update_wm;
> dev_priv->display.get_fifo_size = i9xx_get_fifo_size;
> } else if (IS_GEN(dev_priv, 2)) {
> - if (INTEL_INFO(dev_priv)->num_pipes == 1) {
> + if (INTEL_NUM_PIPES(dev_priv) == 1) {
> dev_priv->display.update_wm = i845_update_wm;
> dev_priv->display.get_fifo_size =
> i845_get_fifo_size;
> } else {
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask
2019-09-02 18:08 ` [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask Jani Nikula
@ 2019-09-04 23:35 ` Souza, Jose
0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2019-09-04 23:35 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Replace device info number of pipes with a bit mask of available
> pipes. This will prove handy in the future. There's still a bunch of
> future work to do to actually allow a non-consecutive mask of pipes,
> but
> it's a start. No functional changes.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 ++--
> drivers/gpu/drm/i915/i915_pci.c | 24 ++++++++++++--------
> ----
> drivers/gpu/drm/i915/intel_device_info.c | 10 +++++-----
> drivers/gpu/drm/i915/intel_device_info.h | 2 +-
> 4 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index f4fc72e2118c..6557cd8ddd7a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2182,9 +2182,9 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
> #define GT_FREQUENCY_MULTIPLIER 50
> #define GEN9_FREQ_SCALER 3
>
> -#define INTEL_NUM_PIPES(dev_priv) (INTEL_INFO(dev_priv)->num_pipes)
> +#define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)-
> >pipe_mask))
>
> -#define HAS_DISPLAY(dev_priv) (INTEL_NUM_PIPES(dev_priv) > 0)
> +#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
>
> static inline bool intel_vtd_active(void)
> {
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index fbe98a2db88e..17ddc03df005 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -147,7 +147,7 @@
> #define I830_FEATURES \
> GEN(2), \
> .is_mobile = 1, \
> - .num_pipes = 2, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> .display.has_overlay = 1, \
> .display.cursor_needs_physical = 1, \
> .display.overlay_needs_physical = 1, \
> @@ -165,7 +165,7 @@
>
> #define I845_FEATURES \
> GEN(2), \
> - .num_pipes = 1, \
> + .pipe_mask = BIT(PIPE_A), \
> .display.has_overlay = 1, \
> .display.overlay_needs_physical = 1, \
> .display.has_gmch = 1, \
> @@ -203,7 +203,7 @@ static const struct intel_device_info
> intel_i865g_info = {
>
> #define GEN3_FEATURES \
> GEN(3), \
> - .num_pipes = 2, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> .display.has_gmch = 1, \
> .gpu_reset_clobbers_display = true, \
> .engine_mask = BIT(RCS0), \
> @@ -287,7 +287,7 @@ static const struct intel_device_info
> intel_pineview_m_info = {
>
> #define GEN4_FEATURES \
> GEN(4), \
> - .num_pipes = 2, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> .display.has_hotplug = 1, \
> .display.has_gmch = 1, \
> .gpu_reset_clobbers_display = true, \
> @@ -337,7 +337,7 @@ static const struct intel_device_info
> intel_gm45_info = {
>
> #define GEN5_FEATURES \
> GEN(5), \
> - .num_pipes = 2, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> .display.has_hotplug = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0), \
> .has_snoop = true, \
> @@ -363,7 +363,7 @@ static const struct intel_device_info
> intel_ironlake_m_info = {
>
> #define GEN6_FEATURES \
> GEN(6), \
> - .num_pipes = 2, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> .display.has_hotplug = 1, \
> .display.has_fbc = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> @@ -411,7 +411,7 @@ static const struct intel_device_info
> intel_sandybridge_m_gt2_info = {
>
> #define GEN7_FEATURES \
> GEN(7), \
> - .num_pipes = 3, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
> .display.has_hotplug = 1, \
> .display.has_fbc = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> @@ -462,7 +462,7 @@ static const struct intel_device_info
> intel_ivybridge_q_info = {
> GEN7_FEATURES,
> PLATFORM(INTEL_IVYBRIDGE),
> .gt = 2,
> - .num_pipes = 0, /* legal, last one wins */
> + .pipe_mask = 0, /* legal, last one wins */
> .has_l3_dpf = 1,
> };
>
> @@ -470,7 +470,7 @@ static const struct intel_device_info
> intel_valleyview_info = {
> PLATFORM(INTEL_VALLEYVIEW),
> GEN(7),
> .is_lp = 1,
> - .num_pipes = 2,
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> .has_runtime_pm = 1,
> .has_rc6 = 1,
> .has_rps = true,
> @@ -560,7 +560,7 @@ static const struct intel_device_info
> intel_broadwell_gt3_info = {
> static const struct intel_device_info intel_cherryview_info = {
> PLATFORM(INTEL_CHERRYVIEW),
> GEN(8),
> - .num_pipes = 3,
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> .display.has_hotplug = 1,
> .is_lp = 1,
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
> @@ -631,7 +631,7 @@ static const struct intel_device_info
> intel_skylake_gt4_info = {
> .is_lp = 1, \
> .display.has_hotplug = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
> \
> - .num_pipes = 3, \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
> .has_64bit_reloc = 1, \
> .display.has_ddi = 1, \
> .has_fpga_dbg = 1, \
> @@ -792,7 +792,7 @@ static const struct intel_device_info
> intel_elkhartlake_info = {
> static const struct intel_device_info intel_tigerlake_12_info = {
> GEN12_FEATURES,
> PLATFORM(INTEL_TIGERLAKE),
> - .num_pipes = 4,
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) |
> BIT(PIPE_D),
> .require_force_probe = 1,
> .display.has_modular_fia = 1,
> .engine_mask =
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index d9b5baaef5d0..50b05a5de53b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -896,7 +896,7 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
>
> if (i915_modparams.disable_display) {
> DRM_INFO("Display disabled (module parameter)\n");
> - info->num_pipes = 0;
> + info->pipe_mask = 0;
> } else if (HAS_DISPLAY(dev_priv) &&
> (IS_GEN_RANGE(dev_priv, 7, 8)) &&
> HAS_PCH_SPLIT(dev_priv)) {
> @@ -917,14 +917,14 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> (HAS_PCH_CPT(dev_priv) &&
> !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
> DRM_INFO("Display fused off, disabling\n");
> - info->num_pipes = 0;
> + info->pipe_mask = 0;
> } else if (fuse_strap & IVB_PIPE_C_DISABLE) {
> DRM_INFO("PipeC fused off\n");
> - info->num_pipes -= 1;
> + info->pipe_mask &= ~BIT(PIPE_C);
> }
> } else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
> u32 dfsm = I915_READ(SKL_DFSM);
> - u8 enabled_mask = BIT(info->num_pipes) - 1;
> + u8 enabled_mask = info->pipe_mask;
>
> if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
> enabled_mask &= ~BIT(PIPE_A);
> @@ -945,7 +945,7 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> DRM_ERROR("invalid pipe fuse configuration:
> enabled_mask=0x%x\n",
> enabled_mask);
> else
> - info->num_pipes = hweight8(enabled_mask);
> + info->pipe_mask = enabled_mask;
> }
>
> /* Initialize slice/subslice/EU info */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h
> b/drivers/gpu/drm/i915/intel_device_info.h
> index 92e0c2e0954c..d4c288860aed 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -161,7 +161,7 @@ struct intel_device_info {
>
> u32 display_mmio_offset;
>
> - u8 num_pipes;
> + u8 pipe_mask;
>
> #define DEFINE_FLAG(name) u8 name:1
> DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display
2019-09-02 18:08 ` [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display Jani Nikula
@ 2019-09-04 23:57 ` Souza, Jose
0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2019-09-04 23:57 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Stop setting ->pipe_mask to zero when display is disabled, allowing
> us
> to have different code paths for not actually having display
> hardware,
> and having display hardware disabled. This lets us develop those two
> avenues independently.
>
> There are no functional changes for when there is no display.
> However,
> all uses of for_each_pipe() and for_each_pipe_masked() will start
> running for the disabled display case. Put one of the more
> significant
> ones behind checks for INTEL_DISPLAY_ENABLED(), otherwise the cases
> should not be hit with disabled display, or they seem benign. Fingers
> crossed.
>
> All in all, this might not be the ideal solution. In fact we may have
> had something along the lines of this in the past, but we ended up
> conflating the two cases. Possibly even by recommendation by yours
> truly; I did not dare dig up that part of the history. But the
> perfect
> is the enemy of the good, this is a straightforward change, and lets
> us
> get actual work done in both fronts without interfering with each
> other.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++-----
> drivers/gpu/drm/i915/intel_device_info.c | 8 ++------
> 2 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index c3bb18afe6d7..15f00dee6368 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16217,11 +16217,13 @@ int intel_modeset_init(struct drm_device
> *dev)
> INTEL_NUM_PIPES(dev_priv),
> INTEL_NUM_PIPES(dev_priv) > 1 ? "s" : "");
>
> - for_each_pipe(dev_priv, pipe) {
> - ret = intel_crtc_init(dev_priv, pipe);
> - if (ret) {
> - drm_mode_config_cleanup(dev);
> - return ret;
> + if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
> + for_each_pipe(dev_priv, pipe) {
> + ret = intel_crtc_init(dev_priv, pipe);
> + if (ret) {
> + drm_mode_config_cleanup(dev);
> + return ret;
> + }
The CI warning are coming from this change, there is more thing to do
before not initialize the CRTCS.
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 50b05a5de53b..5d2da7e68a60 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -894,12 +894,8 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> runtime->num_sprites[pipe] = 1;
> }
>
> - if (i915_modparams.disable_display) {
> - DRM_INFO("Display disabled (module parameter)\n");
> - info->pipe_mask = 0;
> - } else if (HAS_DISPLAY(dev_priv) &&
> - (IS_GEN_RANGE(dev_priv, 7, 8)) &&
> - HAS_PCH_SPLIT(dev_priv)) {
> + if (HAS_DISPLAY(dev_priv) && IS_GEN_RANGE(dev_priv, 7, 8) &&
> + HAS_PCH_SPLIT(dev_priv)) {
This block looks right.
> u32 fuse_strap = I915_READ(FUSE_STRAP);
> u32 sfuse_strap = I915_READ(SFUSE_STRAP);
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED()
2019-09-02 18:08 ` [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED() Jani Nikula
@ 2019-09-05 0:00 ` Souza, Jose
0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2019-09-05 0:00 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
On Mon, 2019-09-02 at 21:08 +0300, Jani Nikula wrote:
> Prepare for making a distinction between not having display and
> having
> disabled display. Add INTEL_DISPLAY_ENABLED() and use it where
> HAS_DISPLAY() is used. This is initially duplication, as disabling
> display still leads to ->pipe_mask = 0 and HAS_DISPLAY() being false.
>
> Since INTEL_DISPLAY_ENABLED() will not make sense unless
> HAS_DISPLAY()
> is true, include a warning for catching misuses making decisions on
> INTEL_DISPLAY_ENABLED() when HAS_DISPLAY() is false.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
> drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 8 ++++----
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> drivers/gpu/drm/i915/intel_pch.c | 2 +-
> 7 files changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index efb39f350b19..1def550c68c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1833,7 +1833,7 @@ void intel_bios_init(struct drm_i915_private
> *dev_priv)
> const struct bdb_header *bdb;
> u8 __iomem *bios = NULL;
>
> - if (!HAS_DISPLAY(dev_priv)) {
> + if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> {
> DRM_DEBUG_KMS("Skipping VBT init due to disabled
> display.\n");
> return;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e480ffe0ae6e..c3bb18afe6d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15324,7 +15324,7 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>
> intel_pps_init(dev_priv);
>
> - if (!HAS_DISPLAY(dev_priv))
> + if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> return;
>
> if (INTEL_GEN(dev_priv) >= 12) {
> @@ -17227,7 +17227,7 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
>
> BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error-
> >transcoder));
>
> - if (!HAS_DISPLAY(dev_priv))
> + if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> return NULL;
>
> error = kzalloc(sizeof(*error), GFP_ATOMIC);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
> b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index d59eee5c5d9c..68338669f054 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -444,7 +444,7 @@ int intel_fbdev_init(struct drm_device *dev)
> struct intel_fbdev *ifbdev;
> int ret;
>
> - if (WARN_ON(!HAS_DISPLAY(dev_priv)))
> + if (WARN_ON(!HAS_DISPLAY(dev_priv) ||
> !INTEL_DISPLAY_ENABLED(dev_priv)))
> return -ENODEV;
>
> ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
> b/drivers/gpu/drm/i915/display/intel_gmbus.c
> index d6775a005726..3d4d19ac1d14 100644
> --- a/drivers/gpu/drm/i915/display/intel_gmbus.c
> +++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
> @@ -836,7 +836,7 @@ int intel_gmbus_setup(struct drm_i915_private
> *dev_priv)
> unsigned int pin;
> int ret;
>
> - if (!HAS_DISPLAY(dev_priv))
> + if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> return 0;
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index cad4d6ba2d2c..f7266d405978 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -338,7 +338,7 @@ static int i915_driver_modeset_probe(struct
> drm_device *dev)
> if (i915_inject_probe_failure(dev_priv))
> return -ENODEV;
>
> - if (HAS_DISPLAY(dev_priv)) {
> + if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
> ret = drm_vblank_init(&dev_priv->drm,
> INTEL_NUM_PIPES(dev_priv));
> if (ret)
> @@ -389,7 +389,7 @@ static int i915_driver_modeset_probe(struct
> drm_device *dev)
>
> intel_overlay_setup(dev_priv);
>
> - if (!HAS_DISPLAY(dev_priv))
> + if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> return 0;
>
> ret = intel_fbdev_init(dev);
> @@ -1381,7 +1381,7 @@ static void i915_driver_register(struct
> drm_i915_private *dev_priv)
> } else
> DRM_ERROR("Failed to register driver for userspace
> access!\n");
>
> - if (HAS_DISPLAY(dev_priv)) {
> + if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv)) {
> /* Must be done after probing outputs */
> intel_opregion_register(dev_priv);
> acpi_video_register();
> @@ -1405,7 +1405,7 @@ static void i915_driver_register(struct
> drm_i915_private *dev_priv)
> * We need to coordinate the hotplugs with the asynchronous
> fbdev
> * configuration, for which we use the fbdev->async_cookie.
> */
> - if (HAS_DISPLAY(dev_priv))
> + if (HAS_DISPLAY(dev_priv) && INTEL_DISPLAY_ENABLED(dev_priv))
> drm_kms_helper_poll_init(dev);
>
> intel_power_domains_enable(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 6557cd8ddd7a..ee84370ff7c3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2186,6 +2186,9 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
>
> #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
>
> +/* Only valid when HAS_DISPLAY() is true */
> +#define INTEL_DISPLAY_ENABLED(dev_priv)
> (WARN_ON(!HAS_DISPLAY(dev_priv)), !i915_modparams.disable_display)
> +
> static inline bool intel_vtd_active(void)
> {
> #ifdef CONFIG_INTEL_IOMMU
> diff --git a/drivers/gpu/drm/i915/intel_pch.c
> b/drivers/gpu/drm/i915/intel_pch.c
> index fa864d8f2b73..111867569efd 100644
> --- a/drivers/gpu/drm/i915/intel_pch.c
> +++ b/drivers/gpu/drm/i915/intel_pch.c
> @@ -188,7 +188,7 @@ void intel_detect_pch(struct drm_i915_private
> *dev_priv)
> * Use PCH_NOP (PCH but no South Display) for PCH platforms
> without
> * display.
> */
> - if (pch && !HAS_DISPLAY(dev_priv)) {
> + if (pch && (!HAS_DISPLAY(dev_priv) ||
> !INTEL_DISPLAY_ENABLED(dev_priv))) {
> DRM_DEBUG_KMS("Display disabled, reverting to NOP
> PCH\n");
> dev_priv->pch_type = PCH_NOP;
> dev_priv->pch_id = 0;
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] drm/i915: deconflate display disable from no display
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
` (5 preceding siblings ...)
2019-09-02 18:37 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-09-05 12:28 ` Ville Syrjälä
6 siblings, 0 replies; 12+ messages in thread
From: Ville Syrjälä @ 2019-09-05 12:28 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Sep 02, 2019 at 09:08:12PM +0300, Jani Nikula wrote:
> Deconflate not having display hardware from having disabled display
> hardware, with some collateral improvements.
>
> This doesn't actually fix any of the issues resulting from the two being
> conflated, but unblocks fixing both independently.
>
> Read the commit messages for details.
>
> BR,
> Jani.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Looks good based on a cursor scan. Series is
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Jani Nikula (4):
> drm/i915: add INTEL_NUM_PIPES() and use it
> drm/i915: convert device info num_pipes to pipe_mask
> drm/i915: introduce INTEL_DISPLAY_ENABLED()
> drm/i915: stop conflating HAS_DISPLAY() and disabled display
>
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 30 ++++++++++---------
> drivers/gpu/drm/i915/display/intel_display.h | 4 +--
> drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
> drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +-
> .../gpu/drm/i915/display/intel_lpe_audio.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 10 +++----
> drivers/gpu/drm/i915/i915_drv.h | 7 ++++-
> drivers/gpu/drm/i915/i915_pci.c | 24 +++++++--------
> drivers/gpu/drm/i915/intel_device_info.c | 16 ++++------
> drivers/gpu/drm/i915/intel_device_info.h | 2 +-
> drivers/gpu/drm/i915/intel_pch.c | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 6 ++--
> 13 files changed, 56 insertions(+), 53 deletions(-)
>
> --
> 2.20.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-09-05 12:28 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-02 18:08 [PATCH 0/4] drm/i915: deconflate display disable from no display Jani Nikula
2019-09-02 18:08 ` [PATCH 1/4] drm/i915: add INTEL_NUM_PIPES() and use it Jani Nikula
2019-09-04 23:35 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 2/4] drm/i915: convert device info num_pipes to pipe_mask Jani Nikula
2019-09-04 23:35 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 3/4] drm/i915: introduce INTEL_DISPLAY_ENABLED() Jani Nikula
2019-09-05 0:00 ` Souza, Jose
2019-09-02 18:08 ` [PATCH 4/4] drm/i915: stop conflating HAS_DISPLAY() and disabled display Jani Nikula
2019-09-04 23:57 ` Souza, Jose
2019-09-02 18:13 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: deconflate display disable from no display Patchwork
2019-09-02 18:37 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-09-05 12:28 ` [PATCH 0/4] " Ville Syrjälä
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.