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X-Received-From: 2a00:1450:4864:20::342 Subject: [Qemu-devel] [PATCH 11/14] hw/arm/bcm2835_peripherals: Map various BCM2838 blocks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Clement Deschamps , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Luc Michel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The BCM2838 provides more peripherals. Add them as 'unimplemented' so we can track when/how firmware and kernel access them. Based on various sources: * U-boot: https://github.com/raspberrypi/firmware/tree/next/boot - arch/arm/dts/bcm283x.dtsi - arch/arm/dts/bcm2838.dtsi - arch/arm/dts/bcm2838-rpi-4-b.dts * Arnd Bergmann analysis: https://www.cnx-software.com/2019/06/24/raspberry-pi-4-features-broadcom-bcm2711-processor-up-to-4gb-ram/#comment-563948 * Linux: https://patchwork.kernel.org/patch/11053097/ - arch/arm/boot/dts/bcm283x.dtsi - arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi - arch/arm/boot/dts/bcm2711.dtsi - arch/arm/boot/dts/bcm2711-rpi-4-b.dts Signed-off-by: Philippe Mathieu-Daudé --- TODO: At least use proper pl011[2] and pl011[3] --- hw/arm/bcm2835_peripherals.c | 23 +++++++++++++++++++---- include/hw/arm/bcm2835_peripherals.h | 8 ++++++-- include/hw/arm/raspi_platform.h | 14 ++++++++++++++ 3 files changed, 39 insertions(+), 6 deletions(-) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index be6270b8ef..72287d5921 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -342,15 +342,30 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) create_unimp(s, &s->a2w, "bcm2835-a2w", 0x102000, 0x1000); create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); - create_unimp(s, &s->spi0, "bcm2835-spi0", SPI0_OFFSET, 0x20); + create_unimp(s, &s->uartu[2], "!pl011[2]", UART2_OFFSET, 0x100); + create_unimp(s, &s->uartu[3], "!pl011[3]", UART3_OFFSET, 0x100); + create_unimp(s, &s->uartu[4], "!pl011[4]", UART4_OFFSET, 0x100); + create_unimp(s, &s->uartu[5], "!pl011[5]", UART5_OFFSET, 0x100); + create_unimp(s, &s->spi[0], "bcm2835-spi[0]", SPI0_OFFSET, 0x20); + create_unimp(s, &s->spi[3], "bcm2835-spi[3]", SPI3_OFFSET, 0x20); + create_unimp(s, &s->spi[4], "bcm2835-spi[4]", SPI4_OFFSET, 0x20); + create_unimp(s, &s->spi[5], "bcm2835-spi[5]", SPI5_OFFSET, 0x20); + create_unimp(s, &s->spi[6], "bcm2835-spi[6]", SPI6_OFFSET, 0x20); create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100); - create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20); - create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20); - create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20); + create_unimp(s, &s->i2c[0], "bcm2835-i2c[0]", BSC0_OFFSET, 0x20); + create_unimp(s, &s->i2c[1], "bcm2835-i2c[1]", BSC1_OFFSET, 0x20); + create_unimp(s, &s->i2c[2], "bcm2835-i2c[2]", BSC2_OFFSET, 0x20); + create_unimp(s, &s->i2c[3], "bcm2835-i2c[3]", BSC3_OFFSET, 0x20); + create_unimp(s, &s->i2c[4], "bcm2835-i2c[4]", BSC4_OFFSET, 0x20); + create_unimp(s, &s->i2c[5], "bcm2835-i2c[5]", BSC5_OFFSET, 0x20); + create_unimp(s, &s->i2c[6], "bcm2835-i2c[6]", BSC6_OFFSET, 0x20); create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); create_unimp(s, &s->dwc2, "dwc-usb2", USB_OTG_OFFSET, 0x100); + create_unimp(s, &s->xhci, "bcm2838-xhci", USB_XHCI_OFFSET, 0x100000); + create_unimp(s, &s->argon, "bcm2838-argon", ARGON_OFFSET, 4 * 0x10000); + create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x10000); create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100); } diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 44a182b399..2e5f243b39 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -42,6 +42,7 @@ typedef struct BCM2835PeripheralState { UnimplementedDeviceState cprman; UnimplementedDeviceState a2w; PL011State uart0; + UnimplementedDeviceState uartu[6]; BCM2835AuxState aux; BCM2835FBState fb; BCM2835DMAState dma; @@ -53,14 +54,17 @@ typedef struct BCM2835PeripheralState { BCM2835SDHostState sdhost; BCM2835GpioState gpio; UnimplementedDeviceState i2s; - UnimplementedDeviceState spi0; - UnimplementedDeviceState i2c[3]; + UnimplementedDeviceState spi[7]; + UnimplementedDeviceState i2c[7]; UnimplementedDeviceState otp; UnimplementedDeviceState dbus; UnimplementedDeviceState ave0; UnimplementedDeviceState bscsl; UnimplementedDeviceState smi; UnimplementedDeviceState dwc2; + UnimplementedDeviceState xhci; + UnimplementedDeviceState argon; + UnimplementedDeviceState v3d; UnimplementedDeviceState sdramc; } BCM2835PeripheralState; diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h index c6f4985522..0ea547669f 100644 --- a/include/hw/arm/raspi_platform.h +++ b/include/hw/arm/raspi_platform.h @@ -49,10 +49,22 @@ #define RNG_OFFSET 0x104000 #define GPIO_OFFSET 0x200000 #define UART0_OFFSET 0x201000 /* PL011 */ +#define UART2_OFFSET 0x201400 /* PL011 */ +#define UART3_OFFSET 0x201600 /* PL011 */ +#define UART4_OFFSET 0x201800 /* PL011 */ +#define UART5_OFFSET 0x201a00 /* PL011 */ #define MMCI0_OFFSET 0x202000 /* Legacy MMC */ #define I2S_OFFSET 0x203000 /* PCM */ #define SPI0_OFFSET 0x204000 /* SPI master */ +#define SPI3_OFFSET 0x204600 +#define SPI4_OFFSET 0x204800 +#define SPI5_OFFSET 0x204a00 +#define SPI6_OFFSET 0x204c00 #define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */ +#define BSC3_OFFSET 0x205600 +#define BSC4_OFFSET 0x205800 +#define BSC5_OFFSET 0x205a00 +#define BSC6_OFFSET 0x205c00 #define PIXV0_OFFSET 0x206000 #define PIXV1_OFFSET 0x207000 #define DPI_OFFSET 0x208000 @@ -84,6 +96,8 @@ #define DBUS_OFFSET 0x900000 #define AVE0_OFFSET 0x910000 #define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */ +#define USB_XHCI_OFFSET 0x9c0000 /* generic-xhci controller */ +#define ARGON_OFFSET 0xb00000 #define V3D_OFFSET 0xc00000 #define SDRAMC_OFFSET 0xe00000 #define L2CC_OFFSET 0xe01000 /* Level 2 Cache controller */ -- 2.20.1