From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D6D8C4CECD for ; Tue, 17 Sep 2019 18:55:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D48D021848 for ; Tue, 17 Sep 2019 18:55:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568746543; bh=GES6jY4SrgchwiFDLmCd0LxgVWZjnEk+gbEGOc928XQ=; h=In-Reply-To:References:Cc:To:From:Subject:Date:List-ID:From; b=YnFuZB++/EkDZKc+oNBhry7tFbqByc0siRk1lTD2jJrm4sV6y8s5mDNdqyO3Zxw5J k9aBlmJwIbQQXhGlXt/Rgd2ny2hZxa4fEyqZGuANXKO3/CGvqLBsrCcuSYinD9lV7n ECQOeZrBP851aSNJT5r/P8NbB76qo+k+ifm1TSmo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726794AbfIQSzn (ORCPT ); Tue, 17 Sep 2019 14:55:43 -0400 Received: from mail.kernel.org ([198.145.29.99]:37130 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726169AbfIQSzn (ORCPT ); Tue, 17 Sep 2019 14:55:43 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 29EB5214AF; Tue, 17 Sep 2019 18:55:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568746542; bh=GES6jY4SrgchwiFDLmCd0LxgVWZjnEk+gbEGOc928XQ=; h=In-Reply-To:References:Cc:To:From:Subject:Date:From; b=k9LwQx38N2BdNc66+3x/viHSY2juEQIkGNDwqC7RC5qWXwJi29ZVStsSdAb4mMl/s QwXwITGlVNF3gB3KQrxck1nkk79fvRSbAffQgGL0DxcRj6yvF6E3eUh8Ik6KDGZqrp keQixx7YXQIb8U8MUxG+ZkXC3m274H2HeGOHSe6E= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> References: <1566327992-362-1-git-send-email-jcrouse@codeaurora.org> <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org, Will Deacon , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Robin Murphy , Joerg Roedel , linux-arm-kernel@lists.infradead.org To: Jordan Crouse , freedreno@lists.freedesktop.org From: Stephen Boyd Subject: Re: [PATCH 3/7] iommu/arm-smmu: Add a SMMU variant for the Adreno GPU User-Agent: alot/0.8.1 Date: Tue, 17 Sep 2019 11:55:41 -0700 Message-Id: <20190917185542.29EB5214AF@mail.kernel.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Quoting Jordan Crouse (2019-08-20 12:06:28) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 39e81ef..3f41cf7 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -1858,6 +1858,7 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GE= NERIC_SMMU); > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); > ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2); > +ARM_SMMU_MATCH_DATA(qcom_adreno_smmuv2, ARM_SMMU_V2, QCOM_ADRENO_SMMUV2); > =20 > static const struct of_device_id arm_smmu_of_match[] =3D { > { .compatible =3D "arm,smmu-v1", .data =3D &smmu_generic_v1 }, > @@ -1867,6 +1868,7 @@ static const struct of_device_id arm_smmu_of_match[= ] =3D { > { .compatible =3D "arm,mmu-500", .data =3D &arm_mmu500 }, > { .compatible =3D "cavium,smmu-v2", .data =3D &cavium_smmuv2 }, > { .compatible =3D "qcom,smmu-v2", .data =3D &qcom_smmuv2 }, > + { .compatible =3D "qcom,adreno-smmu-v2", .data =3D &qcom_adreno_s= mmuv2 }, Can this be sorted on compat? > { }, > }; > =20 > diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h > index 91a4eb8..e5a2cc8 100644 > --- a/drivers/iommu/arm-smmu.h > +++ b/drivers/iommu/arm-smmu.h > @@ -222,6 +222,7 @@ enum arm_smmu_implementation { > ARM_MMU500, > CAVIUM_SMMUV2, > QCOM_SMMUV2, > + QCOM_ADRENO_SMMUV2, Can this be sorted alphabetically? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F82EC4CEC9 for ; Tue, 17 Sep 2019 18:55:44 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B54121670 for ; Tue, 17 Sep 2019 18:55:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="k9LwQx38" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0B54121670 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id D7F25C64; Tue, 17 Sep 2019 18:55:43 +0000 (UTC) Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id AFD30C5D for ; Tue, 17 Sep 2019 18:55:42 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp1.linuxfoundation.org (Postfix) with ESMTPS id 6A61676D for ; Tue, 17 Sep 2019 18:55:42 +0000 (UTC) Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 29EB5214AF; Tue, 17 Sep 2019 18:55:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568746542; bh=GES6jY4SrgchwiFDLmCd0LxgVWZjnEk+gbEGOc928XQ=; h=In-Reply-To:References:Cc:To:From:Subject:Date:From; b=k9LwQx38N2BdNc66+3x/viHSY2juEQIkGNDwqC7RC5qWXwJi29ZVStsSdAb4mMl/s QwXwITGlVNF3gB3KQrxck1nkk79fvRSbAffQgGL0DxcRj6yvF6E3eUh8Ik6KDGZqrp keQixx7YXQIb8U8MUxG+ZkXC3m274H2HeGOHSe6E= MIME-Version: 1.0 In-Reply-To: <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> References: <1566327992-362-1-git-send-email-jcrouse@codeaurora.org> <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> To: Jordan Crouse , freedreno@lists.freedesktop.org From: Stephen Boyd Subject: Re: [PATCH 3/7] iommu/arm-smmu: Add a SMMU variant for the Adreno GPU User-Agent: alot/0.8.1 Date: Tue, 17 Sep 2019 11:55:41 -0700 Message-Id: <20190917185542.29EB5214AF@mail.kernel.org> Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Will Deacon , linux-arm-kernel@lists.infradead.org, Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org Quoting Jordan Crouse (2019-08-20 12:06:28) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 39e81ef..3f41cf7 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -1858,6 +1858,7 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); > ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2); > +ARM_SMMU_MATCH_DATA(qcom_adreno_smmuv2, ARM_SMMU_V2, QCOM_ADRENO_SMMUV2); > > static const struct of_device_id arm_smmu_of_match[] = { > { .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 }, > @@ -1867,6 +1868,7 @@ static const struct of_device_id arm_smmu_of_match[] = { > { .compatible = "arm,mmu-500", .data = &arm_mmu500 }, > { .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 }, > { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 }, > + { .compatible = "qcom,adreno-smmu-v2", .data = &qcom_adreno_smmuv2 }, Can this be sorted on compat? > { }, > }; > > diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h > index 91a4eb8..e5a2cc8 100644 > --- a/drivers/iommu/arm-smmu.h > +++ b/drivers/iommu/arm-smmu.h > @@ -222,6 +222,7 @@ enum arm_smmu_implementation { > ARM_MMU500, > CAVIUM_SMMUV2, > QCOM_SMMUV2, > + QCOM_ADRENO_SMMUV2, Can this be sorted alphabetically? _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83270C4CECD for ; Tue, 17 Sep 2019 18:56:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 47E5D214AF for ; Tue, 17 Sep 2019 18:56:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cIyzXylR"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="k9LwQx38" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 47E5D214AF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject:From:To: References:In-Reply-To:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6bFBm1RqiR+ClldwSfQBgaCy6Q5Kgjf8vf/H0NtXjbs=; b=cIyzXylRFlhW93 fk6tcJkQo1htZq9nMxcIspSfFd71GguvzxU/sb67BMeTL3My2Qes48u76LjNzYH7OixOQ1TQhmIpN YahRBlPZBGhpOYRERN68NNqojpRJeXqxnIF1hQRTE8Z3VgQO7Rg8RGHu9cWrA6/TvC4qiG13v84zq /wPL1Jky+pBijkp/O0m3Tmd9ca3nmMGVA739HmA7nDjs5wz6dNUzJp2MI+OQEhCQU911uwOQyxM9l H7KYUb7rrMo9Da9I6E851UsiT6ySeWzfAjSqsT5M5EHkhXRlPnO7QV0VdipCEVBwtXlFzGQTXD7yq IkLHvXKP+LYjoh5Q8ghA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iAIdh-0003hE-7s; Tue, 17 Sep 2019 18:55:49 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1iAIdc-0003gX-Db for linux-arm-kernel@lists.infradead.org; Tue, 17 Sep 2019 18:55:46 +0000 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 29EB5214AF; Tue, 17 Sep 2019 18:55:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568746542; bh=GES6jY4SrgchwiFDLmCd0LxgVWZjnEk+gbEGOc928XQ=; h=In-Reply-To:References:Cc:To:From:Subject:Date:From; b=k9LwQx38N2BdNc66+3x/viHSY2juEQIkGNDwqC7RC5qWXwJi29ZVStsSdAb4mMl/s QwXwITGlVNF3gB3KQrxck1nkk79fvRSbAffQgGL0DxcRj6yvF6E3eUh8Ik6KDGZqrp keQixx7YXQIb8U8MUxG+ZkXC3m274H2HeGOHSe6E= MIME-Version: 1.0 In-Reply-To: <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> References: <1566327992-362-1-git-send-email-jcrouse@codeaurora.org> <1566327992-362-4-git-send-email-jcrouse@codeaurora.org> To: Jordan Crouse , freedreno@lists.freedesktop.org From: Stephen Boyd Subject: Re: [PATCH 3/7] iommu/arm-smmu: Add a SMMU variant for the Adreno GPU User-Agent: alot/0.8.1 Date: Tue, 17 Sep 2019 11:55:41 -0700 Message-Id: <20190917185542.29EB5214AF@mail.kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190917_115544_482177_32BE23D5 X-CRM114-Status: UNSURE ( 8.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Will Deacon , linux-arm-kernel@lists.infradead.org, Robin Murphy Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Quoting Jordan Crouse (2019-08-20 12:06:28) > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > index 39e81ef..3f41cf7 100644 > --- a/drivers/iommu/arm-smmu.c > +++ b/drivers/iommu/arm-smmu.c > @@ -1858,6 +1858,7 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); > ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2); > +ARM_SMMU_MATCH_DATA(qcom_adreno_smmuv2, ARM_SMMU_V2, QCOM_ADRENO_SMMUV2); > > static const struct of_device_id arm_smmu_of_match[] = { > { .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 }, > @@ -1867,6 +1868,7 @@ static const struct of_device_id arm_smmu_of_match[] = { > { .compatible = "arm,mmu-500", .data = &arm_mmu500 }, > { .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 }, > { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 }, > + { .compatible = "qcom,adreno-smmu-v2", .data = &qcom_adreno_smmuv2 }, Can this be sorted on compat? > { }, > }; > > diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h > index 91a4eb8..e5a2cc8 100644 > --- a/drivers/iommu/arm-smmu.h > +++ b/drivers/iommu/arm-smmu.h > @@ -222,6 +222,7 @@ enum arm_smmu_implementation { > ARM_MMU500, > CAVIUM_SMMUV2, > QCOM_SMMUV2, > + QCOM_ADRENO_SMMUV2, Can this be sorted alphabetically? _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel