[PATCH v8 0/7] drm/i915/dp: Support for DP HDR outputs

[PATCH v8 0/7] drm/i915/dp: Support for DP HDR outputs

[Gwan-gyeong Mun]

Support for HDR10 video was introduced in DisplayPort 1.4.
On GLK+ platform, in order to use DisplayPort HDR10, we need to support
BT.2020 colorimetry and HDR Static metadata.
It implements the CTA-861-G standard for transport of static HDR metadata.
It enables writing of HDR metadata infoframe SDP to the panel.
The HDR Metadata will be provided by userspace compositors, based on
blending policies and passed to the driver through a blob property.
And It refactors, renames and extends a function which handled vsc sdp
header and data block setup for supporting colorimetry format.
And It attaches the colorspace connector property and HDR metadata property
to a DisplayPort connector.

These patches tested on below test environment.
Test Environment:
 - Tested System: GLK and Gen11 platform.
 - Monitor: Dell UP2718Q 4K HDR Monitor.
 - In order to test DP HDR10, test environment uses patched Kodi-gbm,
   patched Media driver and HDR10 video.

   You can find these on below.
   [patched Kodi-gbm]
    - repo: https://github.com/Kwiboo/xbmc/tree/drmprime-hdr 
   [download 4K HDR video file]
    - link: https://4kmedia.org/lg-new-york-hdr-uhd-4k-demo/
   [Media Driver for GLK]
    - repo https://gitlab.freedesktop.org/emersion/intel-vaapi-driver
  	  master branch
   [Media Driver for ICL]
    - repo: https://github.com/harishkrupo/media-driver/tree/p010_composite

v2:
 - Add a missed blank line after function declaration.
 - Remove useless parentheses.
 - Minor style fix.

v3:
 - Remove not handled return values from
   intel_dp_setup_hdr_metadata_infoframe_sdp(). [Uma]
 - Add handling of different register size for
   HDMI_PACKET_TYPE_GAMUT_METADATA on hsw_dip_data_size() for each GEN
   platforms [Uma]
 - Add new colorimetry options for DP 1.4a spec. [Ville]
 - Separate set of colorimetry enum values for DP. [Ville]
 - In order to checking output format and output colorspace on
   intel_dp_needs_vsc_sdp(), it passes entire intel_crtc_state stucture.[Ville]
 - Remove a pointless variable. [Ville]

v4:
 - Add additional comments to struct drm_prop_enum_list.
 - Polishing an enum string of struct drm_prop_enum_list.

v5:
 - Change definitions of DRM_MODE_COLORIMETRYs to follow HDMI prefix and
   DP abbreviations.
 - Add missed variables on dp_colorspaces.
 - Fix typo. [Uma]

v6:
 - Addressed review comments from Ilia and Ville
   Split drm_mode_create_colorspace_property() to DP and HDMI connector.
   Becasue between HDMI and DP have different colorspaces, it renames
   drm_mode_create_colorspace_property() function to
   drm_mode_create_hdmi_colorspace_property() function for HDMI connector.
   And it adds drm_mode_create_dp_colorspace_property() function for
   creating of DP colorspace property.
   In order to apply changed and added drm api, i915 driver has channged.

v7:
 - Fix typo [Jani Saarinen]
 - Fix white space.

v8:
 - Addressed review comments from Ville
   Drop colorimetries which have another way to distinguish or which would
   not be used.

Gwan-gyeong Mun (7):
  drm/i915/dp: Extend program of VSC Header and DB for Colorimetry
    Format
  drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA
  drm: Add DisplayPort colorspace property
  drm/i915/dp: Attach colorspace property
  drm/i915: Add new GMP register size for GEN11
  drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static
    Metadata
  drm/i915/dp: Attach HDR metadata property to DP connector

 drivers/gpu/drm/drm_connector.c               | 101 +++++++--
 .../gpu/drm/i915/display/intel_connector.c    |  21 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  10 +-
 drivers/gpu/drm/i915/display/intel_display.h  |   2 -
 .../drm/i915/display/intel_display_types.h    |   3 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 193 ++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   7 +
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  10 +-
 drivers/gpu/drm/i915/i915_reg.h               |   1 +
 include/drm/drm_connector.h                   |   7 +-
 10 files changed, 313 insertions(+), 42 deletions(-)

-- 
2.23.0

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[PATCH v8 1/7] drm/i915/dp: Extend program of VSC Header and DB for Colorimetry Format

[Gwan-gyeong Mun]

It refactors and renames a function which handled vsc sdp header and data
block setup for supporting colorimetry format.
Function intel_dp_setup_vsc_sdp handles vsc sdp header and data block
setup for pixel encoding / colorimetry format.
In order to use colorspace information of a connector, it adds an argument
of drm_connector_state type.

Setup VSC header and data block in function intel_dp_setup_vsc_sdp for
pixel encoding / colorimetry format as per dp 1.4a spec, section 2.2.5.7.1,
table 2-119: VSC SDP Header Bytes, section 2.2.5.7.5,
table 2-120: VSC SDP Payload for DB16 through DB18.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_display.h |  2 -
 drivers/gpu/drm/i915/display/intel_dp.c      | 68 ++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_dp.h      |  3 +
 4 files changed, 60 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3e6394139964..98d69febd8e3 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3623,7 +3623,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
 
 	intel_edp_backlight_on(crtc_state, conn_state);
 	intel_psr_enable(intel_dp, crtc_state);
-	intel_dp_ycbcr_420_enable(intel_dp, crtc_state);
+	intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
 	intel_edp_drrs_enable(intel_dp, crtc_state);
 
 	if (crtc_state->has_audio)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f4ddde171655..409544e0e2f8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -526,8 +526,6 @@ void intel_dp_get_m_n(struct intel_crtc *crtc,
 		      struct intel_crtc_state *pipe_config);
 void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state,
 		      enum link_m_n_set m_n);
-void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp,
-			       const struct intel_crtc_state *crtc_state);
 int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
 bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
 			struct dpll *best_clock);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index d09133a958e1..a2a0214f771a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4449,8 +4449,9 @@ u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
 }
 
 static void
-intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp,
-			       const struct intel_crtc_state *crtc_state)
+intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
+		       const struct intel_crtc_state *crtc_state,
+		       const struct drm_connector_state *conn_state)
 {
 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 	struct dp_sdp vsc_sdp = {};
@@ -4471,13 +4472,55 @@ intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp,
 	 */
 	vsc_sdp.sdp_header.HB3 = 0x13;
 
-	/*
-	 * YCbCr 420 = 3h DB16[7:4] ITU-R BT.601 = 0h, ITU-R BT.709 = 1h
-	 * DB16[3:0] DP 1.4a spec, Table 2-120
-	 */
-	vsc_sdp.db[16] = 0x3 << 4; /* 0x3 << 4 , YCbCr 420*/
-	/* RGB->YCBCR color conversion uses the BT.709 color space. */
-	vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */
+	/* DP 1.4a spec, Table 2-120 */
+	switch (crtc_state->output_format) {
+	case INTEL_OUTPUT_FORMAT_YCBCR444:
+		vsc_sdp.db[16] = 0x1 << 4; /* YCbCr 444 : DB16[7:4] = 1h */
+		break;
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		vsc_sdp.db[16] = 0x3 << 4; /* YCbCr 420 : DB16[7:4] = 3h */
+		break;
+	case INTEL_OUTPUT_FORMAT_RGB:
+	default:
+		/* RGB: DB16[7:4] = 0h */
+		break;
+	}
+
+	switch (conn_state->colorspace) {
+	case DRM_MODE_COLORIMETRY_BT709_YCC:
+		vsc_sdp.db[16] |= 0x1;
+		break;
+	case DRM_MODE_COLORIMETRY_XVYCC_601:
+		vsc_sdp.db[16] |= 0x2;
+		break;
+	case DRM_MODE_COLORIMETRY_XVYCC_709:
+		vsc_sdp.db[16] |= 0x3;
+		break;
+	case DRM_MODE_COLORIMETRY_SYCC_601:
+		vsc_sdp.db[16] |= 0x4;
+		break;
+	case DRM_MODE_COLORIMETRY_OPYCC_601:
+		vsc_sdp.db[16] |= 0x5;
+		break;
+	case DRM_MODE_COLORIMETRY_BT2020_CYCC:
+	case DRM_MODE_COLORIMETRY_BT2020_RGB:
+		vsc_sdp.db[16] |= 0x6;
+		break;
+	case DRM_MODE_COLORIMETRY_BT2020_YCC:
+		vsc_sdp.db[16] |= 0x7;
+		break;
+	case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
+	case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
+		vsc_sdp.db[16] |= 0x4; /* DCI-P3 (SMPTE RP 431-2) */
+		break;
+	default:
+		/* sRGB (IEC 61966-2-1) / ITU-R BT.601: DB16[0:3] = 0h */
+
+		/* RGB->YCBCR color conversion uses the BT.709 color space. */
+		if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
+			vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */
+		break;
+	}
 
 	/*
 	 * For pixel encoding formats YCbCr444, YCbCr422, YCbCr420, and Y Only,
@@ -4529,13 +4572,14 @@ intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp,
 			crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp));
 }
 
-void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp,
-			       const struct intel_crtc_state *crtc_state)
+void intel_dp_vsc_enable(struct intel_dp *intel_dp,
+			 const struct intel_crtc_state *crtc_state,
+			 const struct drm_connector_state *conn_state)
 {
 	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
 		return;
 
-	intel_pixel_encoding_setup_vsc(intel_dp, crtc_state);
+	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
 }
 
 static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index e01d1f89409d..be13cb395ef8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -112,6 +112,9 @@ bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 int intel_dp_link_required(int pixel_clock, int bpp);
 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
+void intel_dp_vsc_enable(struct intel_dp *intel_dp,
+			 const struct intel_crtc_state *crtc_state,
+			 const struct drm_connector_state *conn_state);
 bool intel_digital_port_connected(struct intel_encoder *encoder);
 
 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
-- 
2.23.0

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[PATCH v8 2/7] drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA

[Gwan-gyeong Mun]

When BT.2020 Colorimetry output is used for DP, we should program BT.2020
Colorimetry to MSA and VSC SDP. It adds output_colorspace to
intel_crtc_state struct as a place holder of pipe's output colorspace.
In order to distinguish needed colorimetry for VSC SDP, it adds
intel_dp_needs_vsc_sdp function.
If the output colorspace requires vsc sdp or output format is YCbCr 4:2:0,
it uses MSA with VSC SDP.

As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication of
Color Encoding Format and Content Color Gamut] while sending
BT.2020 Colorimetry signals we should program MSA MISC1 fields which
indicate VSC SDP for the Pixel Encoding/Colorimetry Format.

v2: Remove useless parentheses
v3: Addressed review comments from Ville
    - In order to checking output format and output colorspace on
      intel_dp_needs_vsc_sdp(), it passes entire intel_crtc_state struct
      value.
    - Remove a pointless variable.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +++--
 .../drm/i915/display/intel_display_types.h    |  3 ++
 drivers/gpu/drm/i915/display/intel_dp.c       | 29 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_dp.h       |  1 +
 4 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 98d69febd8e3..8dc030650801 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1737,11 +1737,12 @@ void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state)
 	/*
 	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication
 	 * of Color Encoding Format and Content Color Gamut] while sending
-	 * YCBCR 420 signals we should program MSA MISC1 fields which
-	 * indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
+	 * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1 fields
+	 * which indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
 	 */
-	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
+	if (intel_dp_needs_vsc_sdp(crtc_state))
 		temp |= TRANS_MSA_USE_VSC_SDP;
+
 	I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index d5cc4b810d9e..4108570907d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -971,6 +971,9 @@ struct intel_crtc_state {
 	/* Output format RGB/YCBCR etc */
 	enum intel_output_format output_format;
 
+	/* Output colorspace sRGB/BT.2020 etc */
+	u32 output_colorspace;
+
 	/* Output down scaling is done in LSPCON device */
 	bool lspcon_downsampling;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a2a0214f771a..3a8aef1c6036 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2187,6 +2187,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 		pipe_config->has_pch_encoder = true;
 
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->output_colorspace = intel_conn_state->base.colorspace;
+
 	if (lspcon->active)
 		lspcon_ycbcr420_config(&intel_connector->base, pipe_config);
 	else
@@ -4448,6 +4450,31 @@ u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
 	return 0;
 }
 
+bool
+intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state)
+{
+	/*
+	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication
+	 * of Color Encoding Format and Content Color Gamut], in order to
+	 * sending YCBCR 420 or HDR BT.2020 signals we should use DP VSC SDP.
+	 */
+	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
+		return true;
+
+	switch (crtc_state->output_colorspace) {
+	case DRM_MODE_COLORIMETRY_SYCC_601:
+	case DRM_MODE_COLORIMETRY_OPYCC_601:
+	case DRM_MODE_COLORIMETRY_BT2020_YCC:
+	case DRM_MODE_COLORIMETRY_BT2020_RGB:
+	case DRM_MODE_COLORIMETRY_BT2020_CYCC:
+		return true;
+	default:
+		break;
+	}
+
+	return false;
+}
+
 static void
 intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
 		       const struct intel_crtc_state *crtc_state,
@@ -4576,7 +4603,7 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp,
 			 const struct intel_crtc_state *crtc_state,
 			 const struct drm_connector_state *conn_state)
 {
-	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
+	if (!intel_dp_needs_vsc_sdp(crtc_state))
 		return;
 
 	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index be13cb395ef8..87883d0d5977 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -112,6 +112,7 @@ bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 int intel_dp_link_required(int pixel_clock, int bpp);
 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
+bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state);
 void intel_dp_vsc_enable(struct intel_dp *intel_dp,
 			 const struct intel_crtc_state *crtc_state,
 			 const struct drm_connector_state *conn_state);
-- 
2.23.0

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[PATCH v8 3/7] drm: Add DisplayPort colorspace property

[Gwan-gyeong Mun]

Because between HDMI and DP have different colorspaces, it renames
drm_mode_create_colorspace_property() function to
drm_mode_create_hdmi_colorspace_property() function for HDMI connector.
And it adds drm_mode_create_dp_colorspace_property() function for creating
of DP colorspace property.
In order to apply changed and added drm api, i915 driver has channged.

v3: Addressed review comments from Ville
    - Add new colorimetry options for DP 1.4a spec.
    - Separate set of colorimetry enum values for DP.
v4: Add additional comments to struct drm_prop_enum_list.
    Polishing an enum string of struct drm_prop_enum_list
v5: Change definitions of DRM_MODE_COLORIMETRYs to follow HDMI prefix and
    DP abbreviations.
    Add missed variables on dp_colorspaces.
    Fix typo. [Uma]
v6: Addressed review comments from Ilia and Ville
   - Split drm_mode_create_colorspace_property() to DP and HDMI connector.
v7: Fix typo [Jani Saarinen]
    Fix white space.
v8: Addressed review comments from Ville
   - Drop colorimetries which have another way to distinguish or which
     would not be used.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/drm_connector.c               | 101 +++++++++++++++---
 .../gpu/drm/i915/display/intel_connector.c    |  21 +++-
 include/drm/drm_connector.h                   |   7 +-
 3 files changed, 108 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 4c766624b20d..57c97949081a 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -882,6 +882,38 @@ static const struct drm_prop_enum_list hdmi_colorspaces[] = {
 	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER, "DCI-P3_RGB_Theater" },
 };
 
+/*
+ * As per DP 1.4a spec, 2.2.5.7.5 VSC SDP Payload for Pixel Encoding/Colorimetry
+ * Format Table 2-120
+ */
+static const struct drm_prop_enum_list dp_colorspaces[] = {
+	/* For Default case, driver will set the colorspace */
+	{ DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED, "RGB_Wide_Gamut_Fixed_Point" },
+	/* Colorimetry based on scRGB (IEC 61966-2-2) */
+	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT, "RGB_Wide_Gamut_Floating_Point" },
+	/* Colorimetry based on IEC 61966-2-5 */
+	{ DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
+	/* Colorimetry based on SMPTE RP 431-2 */
+	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65, "DCI-P3_RGB_D65" },
+	/* Colorimetry based on ITU-R BT.2020 */
+	{ DRM_MODE_COLORIMETRY_BT2020_RGB, "BT2020_RGB" },
+	{ DRM_MODE_COLORIMETRY_BT601_YCC, "BT601_YCC" },
+	{ DRM_MODE_COLORIMETRY_BT709_YCC, "BT709_YCC" },
+	/* Standard Definition Colorimetry based on IEC 61966-2-4 */
+	{ DRM_MODE_COLORIMETRY_XVYCC_601, "XVYCC_601" },
+	/* High Definition Colorimetry based on IEC 61966-2-4 */
+	{ DRM_MODE_COLORIMETRY_XVYCC_709, "XVYCC_709" },
+	/* Colorimetry based on IEC 61966-2-1/Amendment 1 */
+	{ DRM_MODE_COLORIMETRY_SYCC_601, "SYCC_601" },
+	/* Colorimetry based on IEC 61966-2-5 [33] */
+	{ DRM_MODE_COLORIMETRY_OPYCC_601, "opYCC_601" },
+	/* Colorimetry based on ITU-R BT.2020 */
+	{ DRM_MODE_COLORIMETRY_BT2020_CYCC, "BT2020_CYCC" },
+	/* Colorimetry based on ITU-R BT.2020 */
+	{ DRM_MODE_COLORIMETRY_BT2020_YCC, "BT2020_YCC" },
+};
+
 /**
  * DOC: standard connector properties
  *
@@ -1674,7 +1706,6 @@ EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
  * DOC: standard connector properties
  *
  * Colorspace:
- *     drm_mode_create_colorspace_property - create colorspace property
  *     This property helps select a suitable colorspace based on the sink
  *     capability. Modern sink devices support wider gamut like BT2020.
  *     This helps switch to BT2020 mode if the BT2020 encoded video stream
@@ -1694,32 +1725,68 @@ EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
  *      - This property is just to inform sink what colorspace
  *        source is trying to drive.
  *
+ * Because between HDMI and DP have different colorspaces,
+ * drm_mode_create_hdmi_colorspace_property() is used for HDMI connector and
+ * drm_mode_create_dp_colorspace_property() is used for DP connector.
+ */
+
+/**
+ * drm_mode_create_hdmi_colorspace_property - create hdmi colorspace property
+ * @connector: connector to create the Colorspace property on.
+ *
  * Called by a driver the first time it's needed, must be attached to desired
- * connectors.
+ * HDMI connectors.
+ *
+ * Returns:
+ * Zero on success, negative errono on failure.
  */
-int drm_mode_create_colorspace_property(struct drm_connector *connector)
+int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector)
 {
 	struct drm_device *dev = connector->dev;
-	struct drm_property *prop;
 
-	if (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
-	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
-		prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
-						"Colorspace",
-						hdmi_colorspaces,
-						ARRAY_SIZE(hdmi_colorspaces));
-		if (!prop)
-			return -ENOMEM;
-	} else {
-		DRM_DEBUG_KMS("Colorspace property not supported\n");
+	if (connector->colorspace_property)
 		return 0;
-	}
 
-	connector->colorspace_property = prop;
+	connector->colorspace_property =
+		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "Colorspace",
+					 hdmi_colorspaces,
+					 ARRAY_SIZE(hdmi_colorspaces));
+
+	if (!connector->colorspace_property)
+		return -ENOMEM;
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_mode_create_hdmi_colorspace_property);
+
+/**
+ * drm_mode_create_dp_colorspace_property - create dp colorspace property
+ * @connector: connector to create the Colorspace property on.
+ *
+ * Called by a driver the first time it's needed, must be attached to desired
+ * DP connectors.
+ *
+ * Returns:
+ * Zero on success, negative errono on failure.
+ */
+int drm_mode_create_dp_colorspace_property(struct drm_connector *connector)
+{
+	struct drm_device *dev = connector->dev;
+
+	if (connector->colorspace_property)
+		return 0;
+
+	connector->colorspace_property =
+		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "Colorspace",
+					 dp_colorspaces,
+					 ARRAY_SIZE(dp_colorspaces));
+
+	if (!connector->colorspace_property)
+		return -ENOMEM;
 
 	return 0;
 }
-EXPORT_SYMBOL(drm_mode_create_colorspace_property);
+EXPORT_SYMBOL(drm_mode_create_dp_colorspace_property);
 
 /**
  * drm_mode_create_content_type_property - create content type property
diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c
index 308ec63207ee..1133c4e97bb4 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -277,7 +277,22 @@ intel_attach_aspect_ratio_property(struct drm_connector *connector)
 void
 intel_attach_colorspace_property(struct drm_connector *connector)
 {
-	if (!drm_mode_create_colorspace_property(connector))
-		drm_object_attach_property(&connector->base,
-					   connector->colorspace_property, 0);
+	switch (connector->connector_type) {
+	case DRM_MODE_CONNECTOR_HDMIA:
+	case DRM_MODE_CONNECTOR_HDMIB:
+		if (drm_mode_create_hdmi_colorspace_property(connector))
+			return;
+		break;
+	case DRM_MODE_CONNECTOR_DisplayPort:
+	case DRM_MODE_CONNECTOR_eDP:
+		if (drm_mode_create_dp_colorspace_property(connector))
+			return;
+		break;
+	default:
+		DRM_DEBUG_KMS("Colorspace property not supported\n");
+		return;
+	}
+
+	drm_object_attach_property(&connector->base,
+				   connector->colorspace_property, 0);
 }
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 681cb590f952..475959ddb388 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -281,6 +281,10 @@ enum drm_panel_orientation {
 /* Additional Colorimetry extension added as part of CTA 861.G */
 #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65		11
 #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER		12
+/* Additional Colorimetry Options added for DP 1.4a VSC Colorimetry Format */
+#define DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED		13
+#define DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT		14
+#define DRM_MODE_COLORIMETRY_BT601_YCC			15
 
 /**
  * enum drm_bus_flags - bus_flags info for &drm_display_info
@@ -1523,7 +1527,8 @@ int drm_connector_attach_scaling_mode_property(struct drm_connector *connector,
 int drm_connector_attach_vrr_capable_property(
 		struct drm_connector *connector);
 int drm_mode_create_aspect_ratio_property(struct drm_device *dev);
-int drm_mode_create_colorspace_property(struct drm_connector *connector);
+int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector);
+int drm_mode_create_dp_colorspace_property(struct drm_connector *connector);
 int drm_mode_create_content_type_property(struct drm_device *dev);
 void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe *frame,
 					 const struct drm_connector_state *conn_state);
-- 
2.23.0

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[PATCH v8 4/7] drm/i915/dp: Attach colorspace property

[Gwan-gyeong Mun]

It attaches the colorspace connector property to a DisplayPort connector.
Based on colorspace change, modeset will be triggered to switch to a new
colorspace.

Based on colorspace property value create a VSC SDP packet with appropriate
colorspace. This would help to enable wider color gamut like BT2020 on a
sink device.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3a8aef1c6036..7fe22b37474d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6448,6 +6448,8 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
 	else if (INTEL_GEN(dev_priv) >= 5)
 		drm_connector_attach_max_bpc_property(connector, 6, 12);
 
+	intel_attach_colorspace_property(connector);
+
 	if (intel_dp_is_edp(intel_dp)) {
 		u32 allowed_scalers;
 
-- 
2.23.0

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[PATCH v8 5/7] drm/i915: Add new GMP register size for GEN11

[Gwan-gyeong Mun]

According to Bspec, GEN11 and prior GEN11 have different register size for
HDR Metadata Infoframe SDP packet. It adds new VIDEO_DIP_GMP_DATA_SIZE for
GEN11. And it makes handle different register size for
HDMI_PACKET_TYPE_GAMUT_METADATA on hsw_dip_data_size() for each GEN
platforms. It addresses Uma's review comments.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 10 ++++++++--
 drivers/gpu/drm/i915/i915_reg.h           |  1 +
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index c500fc9154c8..287999b31217 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -189,13 +189,19 @@ hsw_dip_data_reg(struct drm_i915_private *dev_priv,
 	}
 }
 
-static int hsw_dip_data_size(unsigned int type)
+static int hsw_dip_data_size(struct drm_i915_private *dev_priv,
+			     unsigned int type)
 {
 	switch (type) {
 	case DP_SDP_VSC:
 		return VIDEO_DIP_VSC_DATA_SIZE;
 	case DP_SDP_PPS:
 		return VIDEO_DIP_PPS_DATA_SIZE;
+	case HDMI_PACKET_TYPE_GAMUT_METADATA:
+		if (INTEL_GEN(dev_priv) >= 11)
+			return VIDEO_DIP_GMP_DATA_SIZE;
+		else
+			return VIDEO_DIP_DATA_SIZE;
 	default:
 		return VIDEO_DIP_DATA_SIZE;
 	}
@@ -514,7 +520,7 @@ static void hsw_write_infoframe(struct intel_encoder *encoder,
 	int i;
 	u32 val = I915_READ(ctl_reg);
 
-	data_size = hsw_dip_data_size(type);
+	data_size = hsw_dip_data_size(dev_priv, type);
 
 	val &= ~hsw_infoframe_enable(type);
 	I915_WRITE(ctl_reg, val);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bf37ecebc82f..ff7f32b59363 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4677,6 +4677,7 @@ enum {
  * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte
  * of the infoframe structure specified by CEA-861. */
 #define   VIDEO_DIP_DATA_SIZE	32
+#define   VIDEO_DIP_GMP_DATA_SIZE	36
 #define   VIDEO_DIP_VSC_DATA_SIZE	36
 #define   VIDEO_DIP_PPS_DATA_SIZE	132
 #define VIDEO_DIP_CTL		_MMIO(0x61170)
-- 
2.23.0

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[PATCH v8 6/7] drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata

[Gwan-gyeong Mun]

Function intel_dp_setup_hdr_metadata_infoframe_sdp handles Infoframe SDP
header and data block setup for HDR Static Metadata. It enables writing of
HDR metadata infoframe SDP to panel. Support for HDR video was introduced
in DisplayPort 1.4. It implements the CTA-861-G standard for transport of
static HDR metadata. The HDR Metadata will be provided by userspace
compositors, based on blending policies and passed to the driver through
a blob property.

Because each of GEN11 and prior GEN11 have different register size for
HDR Metadata Infoframe SDP packet, it adds and uses different register
size.

Setup Infoframe SDP header and data block in function
intel_dp_setup_hdr_metadata_infoframe_sdp for HDR Static Metadata as per
dp 1.4 spec and CTA-861-F spec.
As per DP 1.4 spec, 2.2.2.5 SDP Formats. It enables Dynamic Range and
Mastering Infoframe for HDR content, which is defined in CTA-861-F spec.
According to DP 1.4 spec and CEA-861-F spec Table 5, in order to transmit
static HDR metadata, we have to use Non-audio INFOFRAME SDP v1.3.

+--------------------------------+-------------------------------+
|      [ Packet Type Value ]     |       [ Packet Type ]         |
+--------------------------------+-------------------------------+
| 80h + Non-audio INFOFRAME Type | CEA-861-F Non-audio INFOFRAME |
+--------------------------------+-------------------------------+
|      [Transmission Timing]                                     |
+----------------------------------------------------------------+
| As per CEA-861-F for INFOFRAME, including CEA-861.3 within     |
| which Dynamic Range and Mastering INFOFRAME are defined        |
+----------------------------------------------------------------+

v2: Add a missed blank line after function declaration.
v3: Remove not handled return values from
    intel_dp_setup_hdr_metadata_infoframe_sdp(). [Uma]

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c  | 89 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h  |  3 +
 3 files changed, 93 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8dc030650801..306f6f9f0204 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3625,6 +3625,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
 	intel_edp_backlight_on(crtc_state, conn_state);
 	intel_psr_enable(intel_dp, crtc_state);
 	intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
+	intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
 	intel_edp_drrs_enable(intel_dp, crtc_state);
 
 	if (crtc_state->has_audio)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7fe22b37474d..abbf1d5c54c4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4599,6 +4599,83 @@ intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
 			crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp));
 }
 
+static void
+intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
+					  const struct intel_crtc_state *crtc_state,
+					  const struct drm_connector_state *conn_state)
+{
+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
+	struct dp_sdp infoframe_sdp = {};
+	struct hdmi_drm_infoframe drm_infoframe = {};
+	const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE;
+	unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE];
+	ssize_t len;
+	int ret;
+
+	ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe, conn_state);
+	if (ret) {
+		DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n");
+		return;
+	}
+
+	len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf, sizeof(buf));
+	if (len < 0) {
+		DRM_DEBUG_KMS("buffer size is smaller than hdr metadata infoframe\n");
+		return;
+	}
+
+	if (len != infoframe_size) {
+		DRM_DEBUG_KMS("wrong static hdr metadata size\n");
+		return;
+	}
+
+	/*
+	 * Set up the infoframe sdp packet for HDR static metadata.
+	 * Prepare VSC Header for SU as per DP 1.4a spec,
+	 * Table 2-100 and Table 2-101
+	 */
+
+	/* Packet ID, 00h for non-Audio INFOFRAME */
+	infoframe_sdp.sdp_header.HB0 = 0;
+	/*
+	 * Packet Type 80h + Non-audio INFOFRAME Type value
+	 * HDMI_INFOFRAME_TYPE_DRM: 0x87,
+	 */
+	infoframe_sdp.sdp_header.HB1 = drm_infoframe.type;
+	/*
+	 * Least Significant Eight Bits of (Data Byte Count – 1)
+	 * infoframe_size - 1,
+	 */
+	infoframe_sdp.sdp_header.HB2 = 0x1D;
+	/* INFOFRAME SDP Version Number */
+	infoframe_sdp.sdp_header.HB3 = (0x13 << 2);
+	/* CTA Header Byte 2 (INFOFRAME Version Number) */
+	infoframe_sdp.db[0] = drm_infoframe.version;
+	/* CTA Header Byte 3 (Length of INFOFRAME): HDMI_DRM_INFOFRAME_SIZE */
+	infoframe_sdp.db[1] = drm_infoframe.length;
+	/*
+	 * Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after
+	 * HDMI_INFOFRAME_HEADER_SIZE
+	 */
+	memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
+	       HDMI_DRM_INFOFRAME_SIZE);
+
+	if (INTEL_GEN(dev_priv) >= 11)
+		intel_dig_port->write_infoframe(&intel_dig_port->base,
+						crtc_state,
+						HDMI_PACKET_TYPE_GAMUT_METADATA,
+						&infoframe_sdp,
+						VIDEO_DIP_GMP_DATA_SIZE);
+	else
+		/* Prior to GEN11, Header size: 4 bytes, Data size: 28 bytes */
+		intel_dig_port->write_infoframe(&intel_dig_port->base,
+						crtc_state,
+						HDMI_PACKET_TYPE_GAMUT_METADATA,
+						&infoframe_sdp,
+						VIDEO_DIP_DATA_SIZE);
+}
+
 void intel_dp_vsc_enable(struct intel_dp *intel_dp,
 			 const struct intel_crtc_state *crtc_state,
 			 const struct drm_connector_state *conn_state)
@@ -4609,6 +4686,18 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp,
 	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
 }
 
+void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
+				  const struct intel_crtc_state *crtc_state,
+				  const struct drm_connector_state *conn_state)
+{
+	if (!conn_state->hdr_output_metadata)
+		return;
+
+	intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp,
+						  crtc_state,
+						  conn_state);
+}
+
 static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp)
 {
 	int status = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 87883d0d5977..5613073d1dd5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -116,6 +116,9 @@ bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state);
 void intel_dp_vsc_enable(struct intel_dp *intel_dp,
 			 const struct intel_crtc_state *crtc_state,
 			 const struct drm_connector_state *conn_state);
+void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
+				  const struct intel_crtc_state *crtc_state,
+				  const struct drm_connector_state *conn_state);
 bool intel_digital_port_connected(struct intel_encoder *encoder);
 
 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
-- 
2.23.0

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[PATCH v8 7/7] drm/i915/dp: Attach HDR metadata property to DP connector

[Gwan-gyeong Mun]

It attaches HDR metadata property to DP connector on GLK+.
It enables HDR metadata infoframe sdp on GLK+ to be used to send
HDR metadata to DP sink.

v2: Minor style fix

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index abbf1d5c54c4..4084b06fcbfc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6539,6 +6539,11 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
 
 	intel_attach_colorspace_property(connector);
 
+	if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 11)
+		drm_object_attach_property(&connector->base,
+					   connector->dev->mode_config.hdr_output_metadata_property,
+					   0);
+
 	if (intel_dp_is_edp(intel_dp)) {
 		u32 allowed_scalers;
 
-- 
2.23.0

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✓ Fi.CI.BAT: success for drm/i915/dp: Support for DP HDR outputs (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Support for DP HDR outputs (rev8)
URL   : https://patchwork.freedesktop.org/series/65656/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6897 -> Patchwork_14417
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/

Known issues
------------

  Here are the changes found in Patchwork_14417 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@vgem_basic@unload:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-icl-u3/igt@vgem_basic@unload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-icl-u3/igt@vgem_basic@unload.html

  
#### Possible fixes ####

  * igt@gem_ctx_create@basic-files:
    - {fi-icl-u4}:        [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-icl-u4/igt@gem_ctx_create@basic-files.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-icl-u4/igt@gem_ctx_create@basic-files.html

  * igt@gem_ctx_switch@legacy-render:
    - {fi-icl-guc}:       [INCOMPLETE][7] ([fdo#107713] / [fdo#111381]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html

  * {igt@i915_selftest@live_gt_timelines}:
    - fi-bsw-kefka:       [DMESG-WARN][9] ([fdo#111373]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-bsw-kefka/igt@i915_selftest@live_gt_timelines.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-bsw-kefka/igt@i915_selftest@live_gt_timelines.html

  * igt@vgem_basic@dmabuf-fence-before:
    - fi-icl-u3:          [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/fi-icl-u3/igt@vgem_basic@dmabuf-fence-before.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/fi-icl-u3/igt@vgem_basic@dmabuf-fence-before.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#111373]: https://bugs.freedesktop.org/show_bug.cgi?id=111373
  [fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381


Participating hosts (55 -> 49)
------------------------------

  Additional (1): fi-apl-guc 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6897 -> Patchwork_14417

  CI-20190529: 20190529
  CI_DRM_6897: 8ee6ca77b45a87f294a219eca4b467425a3ddc73 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5183: 6ddc1a143495baa68dbc909f2a8819ec03c31c8e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14417: 48a622358b97aa4ec3bc1b260dc59b21a909b425 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

48a622358b97 drm/i915/dp: Attach HDR metadata property to DP connector
c59fcbc86ed9 drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata
b28948dd22ab drm/i915: Add new GMP register size for GEN11
048ad15b79e8 drm/i915/dp: Attach colorspace property
b9e3151ed335 drm: Add DisplayPort colorspace property
2d996a4de847 drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA
643d69f4c283 drm/i915/dp: Extend program of VSC Header and DB for Colorimetry Format

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915/dp: Support for DP HDR outputs (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Support for DP HDR outputs (rev8)
URL   : https://patchwork.freedesktop.org/series/65656/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6897_full -> Patchwork_14417_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14417_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#110841])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#111325]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb3/igt@gem_exec_schedule@wide-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl1/igt@gem_softpin@noreloc-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl1/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-apl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [PASS][9] -> [DMESG-WARN][10] ([fdo#108566])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html

  * igt@kms_color@pipe-a-ctm-green-to-red:
    - shard-skl:          [PASS][11] -> [FAIL][12] ([fdo#107201])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl7/igt@kms_color@pipe-a-ctm-green-to-red.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl3/igt@kms_color@pipe-a-ctm-green-to-red.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite:
    - shard-iclb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#107713])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#103167])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([fdo#108145])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb2/igt@kms_psr@psr2_basic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb8/igt@kms_psr@psr2_basic.html

  * igt@kms_sequence@queue-idle:
    - shard-hsw:          [PASS][23] -> [INCOMPLETE][24] ([fdo#103540])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-hsw8/igt@kms_sequence@queue-idle.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-hsw6/igt@kms_sequence@queue-idle.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#109276]) +12 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb4/igt@prime_busy@hang-bsd2.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb6/igt@prime_busy@hang-bsd2.html

  * igt@tools_test@tools_test:
    - shard-kbl:          [PASS][27] -> [SKIP][28] ([fdo#109271])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-kbl2/igt@tools_test@tools_test.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-kbl7/igt@tools_test@tools_test.html

  
#### Possible fixes ####

  * igt@gem_ctx_switch@legacy-render-heavy:
    - shard-apl:          [INCOMPLETE][29] ([fdo#103927]) -> [PASS][30] +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-apl2/igt@gem_ctx_switch@legacy-render-heavy.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-apl2/igt@gem_ctx_switch@legacy-render-heavy.html

  * igt@gem_eio@in-flight-immediate:
    - shard-skl:          [FAIL][31] ([fdo#105957]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl7/igt@gem_eio@in-flight-immediate.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl8/igt@gem_eio@in-flight-immediate.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [SKIP][33] ([fdo#111325]) -> [PASS][34] +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][35] ([fdo#108566]) -> [PASS][36] +4 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-apl8/igt@i915_suspend@sysfs-reader.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-apl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque:
    - shard-skl:          [FAIL][37] ([fdo#103232]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html

  * igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled:
    - shard-iclb:         [FAIL][39] ([fdo#103184] / [fdo#103232]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb1/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb1/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [INCOMPLETE][41] ([fdo#109507]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
    - shard-iclb:         [FAIL][45] ([fdo#103167]) -> [PASS][46] +3 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-skl:          [INCOMPLETE][47] ([fdo#104108]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [FAIL][49] ([fdo#108145]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][51] ([fdo#108145] / [fdo#110403]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-iclb:         [SKIP][53] ([fdo#109441]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb8/igt@kms_psr@psr2_primary_mmap_gtt.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][55] ([fdo#99912]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-apl2/igt@kms_setmode@basic.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-apl1/igt@kms_setmode@basic.html
    - shard-skl:          [FAIL][57] ([fdo#99912]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-skl3/igt@kms_setmode@basic.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-skl8/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-kbl:          [INCOMPLETE][59] ([fdo#103665]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-kbl2/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-kbl3/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [SKIP][61] ([fdo#109276]) -> [PASS][62] +23 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][63] ([fdo#111330]) -> [SKIP][64] ([fdo#109276]) +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6897/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/shard-iclb8/igt@gem_mocs_settings@mocs-reset-bsd2.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105957]: https://bugs.freedesktop.org/show_bug.cgi?id=105957
  [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6897 -> Patchwork_14417

  CI-20190529: 20190529
  CI_DRM_6897: 8ee6ca77b45a87f294a219eca4b467425a3ddc73 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5183: 6ddc1a143495baa68dbc909f2a8819ec03c31c8e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14417: 48a622358b97aa4ec3bc1b260dc59b21a909b425 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14417/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v8 3/7] drm: Add DisplayPort colorspace property

[Ville Syrjälä]

On Mon, Sep 16, 2019 at 10:11:46AM +0300, Gwan-gyeong Mun wrote:
> Because between HDMI and DP have different colorspaces, it renames
> drm_mode_create_colorspace_property() function to
> drm_mode_create_hdmi_colorspace_property() function for HDMI connector.
> And it adds drm_mode_create_dp_colorspace_property() function for creating
> of DP colorspace property.
> In order to apply changed and added drm api, i915 driver has channged.
> 
> v3: Addressed review comments from Ville
>     - Add new colorimetry options for DP 1.4a spec.
>     - Separate set of colorimetry enum values for DP.
> v4: Add additional comments to struct drm_prop_enum_list.
>     Polishing an enum string of struct drm_prop_enum_list
> v5: Change definitions of DRM_MODE_COLORIMETRYs to follow HDMI prefix and
>     DP abbreviations.
>     Add missed variables on dp_colorspaces.
>     Fix typo. [Uma]
> v6: Addressed review comments from Ilia and Ville
>    - Split drm_mode_create_colorspace_property() to DP and HDMI connector.
> v7: Fix typo [Jani Saarinen]
>     Fix white space.
> v8: Addressed review comments from Ville
>    - Drop colorimetries which have another way to distinguish or which
>      would not be used.
> 
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/drm_connector.c               | 101 +++++++++++++++---
>  .../gpu/drm/i915/display/intel_connector.c    |  21 +++-

The i915 part shouldn't be here. Looks like you can just move that
hunk into the next patch.

>  include/drm/drm_connector.h                   |   7 +-
>  3 files changed, 108 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 4c766624b20d..57c97949081a 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -882,6 +882,38 @@ static const struct drm_prop_enum_list hdmi_colorspaces[] = {
>  	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER, "DCI-P3_RGB_Theater" },
>  };
>  
> +/*
> + * As per DP 1.4a spec, 2.2.5.7.5 VSC SDP Payload for Pixel Encoding/Colorimetry
> + * Format Table 2-120
> + */
> +static const struct drm_prop_enum_list dp_colorspaces[] = {
> +	/* For Default case, driver will set the colorspace */
> +	{ DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
> +	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED, "RGB_Wide_Gamut_Fixed_Point" },
> +	/* Colorimetry based on scRGB (IEC 61966-2-2) */
> +	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT, "RGB_Wide_Gamut_Floating_Point" },
> +	/* Colorimetry based on IEC 61966-2-5 */
> +	{ DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
> +	/* Colorimetry based on SMPTE RP 431-2 */
> +	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65, "DCI-P3_RGB_D65" },
> +	/* Colorimetry based on ITU-R BT.2020 */
> +	{ DRM_MODE_COLORIMETRY_BT2020_RGB, "BT2020_RGB" },
> +	{ DRM_MODE_COLORIMETRY_BT601_YCC, "BT601_YCC" },
> +	{ DRM_MODE_COLORIMETRY_BT709_YCC, "BT709_YCC" },
> +	/* Standard Definition Colorimetry based on IEC 61966-2-4 */
> +	{ DRM_MODE_COLORIMETRY_XVYCC_601, "XVYCC_601" },
> +	/* High Definition Colorimetry based on IEC 61966-2-4 */
> +	{ DRM_MODE_COLORIMETRY_XVYCC_709, "XVYCC_709" },
> +	/* Colorimetry based on IEC 61966-2-1/Amendment 1 */
> +	{ DRM_MODE_COLORIMETRY_SYCC_601, "SYCC_601" },
> +	/* Colorimetry based on IEC 61966-2-5 [33] */
> +	{ DRM_MODE_COLORIMETRY_OPYCC_601, "opYCC_601" },
> +	/* Colorimetry based on ITU-R BT.2020 */
> +	{ DRM_MODE_COLORIMETRY_BT2020_CYCC, "BT2020_CYCC" },
> +	/* Colorimetry based on ITU-R BT.2020 */
> +	{ DRM_MODE_COLORIMETRY_BT2020_YCC, "BT2020_YCC" },
> +};
> +
>  /**
>   * DOC: standard connector properties
>   *
> @@ -1674,7 +1706,6 @@ EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
>   * DOC: standard connector properties
>   *
>   * Colorspace:
> - *     drm_mode_create_colorspace_property - create colorspace property
>   *     This property helps select a suitable colorspace based on the sink
>   *     capability. Modern sink devices support wider gamut like BT2020.
>   *     This helps switch to BT2020 mode if the BT2020 encoded video stream
> @@ -1694,32 +1725,68 @@ EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
>   *      - This property is just to inform sink what colorspace
>   *        source is trying to drive.
>   *
> + * Because between HDMI and DP have different colorspaces,
> + * drm_mode_create_hdmi_colorspace_property() is used for HDMI connector and
> + * drm_mode_create_dp_colorspace_property() is used for DP connector.
> + */
> +
> +/**
> + * drm_mode_create_hdmi_colorspace_property - create hdmi colorspace property
> + * @connector: connector to create the Colorspace property on.
> + *
>   * Called by a driver the first time it's needed, must be attached to desired
> - * connectors.
> + * HDMI connectors.
> + *
> + * Returns:
> + * Zero on success, negative errono on failure.
>   */
> -int drm_mode_create_colorspace_property(struct drm_connector *connector)
> +int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector)
>  {
>  	struct drm_device *dev = connector->dev;
> -	struct drm_property *prop;
>  
> -	if (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
> -	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
> -		prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
> -						"Colorspace",
> -						hdmi_colorspaces,
> -						ARRAY_SIZE(hdmi_colorspaces));
> -		if (!prop)
> -			return -ENOMEM;
> -	} else {
> -		DRM_DEBUG_KMS("Colorspace property not supported\n");
> +	if (connector->colorspace_property)
>  		return 0;
> -	}
>  
> -	connector->colorspace_property = prop;
> +	connector->colorspace_property =
> +		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "Colorspace",
> +					 hdmi_colorspaces,
> +					 ARRAY_SIZE(hdmi_colorspaces));
> +
> +	if (!connector->colorspace_property)
> +		return -ENOMEM;
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL(drm_mode_create_hdmi_colorspace_property);
> +
> +/**
> + * drm_mode_create_dp_colorspace_property - create dp colorspace property
> + * @connector: connector to create the Colorspace property on.
> + *
> + * Called by a driver the first time it's needed, must be attached to desired
> + * DP connectors.
> + *
> + * Returns:
> + * Zero on success, negative errono on failure.
> + */
> +int drm_mode_create_dp_colorspace_property(struct drm_connector *connector)
> +{
> +	struct drm_device *dev = connector->dev;
> +
> +	if (connector->colorspace_property)
> +		return 0;
> +
> +	connector->colorspace_property =
> +		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "Colorspace",
> +					 dp_colorspaces,
> +					 ARRAY_SIZE(dp_colorspaces));
> +
> +	if (!connector->colorspace_property)
> +		return -ENOMEM;
>  
>  	return 0;
>  }
> -EXPORT_SYMBOL(drm_mode_create_colorspace_property);
> +EXPORT_SYMBOL(drm_mode_create_dp_colorspace_property);
>  
>  /**
>   * drm_mode_create_content_type_property - create content type property
> diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c
> index 308ec63207ee..1133c4e97bb4 100644
> --- a/drivers/gpu/drm/i915/display/intel_connector.c
> +++ b/drivers/gpu/drm/i915/display/intel_connector.c
> @@ -277,7 +277,22 @@ intel_attach_aspect_ratio_property(struct drm_connector *connector)
>  void
>  intel_attach_colorspace_property(struct drm_connector *connector)
>  {
> -	if (!drm_mode_create_colorspace_property(connector))
> -		drm_object_attach_property(&connector->base,
> -					   connector->colorspace_property, 0);
> +	switch (connector->connector_type) {
> +	case DRM_MODE_CONNECTOR_HDMIA:
> +	case DRM_MODE_CONNECTOR_HDMIB:
> +		if (drm_mode_create_hdmi_colorspace_property(connector))
> +			return;
> +		break;
> +	case DRM_MODE_CONNECTOR_DisplayPort:
> +	case DRM_MODE_CONNECTOR_eDP:
> +		if (drm_mode_create_dp_colorspace_property(connector))
> +			return;
> +		break;
> +	default:
> +		DRM_DEBUG_KMS("Colorspace property not supported\n");
> +		return;
> +	}
> +
> +	drm_object_attach_property(&connector->base,
> +				   connector->colorspace_property, 0);
>  }
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 681cb590f952..475959ddb388 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -281,6 +281,10 @@ enum drm_panel_orientation {
>  /* Additional Colorimetry extension added as part of CTA 861.G */
>  #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65		11
>  #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER		12
> +/* Additional Colorimetry Options added for DP 1.4a VSC Colorimetry Format */
> +#define DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED		13
> +#define DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT		14
> +#define DRM_MODE_COLORIMETRY_BT601_YCC			15
>  
>  /**
>   * enum drm_bus_flags - bus_flags info for &drm_display_info
> @@ -1523,7 +1527,8 @@ int drm_connector_attach_scaling_mode_property(struct drm_connector *connector,
>  int drm_connector_attach_vrr_capable_property(
>  		struct drm_connector *connector);
>  int drm_mode_create_aspect_ratio_property(struct drm_device *dev);
> -int drm_mode_create_colorspace_property(struct drm_connector *connector);
> +int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connector);
> +int drm_mode_create_dp_colorspace_property(struct drm_connector *connector);
>  int drm_mode_create_content_type_property(struct drm_device *dev);
>  void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe *frame,
>  					 const struct drm_connector_state *conn_state);
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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Re: [PATCH v8 6/7] drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata

[Ville Syrjälä]

On Mon, Sep 16, 2019 at 10:11:49AM +0300, Gwan-gyeong Mun wrote:
> Function intel_dp_setup_hdr_metadata_infoframe_sdp handles Infoframe SDP
> header and data block setup for HDR Static Metadata. It enables writing of
> HDR metadata infoframe SDP to panel. Support for HDR video was introduced
> in DisplayPort 1.4. It implements the CTA-861-G standard for transport of
> static HDR metadata. The HDR Metadata will be provided by userspace
> compositors, based on blending policies and passed to the driver through
> a blob property.
> 
> Because each of GEN11 and prior GEN11 have different register size for
> HDR Metadata Infoframe SDP packet, it adds and uses different register
> size.
> 
> Setup Infoframe SDP header and data block in function
> intel_dp_setup_hdr_metadata_infoframe_sdp for HDR Static Metadata as per
> dp 1.4 spec and CTA-861-F spec.
> As per DP 1.4 spec, 2.2.2.5 SDP Formats. It enables Dynamic Range and
> Mastering Infoframe for HDR content, which is defined in CTA-861-F spec.
> According to DP 1.4 spec and CEA-861-F spec Table 5, in order to transmit
> static HDR metadata, we have to use Non-audio INFOFRAME SDP v1.3.
> 
> +--------------------------------+-------------------------------+
> |      [ Packet Type Value ]     |       [ Packet Type ]         |
> +--------------------------------+-------------------------------+
> | 80h + Non-audio INFOFRAME Type | CEA-861-F Non-audio INFOFRAME |
> +--------------------------------+-------------------------------+
> |      [Transmission Timing]                                     |
> +----------------------------------------------------------------+
> | As per CEA-861-F for INFOFRAME, including CEA-861.3 within     |
> | which Dynamic Range and Mastering INFOFRAME are defined        |
> +----------------------------------------------------------------+
> 
> v2: Add a missed blank line after function declaration.
> v3: Remove not handled return values from
>     intel_dp_setup_hdr_metadata_infoframe_sdp(). [Uma]
> 
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  1 +
>  drivers/gpu/drm/i915/display/intel_dp.c  | 89 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_dp.h  |  3 +
>  3 files changed, 93 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 8dc030650801..306f6f9f0204 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3625,6 +3625,7 @@ static void intel_enable_ddi_dp(struct intel_encoder *encoder,
>  	intel_edp_backlight_on(crtc_state, conn_state);
>  	intel_psr_enable(intel_dp, crtc_state);
>  	intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
> +	intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
>  	intel_edp_drrs_enable(intel_dp, crtc_state);
>  
>  	if (crtc_state->has_audio)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7fe22b37474d..abbf1d5c54c4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4599,6 +4599,83 @@ intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
>  			crtc_state, DP_SDP_VSC, &vsc_sdp, sizeof(vsc_sdp));
>  }
>  
> +static void
> +intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> +					  const struct intel_crtc_state *crtc_state,
> +					  const struct drm_connector_state *conn_state)
> +{
> +	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> +	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
> +	struct dp_sdp infoframe_sdp = {};
> +	struct hdmi_drm_infoframe drm_infoframe = {};
> +	const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE;
> +	unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE + HDMI_DRM_INFOFRAME_SIZE];
> +	ssize_t len;
> +	int ret;
> +
> +	ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe, conn_state);
> +	if (ret) {
> +		DRM_DEBUG_KMS("couldn't set HDR metadata in infoframe\n");
> +		return;
> +	}
> +
> +	len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf, sizeof(buf));
> +	if (len < 0) {
> +		DRM_DEBUG_KMS("buffer size is smaller than hdr metadata infoframe\n");
> +		return;
> +	}
> +
> +	if (len != infoframe_size) {
> +		DRM_DEBUG_KMS("wrong static hdr metadata size\n");
> +		return;
> +	}
> +
> +	/*
> +	 * Set up the infoframe sdp packet for HDR static metadata.
> +	 * Prepare VSC Header for SU as per DP 1.4a spec,
> +	 * Table 2-100 and Table 2-101
> +	 */
> +
> +	/* Packet ID, 00h for non-Audio INFOFRAME */
> +	infoframe_sdp.sdp_header.HB0 = 0;
> +	/*
> +	 * Packet Type 80h + Non-audio INFOFRAME Type value
> +	 * HDMI_INFOFRAME_TYPE_DRM: 0x87,
> +	 */
> +	infoframe_sdp.sdp_header.HB1 = drm_infoframe.type;
> +	/*
> +	 * Least Significant Eight Bits of (Data Byte Count – 1)
> +	 * infoframe_size - 1,
> +	 */
> +	infoframe_sdp.sdp_header.HB2 = 0x1D;
> +	/* INFOFRAME SDP Version Number */
> +	infoframe_sdp.sdp_header.HB3 = (0x13 << 2);
> +	/* CTA Header Byte 2 (INFOFRAME Version Number) */
> +	infoframe_sdp.db[0] = drm_infoframe.version;
> +	/* CTA Header Byte 3 (Length of INFOFRAME): HDMI_DRM_INFOFRAME_SIZE */
> +	infoframe_sdp.db[1] = drm_infoframe.length;
> +	/*
> +	 * Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after
> +	 * HDMI_INFOFRAME_HEADER_SIZE
> +	 */
> +	memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
> +	       HDMI_DRM_INFOFRAME_SIZE);
> +
> +	if (INTEL_GEN(dev_priv) >= 11)
> +		intel_dig_port->write_infoframe(&intel_dig_port->base,
> +						crtc_state,
> +						HDMI_PACKET_TYPE_GAMUT_METADATA,
> +						&infoframe_sdp,
> +						VIDEO_DIP_GMP_DATA_SIZE);
> +	else
> +		/* Prior to GEN11, Header size: 4 bytes, Data size: 28 bytes */
> +		intel_dig_port->write_infoframe(&intel_dig_port->base,
> +						crtc_state,
> +						HDMI_PACKET_TYPE_GAMUT_METADATA,
> +						&infoframe_sdp,
> +						VIDEO_DIP_DATA_SIZE);

This looks suspicious. Why is this not just something like sizeof(sdp)?

> +}
> +
>  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
>  			 const struct intel_crtc_state *crtc_state,
>  			 const struct drm_connector_state *conn_state)
> @@ -4609,6 +4686,18 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp,
>  	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
>  }
>  
> +void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
> +				  const struct intel_crtc_state *crtc_state,
> +				  const struct drm_connector_state *conn_state)
> +{
> +	if (!conn_state->hdr_output_metadata)
> +		return;
> +
> +	intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp,
> +						  crtc_state,
> +						  conn_state);
> +}
> +
>  static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp)
>  {
>  	int status = 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 87883d0d5977..5613073d1dd5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -116,6 +116,9 @@ bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state);
>  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
>  			 const struct intel_crtc_state *crtc_state,
>  			 const struct drm_connector_state *conn_state);
> +void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
> +				  const struct intel_crtc_state *crtc_state,
> +				  const struct drm_connector_state *conn_state);
>  bool intel_digital_port_connected(struct intel_encoder *encoder);
>  
>  static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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Re: [PATCH v8 2/7] drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA

[Ville Syrjälä]

On Mon, Sep 16, 2019 at 10:11:45AM +0300, Gwan-gyeong Mun wrote:
> When BT.2020 Colorimetry output is used for DP, we should program BT.2020
> Colorimetry to MSA and VSC SDP. It adds output_colorspace to
> intel_crtc_state struct as a place holder of pipe's output colorspace.
> In order to distinguish needed colorimetry for VSC SDP, it adds
> intel_dp_needs_vsc_sdp function.
> If the output colorspace requires vsc sdp or output format is YCbCr 4:2:0,
> it uses MSA with VSC SDP.
> 
> As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication of
> Color Encoding Format and Content Color Gamut] while sending
> BT.2020 Colorimetry signals we should program MSA MISC1 fields which
> indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> 
> v2: Remove useless parentheses
> v3: Addressed review comments from Ville
>     - In order to checking output format and output colorspace on
>       intel_dp_needs_vsc_sdp(), it passes entire intel_crtc_state struct
>       value.
>     - Remove a pointless variable.
> 
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +++--
>  .../drm/i915/display/intel_display_types.h    |  3 ++
>  drivers/gpu/drm/i915/display/intel_dp.c       | 29 ++++++++++++++++++-
>  drivers/gpu/drm/i915/display/intel_dp.h       |  1 +
>  4 files changed, 36 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 98d69febd8e3..8dc030650801 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1737,11 +1737,12 @@ void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state)
>  	/*
>  	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication
>  	 * of Color Encoding Format and Content Color Gamut] while sending
> -	 * YCBCR 420 signals we should program MSA MISC1 fields which
> -	 * indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> +	 * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1 fields
> +	 * which indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
>  	 */
> -	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> +	if (intel_dp_needs_vsc_sdp(crtc_state))
>  		temp |= TRANS_MSA_USE_VSC_SDP;
> +
>  	I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d5cc4b810d9e..4108570907d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -971,6 +971,9 @@ struct intel_crtc_state {
>  	/* Output format RGB/YCBCR etc */
>  	enum intel_output_format output_format;
>  
> +	/* Output colorspace sRGB/BT.2020 etc */
> +	u32 output_colorspace;

Why are we duplicating this? It's already in the connector state no?

> +
>  	/* Output down scaling is done in LSPCON device */
>  	bool lspcon_downsampling;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index a2a0214f771a..3a8aef1c6036 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2187,6 +2187,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  		pipe_config->has_pch_encoder = true;
>  
>  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> +	pipe_config->output_colorspace = intel_conn_state->base.colorspace;
> +
>  	if (lspcon->active)
>  		lspcon_ycbcr420_config(&intel_connector->base, pipe_config);
>  	else
> @@ -4448,6 +4450,31 @@ u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
>  	return 0;
>  }
>  
> +bool
> +intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state)
> +{
> +	/*
> +	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication
> +	 * of Color Encoding Format and Content Color Gamut], in order to
> +	 * sending YCBCR 420 or HDR BT.2020 signals we should use DP VSC SDP.
> +	 */
> +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> +		return true;
> +
> +	switch (crtc_state->output_colorspace) {
> +	case DRM_MODE_COLORIMETRY_SYCC_601:
> +	case DRM_MODE_COLORIMETRY_OPYCC_601:
> +	case DRM_MODE_COLORIMETRY_BT2020_YCC:
> +	case DRM_MODE_COLORIMETRY_BT2020_RGB:
> +	case DRM_MODE_COLORIMETRY_BT2020_CYCC:
> +		return true;
> +	default:
> +		break;
> +	}
> +
> +	return false;
> +}
> +
>  static void
>  intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
>  		       const struct intel_crtc_state *crtc_state,
> @@ -4576,7 +4603,7 @@ void intel_dp_vsc_enable(struct intel_dp *intel_dp,
>  			 const struct intel_crtc_state *crtc_state,
>  			 const struct drm_connector_state *conn_state)
>  {
> -	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> +	if (!intel_dp_needs_vsc_sdp(crtc_state))
>  		return;
>  
>  	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index be13cb395ef8..87883d0d5977 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -112,6 +112,7 @@ bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
>  bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
>  int intel_dp_link_required(int pixel_clock, int bpp);
>  int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
> +bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state);
>  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
>  			 const struct intel_crtc_state *crtc_state,
>  			 const struct drm_connector_state *conn_state);
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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Re: [PATCH v8 2/7] drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSA

[Mun, Gwan-gyeong]

On Wed, 2019-09-18 at 17:15 +0300, Ville Syrjälä wrote:
> On Mon, Sep 16, 2019 at 10:11:45AM +0300, Gwan-gyeong Mun wrote:
> > When BT.2020 Colorimetry output is used for DP, we should program
> > BT.2020
> > Colorimetry to MSA and VSC SDP. It adds output_colorspace to
> > intel_crtc_state struct as a place holder of pipe's output
> > colorspace.
> > In order to distinguish needed colorimetry for VSC SDP, it adds
> > intel_dp_needs_vsc_sdp function.
> > If the output colorspace requires vsc sdp or output format is YCbCr
> > 4:2:0,
> > it uses MSA with VSC SDP.
> > 
> > As per DP 1.4a spec section 2.2.4.3 [MSA Field for Indication of
> > Color Encoding Format and Content Color Gamut] while sending
> > BT.2020 Colorimetry signals we should program MSA MISC1 fields
> > which
> > indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> > 
> > v2: Remove useless parentheses
> > v3: Addressed review comments from Ville
> >     - In order to checking output format and output colorspace on
> >       intel_dp_needs_vsc_sdp(), it passes entire intel_crtc_state
> > struct
> >       value.
> >     - Remove a pointless variable.
> > 
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 +++--
> >  .../drm/i915/display/intel_display_types.h    |  3 ++
> >  drivers/gpu/drm/i915/display/intel_dp.c       | 29
> > ++++++++++++++++++-
> >  drivers/gpu/drm/i915/display/intel_dp.h       |  1 +
> >  4 files changed, 36 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 98d69febd8e3..8dc030650801 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1737,11 +1737,12 @@ void intel_ddi_set_pipe_settings(const
> > struct intel_crtc_state *crtc_state)
> >  	/*
> >  	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for
> > Indication
> >  	 * of Color Encoding Format and Content Color Gamut] while
> > sending
> > -	 * YCBCR 420 signals we should program MSA MISC1 fields which
> > -	 * indicate VSC SDP for the Pixel Encoding/Colorimetry Format.
> > +	 * YCBCR 420, HDR BT.2020 signals we should program MSA MISC1
> > fields
> > +	 * which indicate VSC SDP for the Pixel Encoding/Colorimetry
> > Format.
> >  	 */
> > -	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> > +	if (intel_dp_needs_vsc_sdp(crtc_state))
> >  		temp |= TRANS_MSA_USE_VSC_SDP;
> > +
> >  	I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
> >  }
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index d5cc4b810d9e..4108570907d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -971,6 +971,9 @@ struct intel_crtc_state {
> >  	/* Output format RGB/YCBCR etc */
> >  	enum intel_output_format output_format;
> >  
> > +	/* Output colorspace sRGB/BT.2020 etc */
> > +	u32 output_colorspace;
> 
> Why are we duplicating this? It's already in the connector state no?
I'll remove a duplicated output color space from intel_crtc_state. And
in order to handle colorspace of drm_connector_state, I'll moves a
calling of intel_ddi_set_pipe_settings() function into
intel_ddi_pre_enable_dp().

> 
> > +
> >  	/* Output down scaling is done in LSPCON device */
> >  	bool lspcon_downsampling;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index a2a0214f771a..3a8aef1c6036 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2187,6 +2187,8 @@ intel_dp_compute_config(struct intel_encoder
> > *encoder,
> >  		pipe_config->has_pch_encoder = true;
> >  
> >  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > +	pipe_config->output_colorspace = intel_conn_state-
> > >base.colorspace;
> > +
> >  	if (lspcon->active)
> >  		lspcon_ycbcr420_config(&intel_connector->base,
> > pipe_config);
> >  	else
> > @@ -4448,6 +4450,31 @@ u8 intel_dp_dsc_get_slice_count(struct
> > intel_dp *intel_dp,
> >  	return 0;
> >  }
> >  
> > +bool
> > +intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state)
> > +{
> > +	/*
> > +	 * As per DP 1.4a spec section 2.2.4.3 [MSA Field for
> > Indication
> > +	 * of Color Encoding Format and Content Color Gamut], in order
> > to
> > +	 * sending YCBCR 420 or HDR BT.2020 signals we should use DP
> > VSC SDP.
> > +	 */
> > +	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> > +		return true;
> > +
> > +	switch (crtc_state->output_colorspace) {
> > +	case DRM_MODE_COLORIMETRY_SYCC_601:
> > +	case DRM_MODE_COLORIMETRY_OPYCC_601:
> > +	case DRM_MODE_COLORIMETRY_BT2020_YCC:
> > +	case DRM_MODE_COLORIMETRY_BT2020_RGB:
> > +	case DRM_MODE_COLORIMETRY_BT2020_CYCC:
> > +		return true;
> > +	default:
> > +		break;
> > +	}
> > +
> > +	return false;
> > +}
> > +
> >  static void
> >  intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
> >  		       const struct intel_crtc_state *crtc_state,
> > @@ -4576,7 +4603,7 @@ void intel_dp_vsc_enable(struct intel_dp
> > *intel_dp,
> >  			 const struct intel_crtc_state *crtc_state,
> >  			 const struct drm_connector_state *conn_state)
> >  {
> > -	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> > +	if (!intel_dp_needs_vsc_sdp(crtc_state))
> >  		return;
> >  
> >  	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index be13cb395ef8..87883d0d5977 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -112,6 +112,7 @@ bool intel_dp_read_dpcd(struct intel_dp
> > *intel_dp);
> >  bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
> >  int intel_dp_link_required(int pixel_clock, int bpp);
> >  int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
> > +bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state
> > *crtc_state);
> >  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
> >  			 const struct intel_crtc_state *crtc_state,
> >  			 const struct drm_connector_state *conn_state);
> > -- 
> > 2.23.0
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Re: [PATCH v8 3/7] drm: Add DisplayPort colorspace property

[Mun, Gwan-gyeong]

On Wed, 2019-09-18 at 17:08 +0300, Ville Syrjälä wrote:
> On Mon, Sep 16, 2019 at 10:11:46AM +0300, Gwan-gyeong Mun wrote:
> > Because between HDMI and DP have different colorspaces, it renames
> > drm_mode_create_colorspace_property() function to
> > drm_mode_create_hdmi_colorspace_property() function for HDMI
> > connector.
> > And it adds drm_mode_create_dp_colorspace_property() function for
> > creating
> > of DP colorspace property.
> > In order to apply changed and added drm api, i915 driver has
> > channged.
> > 
> > v3: Addressed review comments from Ville
> >     - Add new colorimetry options for DP 1.4a spec.
> >     - Separate set of colorimetry enum values for DP.
> > v4: Add additional comments to struct drm_prop_enum_list.
> >     Polishing an enum string of struct drm_prop_enum_list
> > v5: Change definitions of DRM_MODE_COLORIMETRYs to follow HDMI
> > prefix and
> >     DP abbreviations.
> >     Add missed variables on dp_colorspaces.
> >     Fix typo. [Uma]
> > v6: Addressed review comments from Ilia and Ville
> >    - Split drm_mode_create_colorspace_property() to DP and HDMI
> > connector.
> > v7: Fix typo [Jani Saarinen]
> >     Fix white space.
> > v8: Addressed review comments from Ville
> >    - Drop colorimetries which have another way to distinguish or
> > which
> >      would not be used.
> > 
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/drm_connector.c               | 101
> > +++++++++++++++---
> >  .../gpu/drm/i915/display/intel_connector.c    |  21 +++-
> 
> The i915 part shouldn't be here. Looks like you can just move that
> hunk into the next patch.
> 
Okay, I'll split hunk into renaming and adding of code.
> >  include/drm/drm_connector.h                   |   7 +-
> >  3 files changed, 108 insertions(+), 21 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_connector.c
> > b/drivers/gpu/drm/drm_connector.c
> > index 4c766624b20d..57c97949081a 100644
> > --- a/drivers/gpu/drm/drm_connector.c
> > +++ b/drivers/gpu/drm/drm_connector.c
> > @@ -882,6 +882,38 @@ static const struct drm_prop_enum_list
> > hdmi_colorspaces[] = {
> >  	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER, "DCI-P3_RGB_Theater" 
> > },
> >  };
> >  
> > +/*
> > + * As per DP 1.4a spec, 2.2.5.7.5 VSC SDP Payload for Pixel
> > Encoding/Colorimetry
> > + * Format Table 2-120
> > + */
> > +static const struct drm_prop_enum_list dp_colorspaces[] = {
> > +	/* For Default case, driver will set the colorspace */
> > +	{ DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
> > +	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED,
> > "RGB_Wide_Gamut_Fixed_Point" },
> > +	/* Colorimetry based on scRGB (IEC 61966-2-2) */
> > +	{ DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT,
> > "RGB_Wide_Gamut_Floating_Point" },
> > +	/* Colorimetry based on IEC 61966-2-5 */
> > +	{ DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
> > +	/* Colorimetry based on SMPTE RP 431-2 */
> > +	{ DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65, "DCI-P3_RGB_D65" },
> > +	/* Colorimetry based on ITU-R BT.2020 */
> > +	{ DRM_MODE_COLORIMETRY_BT2020_RGB, "BT2020_RGB" },
> > +	{ DRM_MODE_COLORIMETRY_BT601_YCC, "BT601_YCC" },
> > +	{ DRM_MODE_COLORIMETRY_BT709_YCC, "BT709_YCC" },
> > +	/* Standard Definition Colorimetry based on IEC 61966-2-4 */
> > +	{ DRM_MODE_COLORIMETRY_XVYCC_601, "XVYCC_601" },
> > +	/* High Definition Colorimetry based on IEC 61966-2-4 */
> > +	{ DRM_MODE_COLORIMETRY_XVYCC_709, "XVYCC_709" },
> > +	/* Colorimetry based on IEC 61966-2-1/Amendment 1 */
> > +	{ DRM_MODE_COLORIMETRY_SYCC_601, "SYCC_601" },
> > +	/* Colorimetry based on IEC 61966-2-5 [33] */
> > +	{ DRM_MODE_COLORIMETRY_OPYCC_601, "opYCC_601" },
> > +	/* Colorimetry based on ITU-R BT.2020 */
> > +	{ DRM_MODE_COLORIMETRY_BT2020_CYCC, "BT2020_CYCC" },
> > +	/* Colorimetry based on ITU-R BT.2020 */
> > +	{ DRM_MODE_COLORIMETRY_BT2020_YCC, "BT2020_YCC" },
> > +};
> > +
> >  /**
> >   * DOC: standard connector properties
> >   *
> > @@ -1674,7 +1706,6 @@
> > EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
> >   * DOC: standard connector properties
> >   *
> >   * Colorspace:
> > - *     drm_mode_create_colorspace_property - create colorspace
> > property
> >   *     This property helps select a suitable colorspace based on
> > the sink
> >   *     capability. Modern sink devices support wider gamut like
> > BT2020.
> >   *     This helps switch to BT2020 mode if the BT2020 encoded
> > video stream
> > @@ -1694,32 +1725,68 @@
> > EXPORT_SYMBOL(drm_mode_create_aspect_ratio_property);
> >   *      - This property is just to inform sink what colorspace
> >   *        source is trying to drive.
> >   *
> > + * Because between HDMI and DP have different colorspaces,
> > + * drm_mode_create_hdmi_colorspace_property() is used for HDMI
> > connector and
> > + * drm_mode_create_dp_colorspace_property() is used for DP
> > connector.
> > + */
> > +
> > +/**
> > + * drm_mode_create_hdmi_colorspace_property - create hdmi
> > colorspace property
> > + * @connector: connector to create the Colorspace property on.
> > + *
> >   * Called by a driver the first time it's needed, must be attached
> > to desired
> > - * connectors.
> > + * HDMI connectors.
> > + *
> > + * Returns:
> > + * Zero on success, negative errono on failure.
> >   */
> > -int drm_mode_create_colorspace_property(struct drm_connector
> > *connector)
> > +int drm_mode_create_hdmi_colorspace_property(struct drm_connector
> > *connector)
> >  {
> >  	struct drm_device *dev = connector->dev;
> > -	struct drm_property *prop;
> >  
> > -	if (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
> > -	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
> > -		prop = drm_property_create_enum(dev,
> > DRM_MODE_PROP_ENUM,
> > -						"Colorspace",
> > -						hdmi_colorspaces,
> > -						ARRAY_SIZE(hdmi_colorsp
> > aces));
> > -		if (!prop)
> > -			return -ENOMEM;
> > -	} else {
> > -		DRM_DEBUG_KMS("Colorspace property not supported\n");
> > +	if (connector->colorspace_property)
> >  		return 0;
> > -	}
> >  
> > -	connector->colorspace_property = prop;
> > +	connector->colorspace_property =
> > +		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
> > "Colorspace",
> > +					 hdmi_colorspaces,
> > +					 ARRAY_SIZE(hdmi_colorspaces));
> > +
> > +	if (!connector->colorspace_property)
> > +		return -ENOMEM;
> > +
> > +	return 0;
> > +}
> > +EXPORT_SYMBOL(drm_mode_create_hdmi_colorspace_property);
> > +
> > +/**
> > + * drm_mode_create_dp_colorspace_property - create dp colorspace
> > property
> > + * @connector: connector to create the Colorspace property on.
> > + *
> > + * Called by a driver the first time it's needed, must be attached
> > to desired
> > + * DP connectors.
> > + *
> > + * Returns:
> > + * Zero on success, negative errono on failure.
> > + */
> > +int drm_mode_create_dp_colorspace_property(struct drm_connector
> > *connector)
> > +{
> > +	struct drm_device *dev = connector->dev;
> > +
> > +	if (connector->colorspace_property)
> > +		return 0;
> > +
> > +	connector->colorspace_property =
> > +		drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
> > "Colorspace",
> > +					 dp_colorspaces,
> > +					 ARRAY_SIZE(dp_colorspaces));
> > +
> > +	if (!connector->colorspace_property)
> > +		return -ENOMEM;
> >  
> >  	return 0;
> >  }
> > -EXPORT_SYMBOL(drm_mode_create_colorspace_property);
> > +EXPORT_SYMBOL(drm_mode_create_dp_colorspace_property);
> >  
> >  /**
> >   * drm_mode_create_content_type_property - create content type
> > property
> > diff --git a/drivers/gpu/drm/i915/display/intel_connector.c
> > b/drivers/gpu/drm/i915/display/intel_connector.c
> > index 308ec63207ee..1133c4e97bb4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_connector.c
> > +++ b/drivers/gpu/drm/i915/display/intel_connector.c
> > @@ -277,7 +277,22 @@ intel_attach_aspect_ratio_property(struct
> > drm_connector *connector)
> >  void
> >  intel_attach_colorspace_property(struct drm_connector *connector)
> >  {
> > -	if (!drm_mode_create_colorspace_property(connector))
> > -		drm_object_attach_property(&connector->base,
> > -					   connector-
> > >colorspace_property, 0);
> > +	switch (connector->connector_type) {
> > +	case DRM_MODE_CONNECTOR_HDMIA:
> > +	case DRM_MODE_CONNECTOR_HDMIB:
> > +		if
> > (drm_mode_create_hdmi_colorspace_property(connector))
> > +			return;
> > +		break;
> > +	case DRM_MODE_CONNECTOR_DisplayPort:
> > +	case DRM_MODE_CONNECTOR_eDP:
> > +		if (drm_mode_create_dp_colorspace_property(connector))
> > +			return;
> > +		break;
> > +	default:
> > +		DRM_DEBUG_KMS("Colorspace property not supported\n");
> > +		return;
> > +	}
> > +
> > +	drm_object_attach_property(&connector->base,
> > +				   connector->colorspace_property, 0);
> >  }
> > diff --git a/include/drm/drm_connector.h
> > b/include/drm/drm_connector.h
> > index 681cb590f952..475959ddb388 100644
> > --- a/include/drm/drm_connector.h
> > +++ b/include/drm/drm_connector.h
> > @@ -281,6 +281,10 @@ enum drm_panel_orientation {
> >  /* Additional Colorimetry extension added as part of CTA 861.G */
> >  #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65		11
> >  #define DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER		12
> > +/* Additional Colorimetry Options added for DP 1.4a VSC
> > Colorimetry Format */
> > +#define DRM_MODE_COLORIMETRY_RGB_WIDE_FIXED		13
> > +#define DRM_MODE_COLORIMETRY_RGB_WIDE_FLOAT		14
> > +#define DRM_MODE_COLORIMETRY_BT601_YCC			15
> >  
> >  /**
> >   * enum drm_bus_flags - bus_flags info for &drm_display_info
> > @@ -1523,7 +1527,8 @@ int
> > drm_connector_attach_scaling_mode_property(struct drm_connector
> > *connector,
> >  int drm_connector_attach_vrr_capable_property(
> >  		struct drm_connector *connector);
> >  int drm_mode_create_aspect_ratio_property(struct drm_device *dev);
> > -int drm_mode_create_colorspace_property(struct drm_connector
> > *connector);
> > +int drm_mode_create_hdmi_colorspace_property(struct drm_connector
> > *connector);
> > +int drm_mode_create_dp_colorspace_property(struct drm_connector
> > *connector);
> >  int drm_mode_create_content_type_property(struct drm_device *dev);
> >  void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe
> > *frame,
> >  					 const struct
> > drm_connector_state *conn_state);
> > -- 
> > 2.23.0
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Re: [PATCH v8 6/7] drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static Metadata

[Mun, Gwan-gyeong]

On Wed, 2019-09-18 at 17:13 +0300, Ville Syrjälä wrote:
> On Mon, Sep 16, 2019 at 10:11:49AM +0300, Gwan-gyeong Mun wrote:
> > Function intel_dp_setup_hdr_metadata_infoframe_sdp handles
> > Infoframe SDP
> > header and data block setup for HDR Static Metadata. It enables
> > writing of
> > HDR metadata infoframe SDP to panel. Support for HDR video was
> > introduced
> > in DisplayPort 1.4. It implements the CTA-861-G standard for
> > transport of
> > static HDR metadata. The HDR Metadata will be provided by userspace
> > compositors, based on blending policies and passed to the driver
> > through
> > a blob property.
> > 
> > Because each of GEN11 and prior GEN11 have different register size
> > for
> > HDR Metadata Infoframe SDP packet, it adds and uses different
> > register
> > size.
> > 
> > Setup Infoframe SDP header and data block in function
> > intel_dp_setup_hdr_metadata_infoframe_sdp for HDR Static Metadata
> > as per
> > dp 1.4 spec and CTA-861-F spec.
> > As per DP 1.4 spec, 2.2.2.5 SDP Formats. It enables Dynamic Range
> > and
> > Mastering Infoframe for HDR content, which is defined in CTA-861-F
> > spec.
> > According to DP 1.4 spec and CEA-861-F spec Table 5, in order to
> > transmit
> > static HDR metadata, we have to use Non-audio INFOFRAME SDP v1.3.
> > 
> > +--------------------------------+-------------------------------+
> > >      [ Packet Type Value ]     |       [ Packet Type ]         |
> > +--------------------------------+-------------------------------+
> > > 80h + Non-audio INFOFRAME Type | CEA-861-F Non-audio INFOFRAME |
> > +--------------------------------+-------------------------------+
> > >      [Transmission Timing]                                     |
> > +----------------------------------------------------------------+
> > > As per CEA-861-F for INFOFRAME, including CEA-861.3 within     |
> > > which Dynamic Range and Mastering INFOFRAME are defined        |
> > +----------------------------------------------------------------+
> > 
> > v2: Add a missed blank line after function declaration.
> > v3: Remove not handled return values from
> >     intel_dp_setup_hdr_metadata_infoframe_sdp(). [Uma]
> > 
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c |  1 +
> >  drivers/gpu/drm/i915/display/intel_dp.c  | 89
> > ++++++++++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_dp.h  |  3 +
> >  3 files changed, 93 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 8dc030650801..306f6f9f0204 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3625,6 +3625,7 @@ static void intel_enable_ddi_dp(struct
> > intel_encoder *encoder,
> >  	intel_edp_backlight_on(crtc_state, conn_state);
> >  	intel_psr_enable(intel_dp, crtc_state);
> >  	intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
> > +	intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
> >  	intel_edp_drrs_enable(intel_dp, crtc_state);
> >  
> >  	if (crtc_state->has_audio)
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 7fe22b37474d..abbf1d5c54c4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4599,6 +4599,83 @@ intel_dp_setup_vsc_sdp(struct intel_dp
> > *intel_dp,
> >  			crtc_state, DP_SDP_VSC, &vsc_sdp,
> > sizeof(vsc_sdp));
> >  }
> >  
> > +static void
> > +intel_dp_setup_hdr_metadata_infoframe_sdp(struct intel_dp
> > *intel_dp,
> > +					  const struct intel_crtc_state
> > *crtc_state,
> > +					  const struct
> > drm_connector_state *conn_state)
> > +{
> > +	struct intel_digital_port *intel_dig_port =
> > dp_to_dig_port(intel_dp);
> > +	struct drm_i915_private *dev_priv = to_i915(intel_dig_port-
> > >base.base.dev);
> > +	struct dp_sdp infoframe_sdp = {};
> > +	struct hdmi_drm_infoframe drm_infoframe = {};
> > +	const int infoframe_size = HDMI_INFOFRAME_HEADER_SIZE +
> > HDMI_DRM_INFOFRAME_SIZE;
> > +	unsigned char buf[HDMI_INFOFRAME_HEADER_SIZE +
> > HDMI_DRM_INFOFRAME_SIZE];
> > +	ssize_t len;
> > +	int ret;
> > +
> > +	ret = drm_hdmi_infoframe_set_hdr_metadata(&drm_infoframe,
> > conn_state);
> > +	if (ret) {
> > +		DRM_DEBUG_KMS("couldn't set HDR metadata in
> > infoframe\n");
> > +		return;
> > +	}
> > +
> > +	len = hdmi_drm_infoframe_pack_only(&drm_infoframe, buf,
> > sizeof(buf));
> > +	if (len < 0) {
> > +		DRM_DEBUG_KMS("buffer size is smaller than hdr metadata
> > infoframe\n");
> > +		return;
> > +	}
> > +
> > +	if (len != infoframe_size) {
> > +		DRM_DEBUG_KMS("wrong static hdr metadata size\n");
> > +		return;
> > +	}
> > +
> > +	/*
> > +	 * Set up the infoframe sdp packet for HDR static metadata.
> > +	 * Prepare VSC Header for SU as per DP 1.4a spec,
> > +	 * Table 2-100 and Table 2-101
> > +	 */
> > +
> > +	/* Packet ID, 00h for non-Audio INFOFRAME */
> > +	infoframe_sdp.sdp_header.HB0 = 0;
> > +	/*
> > +	 * Packet Type 80h + Non-audio INFOFRAME Type value
> > +	 * HDMI_INFOFRAME_TYPE_DRM: 0x87,
> > +	 */
> > +	infoframe_sdp.sdp_header.HB1 = drm_infoframe.type;
> > +	/*
> > +	 * Least Significant Eight Bits of (Data Byte Count – 1)
> > +	 * infoframe_size - 1,
> > +	 */
> > +	infoframe_sdp.sdp_header.HB2 = 0x1D;
> > +	/* INFOFRAME SDP Version Number */
> > +	infoframe_sdp.sdp_header.HB3 = (0x13 << 2);
> > +	/* CTA Header Byte 2 (INFOFRAME Version Number) */
> > +	infoframe_sdp.db[0] = drm_infoframe.version;
> > +	/* CTA Header Byte 3 (Length of INFOFRAME):
> > HDMI_DRM_INFOFRAME_SIZE */
> > +	infoframe_sdp.db[1] = drm_infoframe.length;
> > +	/*
> > +	 * Copy HDMI_DRM_INFOFRAME_SIZE size from a buffer after
> > +	 * HDMI_INFOFRAME_HEADER_SIZE
> > +	 */
> > +	memcpy(&infoframe_sdp.db[2], &buf[HDMI_INFOFRAME_HEADER_SIZE],
> > +	       HDMI_DRM_INFOFRAME_SIZE);
> > +
> > +	if (INTEL_GEN(dev_priv) >= 11)
> > +		intel_dig_port->write_infoframe(&intel_dig_port->base,
> > +						crtc_state,
> > +						HDMI_PACKET_TYPE_GAMUT_
> > METADATA,
> > +						&infoframe_sdp,
> > +						VIDEO_DIP_GMP_DATA_SIZE
> > );
> > +	else
> > +		/* Prior to GEN11, Header size: 4 bytes, Data size: 28
> > bytes */
> > +		intel_dig_port->write_infoframe(&intel_dig_port->base,
> > +						crtc_state,
> > +						HDMI_PACKET_TYPE_GAMUT_
> > METADATA,
> > +						&infoframe_sdp,
> > +						VIDEO_DIP_DATA_SIZE);
> 
> This looks suspicious. Why is this not just something like
> sizeof(sdp)?
> 
I'll change a passed size toward write_infoframe() for DP infoframe sdp
packet for HDR static metadata.
> > +}
> > +
> >  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
> >  			 const struct intel_crtc_state *crtc_state,
> >  			 const struct drm_connector_state *conn_state)
> > @@ -4609,6 +4686,18 @@ void intel_dp_vsc_enable(struct intel_dp
> > *intel_dp,
> >  	intel_dp_setup_vsc_sdp(intel_dp, crtc_state, conn_state);
> >  }
> >  
> > +void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
> > +				  const struct intel_crtc_state
> > *crtc_state,
> > +				  const struct drm_connector_state
> > *conn_state)
> > +{
> > +	if (!conn_state->hdr_output_metadata)
> > +		return;
> > +
> > +	intel_dp_setup_hdr_metadata_infoframe_sdp(intel_dp,
> > +						  crtc_state,
> > +						  conn_state);
> > +}
> > +
> >  static u8 intel_dp_autotest_link_training(struct intel_dp
> > *intel_dp)
> >  {
> >  	int status = 0;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index 87883d0d5977..5613073d1dd5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -116,6 +116,9 @@ bool intel_dp_needs_vsc_sdp(const struct
> > intel_crtc_state *crtc_state);
> >  void intel_dp_vsc_enable(struct intel_dp *intel_dp,
> >  			 const struct intel_crtc_state *crtc_state,
> >  			 const struct drm_connector_state *conn_state);
> > +void intel_dp_hdr_metadata_enable(struct intel_dp *intel_dp,
> > +				  const struct intel_crtc_state
> > *crtc_state,
> > +				  const struct drm_connector_state
> > *conn_state);
> >  bool intel_digital_port_connected(struct intel_encoder *encoder);
> >  
> >  static inline unsigned int intel_dp_unused_lane_mask(int
> > lane_count)
> > -- 
> > 2.23.0
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