Hi, On Thu, Sep 19, 2019 at 07:10:35AM +0200, Corentin Labbe wrote: > This patch enables power management on the Security System. > > Signed-off-by: Corentin Labbe > --- > drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ > drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- > drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ > drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- > drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + > 5 files changed, 110 insertions(+), 16 deletions(-) > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > index fa4b1b47822e..c9799cbe0530 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > struct sun4i_ss_alg_template *algt; > const char *name = crypto_tfm_alg_name(tfm); > + int err; > > memset(op, 0, sizeof(struct sun4i_tfm_ctx)); > > @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > return PTR_ERR(op->fallback_tfm); > } > > + err = pm_runtime_get_sync(op->ss->dev); > + if (err < 0) > + goto error_pm; > return 0; Newline here > +error_pm: > + crypto_free_sync_skcipher(op->fallback_tfm); > + return err; > } > > void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) > { > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > + > crypto_free_sync_skcipher(op->fallback_tfm); > + pm_runtime_put(op->ss->dev); > } > > /* check and set the AES key, prepare the mode to be used */ > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > index 6c2db5d83b06..311c2653a9c3 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = MD5_HMAC_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit You should add a comma at the end to prevent having to modify it again > } > } > } > @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = SHA1_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit Ditto > } > } > } > @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) > return err; > } > > +/* > + * Power management strategy: The device is suspended unless a TFM exists for > + * one of the algorithms proposed by this driver. > + */ > +#if defined(CONFIG_PM) > +static int sun4i_ss_pm_suspend(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + sun4i_ss_disable(ss); > + return 0; > +} > + > +static int sun4i_ss_pm_resume(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + return sun4i_ss_enable(ss); > +} > +#endif > + Why not just have the suspend and resume function and the enable / disable functions merged together, you're not using them directy as far as I can see. > +const struct dev_pm_ops sun4i_ss_pm_ops = { > + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) > +}; > + > +/* > + * When power management is enabled, this function enables the PM and set the > + * device as suspended > + * When power management is disabled, this function just enables the device > + */ > +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) > +{ > + int err; > + > + pm_runtime_use_autosuspend(ss->dev); > + pm_runtime_set_autosuspend_delay(ss->dev, 2000); > + > + err = pm_runtime_set_suspended(ss->dev); > + if (err) > + return err; > + pm_runtime_enable(ss->dev); > +#if !defined(CONFIG_PM) > + err = sun4i_ss_enable(ss); > +#endif > + return err; > +} This looks nicer: https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi-sun4i.c#L492 Or, just make it depend on CONFIG_PM, we should probably do it anyway at the ARCH level anyway. Maxime