All of lore.kernel.org
 help / color / mirror / Atom feed
From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [PATCH CI 6/6] drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports
Date: Tue, 24 Sep 2019 14:00:40 -0700	[thread overview]
Message-ID: <20190924210040.142075-6-jose.souza@intel.com> (raw)
In-Reply-To: <20190924210040.142075-1-jose.souza@intel.com>

TGL added 2 more TC ports that currently are not being handled by
icl_pll_to_ddi_clk_sel(), so adding those.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reported-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index f6ae990f097b..2de497b4bf3d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1049,6 +1049,8 @@ static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
 	case DPLL_ID_ICL_MGPLL2:
 	case DPLL_ID_ICL_MGPLL3:
 	case DPLL_ID_ICL_MGPLL4:
+	case DPLL_ID_TGL_MGPLL5:
+	case DPLL_ID_TGL_MGPLL6:
 		return DDI_CLK_SEL_MG;
 	}
 }
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-09-24 21:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-24 21:00 [PATCH CI 1/6] drm/i915/tgl: Add initial dkl pll support José Roberto de Souza
2019-09-24 21:00 ` [PATCH CI 2/6] drm/i915/tgl: Add support for dkl pll write José Roberto de Souza
2019-09-24 21:00 ` [PATCH CI 3/6] drm/i915/tgl: TC helper function to return pin mapping José Roberto de Souza
2019-09-24 21:00 ` [PATCH CI 4/6] drm/i915/tgl: re-indent code to prepare for DKL changes José Roberto de Souza
2019-09-24 21:00 ` [PATCH CI 5/6] drm/i915/tgl: Add dkl phy pll calculations José Roberto de Souza
2019-09-24 21:00 ` José Roberto de Souza [this message]
2019-09-24 22:04 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915/tgl: Add initial dkl pll support Patchwork
2019-09-25 16:22 ` ✓ Fi.CI.IGT: " Patchwork
2019-09-25 19:21   ` Souza, Jose

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190924210040.142075-6-jose.souza@intel.com \
    --to=jose.souza@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=lucas.demarchi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.