From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Wed, 25 Sep 2019 08:11:35 -0600 Subject: [U-Boot] [PATCH v2 26/38] x86: Move common Intel CPU info code into a function In-Reply-To: <20190925141147.191166-1-sjg@chromium.org> References: <20190925141147.191166-1-sjg@chromium.org> Message-ID: <20190925141147.191166-27-sjg@chromium.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs. Signed-off-by: Simon Glass --- Changes in v2: None arch/x86/cpu/broadwell/cpu_full.c | 9 +-------- arch/x86/cpu/intel_common/cpu.c | 13 +++++++++++++ arch/x86/cpu/ivybridge/model_206ax.c | 8 ++------ arch/x86/include/asm/cpu_common.h | 11 +++++++++++ 4 files changed, 27 insertions(+), 14 deletions(-) diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index c1db1845498..d8b84826586 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -645,14 +645,7 @@ void cpu_set_power_limits(int power_limit_1_time) static int broadwell_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * BROADWELL_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; - - return 0; + return cpu_intel_get_info(info, BROADWELL_BCLK); } static int broadwell_get_count(struct udevice *dev) diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index d0ac17808c3..9357626b5a6 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -110,3 +111,15 @@ int cpu_set_flex_ratio_to_tdp_nominal(void) /* Not reached */ return -EINVAL; } + +int cpu_intel_get_info(struct cpu_info *info, int bclk) +{ + msr_t msr; + + msr = msr_read(IA32_PERF_CTL); + info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000; + info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | + 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; + + return 0; +} diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 6edc3e233c2..68e78e9478b 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -436,12 +437,7 @@ static int model_206ax_init(struct udevice *dev) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(MSR_IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE; + return cpu_intel_get_info(info, SANDYBRIDGE_BCLK); return 0; } diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 4c91a5daced..0d560262d5a 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -8,6 +8,8 @@ #define IA32_PERF_CTL 0x199 +struct cpu_info; + /** * cpu_common_init() - Set up common CPU init * @@ -31,4 +33,13 @@ int cpu_common_init(void); */ int cpu_set_flex_ratio_to_tdp_nominal(void); +/** + * cpu_intel_get_info() - Obtain CPU info for Intel CPUs + * + * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same + * features. This function fills in these values, given the value of the base + * clock in MHz (typically this should be set to 100). + */ +int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); + #endif -- 2.23.0.444.g18eeb5a265-goog