From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E3F5C35280 for ; Wed, 2 Oct 2019 14:50:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4651821D81 for ; Wed, 2 Oct 2019 14:50:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570027804; bh=M7UkPJXq9H6M3nCO21dFOZssYBGb+N4Rj34f9TMo3R0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=L7pCV5Z+wsi85T7ZHXfHnzCDTMJNsJIvtuUH5oin7CI9ZMevku1SavZNg8aEejWS7 a4P3+bIHKwTMXQ2NEE3QDGFwGyOrFCqnb7RnZC/RNrcoxEwbQXJi7zul6S/689QREa zGoIubHDAwXpNcbsgidztmd/MV62KQX2C+IkE6KM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728484AbfJBOuE (ORCPT ); Wed, 2 Oct 2019 10:50:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:53198 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726411AbfJBOuD (ORCPT ); Wed, 2 Oct 2019 10:50:03 -0400 Received: from localhost (lfbn-1-10718-76.w90-89.abo.wanadoo.fr [90.89.68.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 472C921783; Wed, 2 Oct 2019 14:50:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570027801; bh=M7UkPJXq9H6M3nCO21dFOZssYBGb+N4Rj34f9TMo3R0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=eY+F/uctqOLMsPma/j86mCVci1GwKGInB1KwOwb8m0JUR+g3HS22Kc+nPtR2Sl70d Swcsi+IPt0QsJj62CVu2ji3Oi6RxuMzT7m/echlOwCCvEN0sWhsImSf0xKEI8WA58k fUIu9xZEPs2HnJZ6RHz4kh6a6yQGBSgyjhoSviT4= Date: Wed, 2 Oct 2019 16:49:59 +0200 From: Maxime Ripard To: Chen-Yu Tsai Cc: Hans Verkuil , Sakari Ailus , Mauro Carvalho Chehab , Laurent Pinchart , Linux Media Mailing List , linux-kernel , linux-arm-kernel , devicetree , Mark Rutland , Rob Herring Subject: Re: [PATCH v6 1/5] dt-bindings: media: Add Allwinner A10 CSI binding Message-ID: <20191002144959.vg2rpbdauzbzvkcx@gilmour> References: <110dd9ff1784c29fa16304825a41d1603a33f166.1562847292.git-series.maxime.ripard@bootlin.com> <20191001085246.55srb62bpfc6jhtu@gilmour> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ci3xbatgbsxlfsb3" Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --ci3xbatgbsxlfsb3 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Tue, Oct 01, 2019 at 05:04:40PM +0800, Chen-Yu Tsai wrote: > On Tue, Oct 1, 2019 at 4:52 PM Maxime Ripard wrote: > > > > Hi, > > > > Thanks for looking into this. > > > > On Sun, Sep 15, 2019 at 04:54:16PM +0800, Chen-Yu Tsai wrote: > > > On Thu, Aug 15, 2019 at 4:34 PM Chen-Yu Tsai wrote: > > > > > > > > Hi, > > > > > > > > Sorry for chiming in so late. > > > > > > > > On Thu, Jul 11, 2019 at 8:15 PM Maxime Ripard wrote: > > > > > > > > > > The Allwinner A10 CMOS Sensor Interface is a camera capture interface also > > > > > used in later (A10s, A13, A20, R8 and GR8) SoCs. > > > > > > > > > > On some SoCs, like the A10, there's multiple instances of that controller, > > > > > with one instance supporting more channels and having an ISP. > > > > > > > > > > Reviewed-by: Rob Herring > > > > > Signed-off-by: Maxime Ripard > > > > > --- > > > > > Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml | 94 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- > > > > > 1 file changed, 94 insertions(+) > > > > > create mode 100644 Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > new file mode 100644 > > > > > index 000000000000..97c9fc3b5050 > > > > > --- /dev/null > > > > > +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > @@ -0,0 +1,94 @@ > > > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > > > +%YAML 1.2 > > > > > +--- > > > > > +$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml# > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > > + > > > > > +title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings > > > > > + > > > > > +maintainers: > > > > > + - Chen-Yu Tsai > > > > > + - Maxime Ripard > > > > > + > > > > > +description: |- > > > > > + The Allwinner A10 and later has a CMOS Sensor Interface to retrieve > > > > > + frames from a parallel or BT656 sensor. > > > > > + > > > > > + > > > > > +properties: > > > > > + compatible: > > > > > + oneOf: > > > > > + - items: > > > > > + - enum: > > > > > + - allwinner,sun7i-a20-csi0 > > > > > + - const: allwinner,sun4i-a10-csi0 > > > > > > > > CSI0 on the A10 has an ISP. Do we know if the one in the A20 does > > > > as well? It certainly doesn't say so in the user manual. If not, > > > > then we can't claim that A20 CSI0 is compatible with A10 CSI0. > > > > > > > > > + > > > > > + - items: > > > > > + - const: allwinner,sun4i-a10-csi0 > > > > > + > > > > > + reg: > > > > > + maxItems: 1 > > > > > + > > > > > + interrupts: > > > > > + maxItems: 1 > > > > > + > > > > > + clocks: > > > > > + items: > > > > > + - description: The CSI interface clock > > > > > + - description: The CSI module clock > > > > > + - description: The CSI ISP clock > > > > > + - description: The CSI DRAM clock > > > > > + > > > > > + clock-names: > > > > > + items: > > > > > + - const: bus > > > > > + - const: mod > > > > > > > > I doubt this actually is a module clock. Based on the usage in your > > > > device tree patch, and the csi driver in the old linux-sunxi kernel, > > > > the clock rate is set to 24 MHz, or whatever the sensor requires for > > > > MCLK. > > > > > > I'm working on adding support for this on the R40, and it seems with > > > this SoC the picture is much clearer. It has the same CSI interface > > > block, but the CCU has the clocks correctly named. We have: > > > > > > - CSI_MCLK0 > > > - CSI_MCLK1 > > > - CSI_SCLK > > > > > > in addition to the bus clocks. > > > > > > The CSI section also explains the clock signals: > > > > > > 6.1.3.2. Clock Sources > > > Two Clocks need to be configured for CSI controller. CSI0/1_MCLK > > > provides the master clock for sensor and other devices. CSI_SCLK > > > is the top clock for the whole CSI module. > > > > > > So it would seem the ISP clock we currently have in the DT is simply > > > the module clock shared by all CSI-related hardware blocks, and the > > > module clock is bogus. > > > > I don't think it is. It looks like there's no ISP in the R40 CSI > > controllers, so that would mean that we don't have an ISP clock, and > > the SCLK is the module clock. > > > > Does that make sense? > > Right. That's another way to put it. The point is I believe the > CSI[01]_CLK clocks on the A10/A20 are simply the MCLK outputs. Looking at the Allwinner BSP again, it looks like you're right. I'll send some patches to remove that clock from the binding. Thanks! Maxime --ci3xbatgbsxlfsb3 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXZS5FwAKCRDj7w1vZxhR xcsgAP9qc0COV67+Hl3wJfkscyqUVifCgbluweo1QS6EiFrDggD/factOgnJNhXe mZ+HTQ7UXodlm8GoSOzwo9mNt9KC1AA= =TTvP -----END PGP SIGNATURE----- --ci3xbatgbsxlfsb3-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FACAC35280 for ; Wed, 2 Oct 2019 14:50:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1C42521848 for ; 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Wed, 2 Oct 2019 14:50:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1570027801; bh=M7UkPJXq9H6M3nCO21dFOZssYBGb+N4Rj34f9TMo3R0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=eY+F/uctqOLMsPma/j86mCVci1GwKGInB1KwOwb8m0JUR+g3HS22Kc+nPtR2Sl70d Swcsi+IPt0QsJj62CVu2ji3Oi6RxuMzT7m/echlOwCCvEN0sWhsImSf0xKEI8WA58k fUIu9xZEPs2HnJZ6RHz4kh6a6yQGBSgyjhoSviT4= Date: Wed, 2 Oct 2019 16:49:59 +0200 From: Maxime Ripard To: Chen-Yu Tsai Subject: Re: [PATCH v6 1/5] dt-bindings: media: Add Allwinner A10 CSI binding Message-ID: <20191002144959.vg2rpbdauzbzvkcx@gilmour> References: <110dd9ff1784c29fa16304825a41d1603a33f166.1562847292.git-series.maxime.ripard@bootlin.com> <20191001085246.55srb62bpfc6jhtu@gilmour> MIME-Version: 1.0 In-Reply-To: User-Agent: NeoMutt/20180716 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191002_075005_666923_8C471A7F X-CRM114-Status: GOOD ( 33.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree , linux-kernel , Rob Herring , Hans Verkuil , Laurent Pinchart , Sakari Ailus , Mauro Carvalho Chehab , linux-arm-kernel , Linux Media Mailing List Content-Type: multipart/mixed; boundary="===============6843869399055141522==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============6843869399055141522== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ci3xbatgbsxlfsb3" Content-Disposition: inline --ci3xbatgbsxlfsb3 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Tue, Oct 01, 2019 at 05:04:40PM +0800, Chen-Yu Tsai wrote: > On Tue, Oct 1, 2019 at 4:52 PM Maxime Ripard wrote: > > > > Hi, > > > > Thanks for looking into this. > > > > On Sun, Sep 15, 2019 at 04:54:16PM +0800, Chen-Yu Tsai wrote: > > > On Thu, Aug 15, 2019 at 4:34 PM Chen-Yu Tsai wrote: > > > > > > > > Hi, > > > > > > > > Sorry for chiming in so late. > > > > > > > > On Thu, Jul 11, 2019 at 8:15 PM Maxime Ripard wrote: > > > > > > > > > > The Allwinner A10 CMOS Sensor Interface is a camera capture interface also > > > > > used in later (A10s, A13, A20, R8 and GR8) SoCs. > > > > > > > > > > On some SoCs, like the A10, there's multiple instances of that controller, > > > > > with one instance supporting more channels and having an ISP. > > > > > > > > > > Reviewed-by: Rob Herring > > > > > Signed-off-by: Maxime Ripard > > > > > --- > > > > > Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml | 94 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- > > > > > 1 file changed, 94 insertions(+) > > > > > create mode 100644 Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > new file mode 100644 > > > > > index 000000000000..97c9fc3b5050 > > > > > --- /dev/null > > > > > +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml > > > > > @@ -0,0 +1,94 @@ > > > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > > > +%YAML 1.2 > > > > > +--- > > > > > +$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml# > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > > + > > > > > +title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings > > > > > + > > > > > +maintainers: > > > > > + - Chen-Yu Tsai > > > > > + - Maxime Ripard > > > > > + > > > > > +description: |- > > > > > + The Allwinner A10 and later has a CMOS Sensor Interface to retrieve > > > > > + frames from a parallel or BT656 sensor. > > > > > + > > > > > + > > > > > +properties: > > > > > + compatible: > > > > > + oneOf: > > > > > + - items: > > > > > + - enum: > > > > > + - allwinner,sun7i-a20-csi0 > > > > > + - const: allwinner,sun4i-a10-csi0 > > > > > > > > CSI0 on the A10 has an ISP. Do we know if the one in the A20 does > > > > as well? It certainly doesn't say so in the user manual. If not, > > > > then we can't claim that A20 CSI0 is compatible with A10 CSI0. > > > > > > > > > + > > > > > + - items: > > > > > + - const: allwinner,sun4i-a10-csi0 > > > > > + > > > > > + reg: > > > > > + maxItems: 1 > > > > > + > > > > > + interrupts: > > > > > + maxItems: 1 > > > > > + > > > > > + clocks: > > > > > + items: > > > > > + - description: The CSI interface clock > > > > > + - description: The CSI module clock > > > > > + - description: The CSI ISP clock > > > > > + - description: The CSI DRAM clock > > > > > + > > > > > + clock-names: > > > > > + items: > > > > > + - const: bus > > > > > + - const: mod > > > > > > > > I doubt this actually is a module clock. Based on the usage in your > > > > device tree patch, and the csi driver in the old linux-sunxi kernel, > > > > the clock rate is set to 24 MHz, or whatever the sensor requires for > > > > MCLK. > > > > > > I'm working on adding support for this on the R40, and it seems with > > > this SoC the picture is much clearer. It has the same CSI interface > > > block, but the CCU has the clocks correctly named. We have: > > > > > > - CSI_MCLK0 > > > - CSI_MCLK1 > > > - CSI_SCLK > > > > > > in addition to the bus clocks. > > > > > > The CSI section also explains the clock signals: > > > > > > 6.1.3.2. Clock Sources > > > Two Clocks need to be configured for CSI controller. CSI0/1_MCLK > > > provides the master clock for sensor and other devices. CSI_SCLK > > > is the top clock for the whole CSI module. > > > > > > So it would seem the ISP clock we currently have in the DT is simply > > > the module clock shared by all CSI-related hardware blocks, and the > > > module clock is bogus. > > > > I don't think it is. It looks like there's no ISP in the R40 CSI > > controllers, so that would mean that we don't have an ISP clock, and > > the SCLK is the module clock. > > > > Does that make sense? > > Right. That's another way to put it. The point is I believe the > CSI[01]_CLK clocks on the A10/A20 are simply the MCLK outputs. Looking at the Allwinner BSP again, it looks like you're right. I'll send some patches to remove that clock from the binding. Thanks! Maxime --ci3xbatgbsxlfsb3 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXZS5FwAKCRDj7w1vZxhR xcsgAP9qc0COV67+Hl3wJfkscyqUVifCgbluweo1QS6EiFrDggD/factOgnJNhXe mZ+HTQ7UXodlm8GoSOzwo9mNt9KC1AA= =TTvP -----END PGP SIGNATURE----- --ci3xbatgbsxlfsb3-- --===============6843869399055141522== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============6843869399055141522==--