From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 05 Oct 2019 10:54:32 -0000 Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iGhhm-0001UD-QE for speck@linutronix.de; Sat, 05 Oct 2019 12:54:32 +0200 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id BAA37AC49 for ; Sat, 5 Oct 2019 10:54:22 +0000 (UTC) Date: Sat, 5 Oct 2019 12:54:15 +0200 From: Borislav Petkov Subject: [MODERATED] Re: [PATCH v5 02/11] TAAv5 2 Message-ID: <20191005105415.GA25756@zn.tnic> References: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: speck@linutronix.de List-ID: On Fri, Oct 04, 2019 at 11:27:31PM -0700, speck for Pawan Gupta wrote: > Move IA32_ARCH_CAPABILITIES MSR read to a helper function. If the CPU > doesn't support this MSR return 0. Use this function in following > commits to read IA32_ARCH_CAPABILITIES MSR. >=20 > Signed-off-by: Pawan Gupta > Reviewed-by: Mark Gross > Reviewed-by: Tony Luck > Tested-by: Neelima Krishnan > --- > arch/x86/kernel/cpu/common.c | 16 ++++++++++++---- > 1 file changed, 12 insertions(+), 4 deletions(-) >=20 > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c > index f125bf7ecb6f..af9e357b2ca9 100644 > --- a/arch/x86/kernel/cpu/common.c > +++ b/arch/x86/kernel/cpu/common.c > @@ -1091,19 +1091,27 @@ static bool __init cpu_matches(unsigned long which) > return m && !!(m->driver_data & which); > } > =20 > -static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) > +u64 read_ia32_arch_cap(void) If this is going to be used by other compilation units, call it something more presentable and clear, with a proper prefix: x86_read_arch_cap_msr() or so. > { > u64 ia32_cap =3D 0; > =20 > + /* Leave the MSR set to all 0's when not supported */ This comment is not really needed. > + if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) > + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); > + > + return ia32_cap; > +} > + > +static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) ^^^^^^ Please audit your newly added functions whether they can be __init too. Thx. --=20 Regards/Gruss, Boris. SUSE Software Solutions Germany GmbH, GF: Felix Imend=C3=B6rffer, HRB 247165,= AG M=C3=BCnchen --=20