From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35649ECE58C for ; Fri, 11 Oct 2019 14:19:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0CE99206A1 for ; Fri, 11 Oct 2019 14:19:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728487AbfJKOTh (ORCPT ); Fri, 11 Oct 2019 10:19:37 -0400 Received: from foss.arm.com ([217.140.110.172]:33810 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728084AbfJKOTh (ORCPT ); Fri, 11 Oct 2019 10:19:37 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 65DEE142F; Fri, 11 Oct 2019 07:19:36 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D16173F68E; Fri, 11 Oct 2019 07:19:35 -0700 (PDT) Date: Fri, 11 Oct 2019 15:19:34 +0100 From: Andrew Murray To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Will Deacon , Mark Rutland , James Morse , Julien Thierry , Suzuki K Poulose Subject: Re: [PATCH v3 3/4] KVM: arm64: pmu: Set the CHAINED attribute before creating the in-kernel event Message-ID: <20191011141933.GQ42880@e119886-lin.cambridge.arm.com> References: <20191011123954.31378-1-maz@kernel.org> <20191011123954.31378-4-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191011123954.31378-4-maz@kernel.org> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Fri, Oct 11, 2019 at 01:39:53PM +0100, Marc Zyngier wrote: > The current convention for KVM to request a chained event from the > host PMU is to set bit[0] in attr.config1 (PERF_ATTR_CFG1_KVM_PMU_CHAINED). > > But as it turns out, this bit gets set *after* we create the kernel > event that backs our virtual counter, meaning that we never get > a 64bit counter. > > Moving the setting to an earlier point solves the problem. > > Fixes: 80f393a23be6 ("KVM: arm/arm64: Support chained PMU counters") > Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray > --- > virt/kvm/arm/pmu.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c > index c30c3a74fc7f..f291d4ac3519 100644 > --- a/virt/kvm/arm/pmu.c > +++ b/virt/kvm/arm/pmu.c > @@ -569,12 +569,12 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) > * high counter. > */ > attr.sample_period = (-counter) & GENMASK(63, 0); > + if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > + attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > + > event = perf_event_create_kernel_counter(&attr, -1, current, > kvm_pmu_perf_overflow, > pmc + 1); > - > - if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > - attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > } else { > /* The initial sample period (overflow count) of an event. */ > if (kvm_pmu_idx_is_64bit(vcpu, pmc->idx)) > -- > 2.20.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02A5FC47404 for ; Fri, 11 Oct 2019 14:19:41 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 7F468206A1 for ; Fri, 11 Oct 2019 14:19:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7F468206A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id DA1E44A85A; Fri, 11 Oct 2019 10:19:39 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eIoe94pwJdmZ; Fri, 11 Oct 2019 10:19:38 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id BF5204A81C; Fri, 11 Oct 2019 10:19:38 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 419394A746 for ; Fri, 11 Oct 2019 10:19:38 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jHKEeSYYpPxD for ; Fri, 11 Oct 2019 10:19:37 -0400 (EDT) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 16F5A4A685 for ; Fri, 11 Oct 2019 10:19:37 -0400 (EDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 65DEE142F; Fri, 11 Oct 2019 07:19:36 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D16173F68E; Fri, 11 Oct 2019 07:19:35 -0700 (PDT) Date: Fri, 11 Oct 2019 15:19:34 +0100 From: Andrew Murray To: Marc Zyngier Subject: Re: [PATCH v3 3/4] KVM: arm64: pmu: Set the CHAINED attribute before creating the in-kernel event Message-ID: <20191011141933.GQ42880@e119886-lin.cambridge.arm.com> References: <20191011123954.31378-1-maz@kernel.org> <20191011123954.31378-4-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191011123954.31378-4-maz@kernel.org> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Cc: kvm@vger.kernel.org, Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Fri, Oct 11, 2019 at 01:39:53PM +0100, Marc Zyngier wrote: > The current convention for KVM to request a chained event from the > host PMU is to set bit[0] in attr.config1 (PERF_ATTR_CFG1_KVM_PMU_CHAINED). > > But as it turns out, this bit gets set *after* we create the kernel > event that backs our virtual counter, meaning that we never get > a 64bit counter. > > Moving the setting to an earlier point solves the problem. > > Fixes: 80f393a23be6 ("KVM: arm/arm64: Support chained PMU counters") > Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray > --- > virt/kvm/arm/pmu.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c > index c30c3a74fc7f..f291d4ac3519 100644 > --- a/virt/kvm/arm/pmu.c > +++ b/virt/kvm/arm/pmu.c > @@ -569,12 +569,12 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) > * high counter. > */ > attr.sample_period = (-counter) & GENMASK(63, 0); > + if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > + attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > + > event = perf_event_create_kernel_counter(&attr, -1, current, > kvm_pmu_perf_overflow, > pmc + 1); > - > - if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > - attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > } else { > /* The initial sample period (overflow count) of an event. */ > if (kvm_pmu_idx_is_64bit(vcpu, pmc->idx)) > -- > 2.20.1 > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 489FDC47404 for ; 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Fri, 11 Oct 2019 07:19:35 -0700 (PDT) Date: Fri, 11 Oct 2019 15:19:34 +0100 From: Andrew Murray To: Marc Zyngier Subject: Re: [PATCH v3 3/4] KVM: arm64: pmu: Set the CHAINED attribute before creating the in-kernel event Message-ID: <20191011141933.GQ42880@e119886-lin.cambridge.arm.com> References: <20191011123954.31378-1-maz@kernel.org> <20191011123954.31378-4-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191011123954.31378-4-maz@kernel.org> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191011_071937_237966_45B726BE X-CRM114-Status: GOOD ( 19.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , kvm@vger.kernel.org, Suzuki K Poulose , James Morse , Julien Thierry , Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 11, 2019 at 01:39:53PM +0100, Marc Zyngier wrote: > The current convention for KVM to request a chained event from the > host PMU is to set bit[0] in attr.config1 (PERF_ATTR_CFG1_KVM_PMU_CHAINED). > > But as it turns out, this bit gets set *after* we create the kernel > event that backs our virtual counter, meaning that we never get > a 64bit counter. > > Moving the setting to an earlier point solves the problem. > > Fixes: 80f393a23be6 ("KVM: arm/arm64: Support chained PMU counters") > Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray > --- > virt/kvm/arm/pmu.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c > index c30c3a74fc7f..f291d4ac3519 100644 > --- a/virt/kvm/arm/pmu.c > +++ b/virt/kvm/arm/pmu.c > @@ -569,12 +569,12 @@ static void kvm_pmu_create_perf_event(struct kvm_vcpu *vcpu, u64 select_idx) > * high counter. > */ > attr.sample_period = (-counter) & GENMASK(63, 0); > + if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > + attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > + > event = perf_event_create_kernel_counter(&attr, -1, current, > kvm_pmu_perf_overflow, > pmc + 1); > - > - if (kvm_pmu_counter_is_enabled(vcpu, pmc->idx + 1)) > - attr.config1 |= PERF_ATTR_CFG1_KVM_PMU_CHAINED; > } else { > /* The initial sample period (overflow count) of an event. */ > if (kvm_pmu_idx_is_64bit(vcpu, pmc->idx)) > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel