From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 11 Oct 2019 10:56:52 -0400 Subject: [U-Boot] [GIT PULL] Xilinx/FPGA patches for v2020.01 In-Reply-To: <6b2f1b4a-c0e1-ac0f-adf8-740f67ac61cd@monstr.eu> References: <6b2f1b4a-c0e1-ac0f-adf8-740f67ac61cd@monstr.eu> Message-ID: <20191011145652.GC16029@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, Oct 09, 2019 at 12:30:36PM +0200, Michal Simek wrote: > Hi Tom, > > please pull the following changes to your tree. I have also included > trivial patch for apalis board. Networking stuff have been assigned to > me in patchwork that's why I am also including them. > > Gitlab CI failed but it is related to file path we discussed already. > https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze/pipelines/879 > > I expect when you merge this to your branch all will pass. > > Thanks, > Michal > > The following changes since commit 61ba1244b548463dbfb3c5285b6b22e7c772c5bd: > > Prepare v2019.10 (2019-10-07 17:14:02 -0400) > > are available in the Git repository at: > > git at gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git > tags/xilinx-for-v2020.01 > > for you to fetch changes up to bcaa0e3302e384ad65c352b385678acdf3f20c0a: > > arm64: versal: remove debug uart for versal virt (2019-10-08 13:14:54 > +0200) > Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: