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[212.51.149.96]) by smtp.gmail.com with ESMTPSA id v22sm3077031edm.89.2019.10.14.01.56.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2019 01:56:07 -0700 (PDT) Date: Mon, 14 Oct 2019 10:56:05 +0200 From: Daniel Vetter To: "james qian wang (Arm Technology China)" Cc: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "imirkin@alum.mit.edu" , nd , Ayan Halder , "Oscar Zhang (Arm Technology China)" , "Tiannan Zhu (Arm Technology China)" , Mihail Atanassov , "Jonathan Chai (Arm Technology China)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin (Arm Technology China)" , "Channing Chen (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ben Davis Subject: Re: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() Message-ID: <20191014085605.GF11828@phenom.ffwll.local> Mail-Followup-To: "james qian wang (Arm Technology China)" , Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "imirkin@alum.mit.edu" , nd , Ayan Halder , "Oscar Zhang (Arm Technology China)" , "Tiannan Zhu (Arm Technology China)" , Mihail Atanassov , "Jonathan Chai (Arm Technology China)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin (Arm Technology China)" , "Channing Chen (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ben Davis References: <20191011054240.17782-1-james.qian.wang@arm.com> <20191011054240.17782-2-james.qian.wang@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191011054240.17782-2-james.qian.wang@arm.com> X-Operating-System: Linux phenom 5.2.0-2-amd64 User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 11, 2019 at 05:43:09AM +0000, james qian wang (Arm Technology China) wrote: > Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to > convert S31.32 sign-magnitude to Qm.n 2's complement that supported by > hardware. > > Signed-off-by: james qian wang (Arm Technology China) > --- > drivers/gpu/drm/drm_color_mgmt.c | 23 +++++++++++++++++++++++ > include/drm/drm_color_mgmt.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c > index 4ce5c6d8de99..3d533d0b45af 100644 > --- a/drivers/gpu/drm/drm_color_mgmt.c > +++ b/drivers/gpu/drm/drm_color_mgmt.c > @@ -132,6 +132,29 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision) > } > EXPORT_SYMBOL(drm_color_lut_extract); > > +/** > + * drm_color_ctm_s31_32_to_qm_n > + * > + * @user_input: input value > + * @m: number of integer bits > + * @n: number of fractinal bits > + * > + * Convert and clamp S31.32 sign-magnitude to Qm.n 2's complement. What's the Q meaning here? Also maybe specify that the higher bits above m+n are cleared to all 0 or all 1. Unit test would be lovely too. Anyway: Reviewed-by: Daniel Vetter > + */ > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n) > +{ > + u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n); > + bool negative = !!(user_input & BIT_ULL(63)); > + s64 val; > + > + /* the range of signed 2s complement is [-2^n+m, 2^n+m - 1] */ > + val = clamp_val(mag, 0, negative ? BIT(n + m) : BIT(n + m) - 1); > + > + return negative ? 0ll - val : val; > +} > +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); > + > /** > * drm_crtc_enable_color_mgmt - enable color management properties > * @crtc: DRM CRTC > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h > index d1c662d92ab7..60fea5501886 100644 > --- a/include/drm/drm_color_mgmt.h > +++ b/include/drm/drm_color_mgmt.h > @@ -30,6 +30,8 @@ struct drm_crtc; > struct drm_plane; > > uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision); > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n); > > void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, > uint degamma_lut_size, > -- > 2.20.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() Date: Mon, 14 Oct 2019 10:56:05 +0200 Message-ID: <20191014085605.GF11828@phenom.ffwll.local> References: <20191011054240.17782-1-james.qian.wang@arm.com> <20191011054240.17782-2-james.qian.wang@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20191011054240.17782-2-james.qian.wang@arm.com> Sender: linux-kernel-owner@vger.kernel.org To: "james qian wang (Arm Technology China)" Cc: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "imirkin@alum.mit.edu" , nd , Ayan Halder , "Oscar Zhang (Arm Technology China)" , "Tiannan Zhu (Arm Technology China)" , Mihail Atanassov , "Jonathan Chai (Arm Technology China)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin (Arm Technology China)" , Channing Chen (Arm Technology Chi List-Id: dri-devel@lists.freedesktop.org On Fri, Oct 11, 2019 at 05:43:09AM +0000, james qian wang (Arm Technology China) wrote: > Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to > convert S31.32 sign-magnitude to Qm.n 2's complement that supported by > hardware. > > Signed-off-by: james qian wang (Arm Technology China) > --- > drivers/gpu/drm/drm_color_mgmt.c | 23 +++++++++++++++++++++++ > include/drm/drm_color_mgmt.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c > index 4ce5c6d8de99..3d533d0b45af 100644 > --- a/drivers/gpu/drm/drm_color_mgmt.c > +++ b/drivers/gpu/drm/drm_color_mgmt.c > @@ -132,6 +132,29 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision) > } > EXPORT_SYMBOL(drm_color_lut_extract); > > +/** > + * drm_color_ctm_s31_32_to_qm_n > + * > + * @user_input: input value > + * @m: number of integer bits > + * @n: number of fractinal bits > + * > + * Convert and clamp S31.32 sign-magnitude to Qm.n 2's complement. What's the Q meaning here? Also maybe specify that the higher bits above m+n are cleared to all 0 or all 1. Unit test would be lovely too. Anyway: Reviewed-by: Daniel Vetter > + */ > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n) > +{ > + u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n); > + bool negative = !!(user_input & BIT_ULL(63)); > + s64 val; > + > + /* the range of signed 2s complement is [-2^n+m, 2^n+m - 1] */ > + val = clamp_val(mag, 0, negative ? BIT(n + m) : BIT(n + m) - 1); > + > + return negative ? 0ll - val : val; > +} > +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); > + > /** > * drm_crtc_enable_color_mgmt - enable color management properties > * @crtc: DRM CRTC > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h > index d1c662d92ab7..60fea5501886 100644 > --- a/include/drm/drm_color_mgmt.h > +++ b/include/drm/drm_color_mgmt.h > @@ -30,6 +30,8 @@ struct drm_crtc; > struct drm_plane; > > uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision); > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n); > > void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, > uint degamma_lut_size, > -- > 2.20.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch