From mboxrd@z Thu Jan 1 00:00:00 1970 From: Richard Henderson Subject: [PATCH 0/1] arm64: Implement archrandom.h for ARMv8.5-RNG Date: Fri, 18 Oct 2019 19:20:47 -0700 Message-ID: <20191019022048.28065-1-richard.henderson@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, Dave.Martin@arm.com, Richard Henderson List-Id: linux-arch.vger.kernel.org From: Richard Henderson The ARMv8.5-RNG extension adds a hardware random number generator. The plumbing for this is already present in the kernel; we just have to take advantage of that. Possible issues: When should we use RNDRRS? For now I use it at boot, when validating that the implementation can produce a random number, much like other architectures validate before enabling. I also use it if RNDR fails. I don't know if that's a reasonable thing to do; the generic architecture docs are too vague about what's going on behind the scenes. I mark ARM64_HAS_RNG as ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE so that it is detected early, because crng_initialize() is called early. I don't know if this is quite the right thing if some hypothetial big.LITTLE only has the RNG on the big cpus. Tested with QEMU. r~ Richard Henderson (1): arm64: Implement archrandom.h for ARMv8.5-RNG Documentation/arm64/cpu-feature-registers.rst | 2 + arch/arm64/include/asm/archrandom.h | 76 +++++++++++++++++++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/sysreg.h | 1 + arch/arm64/kernel/cpufeature.c | 34 +++++++++ arch/arm64/Kconfig | 12 +++ drivers/char/Kconfig | 4 +- 7 files changed, 129 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/include/asm/archrandom.h -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-f194.google.com ([209.85.215.194]:34334 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726033AbfJSCUw (ORCPT ); Fri, 18 Oct 2019 22:20:52 -0400 Received: by mail-pg1-f194.google.com with SMTP id k20so4336817pgi.1 for ; Fri, 18 Oct 2019 19:20:52 -0700 (PDT) From: Richard Henderson Subject: [PATCH 0/1] arm64: Implement archrandom.h for ARMv8.5-RNG Date: Fri, 18 Oct 2019 19:20:47 -0700 Message-ID: <20191019022048.28065-1-richard.henderson@linaro.org> Sender: linux-arch-owner@vger.kernel.org List-ID: To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, Dave.Martin@arm.com, linux-arch@vger.kernel.org, Richard Henderson Message-ID: <20191019022047.nR9ufEfvf8ZrOmFwJ2C12-VBcI6bB-XvB_klou8CZp0@z> From: Richard Henderson The ARMv8.5-RNG extension adds a hardware random number generator. The plumbing for this is already present in the kernel; we just have to take advantage of that. Possible issues: When should we use RNDRRS? For now I use it at boot, when validating that the implementation can produce a random number, much like other architectures validate before enabling. I also use it if RNDR fails. I don't know if that's a reasonable thing to do; the generic architecture docs are too vague about what's going on behind the scenes. I mark ARM64_HAS_RNG as ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE so that it is detected early, because crng_initialize() is called early. I don't know if this is quite the right thing if some hypothetial big.LITTLE only has the RNG on the big cpus. Tested with QEMU. r~ Richard Henderson (1): arm64: Implement archrandom.h for ARMv8.5-RNG Documentation/arm64/cpu-feature-registers.rst | 2 + arch/arm64/include/asm/archrandom.h | 76 +++++++++++++++++++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/sysreg.h | 1 + arch/arm64/kernel/cpufeature.c | 34 +++++++++ arch/arm64/Kconfig | 12 +++ drivers/char/Kconfig | 4 +- 7 files changed, 129 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/include/asm/archrandom.h -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51905CA9EA0 for ; Sat, 19 Oct 2019 02:21:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E2D1C20700 for ; Sat, 19 Oct 2019 02:21:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="IoKImEj1"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Ph7M/rPN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E2D1C20700 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=n8kT5IvooMsgV8+mdwoxkeLF3PWmU1L9+58vvmG/16o=; b=IoK ImEj1PqjhafTQJsRQ4CFNWLQ10FSZNR+E8HJub0hb/YuTkNHiBsQ1moxOgUZcljMVQkGVXGYYTiGc Ulk4K0R//a69pWWvWR3VMtNhplSVaIM+dAR13GGi+UW+krUfm1AiREIfpnMHRHylcIG3fqgVbXPso ojvj0a8mTYX+OjlJGqFTiLzl9/15AMUAXoDP74vlcKtcAjksWEcreV9tPnue4fk8nI/gyx74y7tnG 77Ow+KpSX5TGIeTaMqXSuMwUnWGLJyHOYfI+T0/hDLnui7F+hN1Sf+9abLCXWW94pLxo5emgoN/M+ RhYGLAwPZ5XRjke/jpWwaFub6xxVfGA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iLeMT-0006cR-KS; Sat, 19 Oct 2019 02:20:57 +0000 Received: from mail-pg1-x541.google.com ([2607:f8b0:4864:20::541]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iLeMP-0006bY-Vf for linux-arm-kernel@lists.infradead.org; Sat, 19 Oct 2019 02:20:55 +0000 Received: by mail-pg1-x541.google.com with SMTP id r1so4303789pgj.12 for ; Fri, 18 Oct 2019 19:20:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=OZxB3yUZwqmkE8nLK0z7B1QOB/S9NBhwSOUrUzW9bzE=; b=Ph7M/rPNYPADQmJaP49bXc0xz4mq6WHHW5zTvjajYV2BoL+iLcPY25tzrl1YhrFp8X xxFObrvyMJXmUB3IlfeHJBOw6oVl45vEq/IHgpGO5mg9QFKzgT6at3FZqIjBiupOb9XX Vs9Q3GNfBNJoX77w3ZYaOVYkkmYWft/zv6KJ/rHG3IHs6MRYcC0hOzMGpLt+qbic+qbX +3Okt15ibCSrAQM6khnnZnAgfnCoD9WlKfppm+8Pt17EEyOz05nFUwZi3P4ak+Qz4Bwg LVuycSLJvIi/3y+Icjo9PFu81ihbxLXLbILVOfUOl94R8vjwVfBqWherraEqPsJwtClp ymlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=OZxB3yUZwqmkE8nLK0z7B1QOB/S9NBhwSOUrUzW9bzE=; b=mxqaoR6SFwwIt4fRS+IKy43P+Y1UFJWunE3cmsd1MANaghjiiKet38r7w/wpwYRYrG cf5ZwQkeVgjbm9riSYn4rWWx+bLgfWzXv69SJUJRoYV2WKIiuQVQO+3CCD/hAEhUd7Jl rWEwnzvU0LRvZG6f1hwYVFYd/OPqxpYS5H/hrgU02IXul52gdEIjTfEOAIKBWzaf1Mt5 ZD4zeqf001IK1e0S2hplcsW3Ev/xH6GI451h2gYsn5emyHGqnqIacJPNC6sgwMxKM9pp QyilNx+NDKenesc3gbhseaEOqVmCXsIBa89bXTAgpshqwjtGa5UFD1udMavMuaMgmQfz mSHQ== X-Gm-Message-State: APjAAAVRVTnec/00HJ+Y4IfNBMEws7G8IZKATfQoQogU9zKl/aY7dP8E +fkmm3bFTMmXOUdPwCVgag7uvCsmr4g= X-Google-Smtp-Source: APXvYqz38lTUQmrPoILgjPmnL2NLsievHn6HKcnthBzPOb1nk5ouaMoUhSqGykRB4C29lhrEG+AoUQ== X-Received: by 2002:a63:2348:: with SMTP id u8mr13305452pgm.422.1571451651538; Fri, 18 Oct 2019 19:20:51 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id l22sm6635148pgj.4.2019.10.18.19.20.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2019 19:20:50 -0700 (PDT) From: Richard Henderson To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/1] arm64: Implement archrandom.h for ARMv8.5-RNG Date: Fri, 18 Oct 2019 19:20:47 -0700 Message-Id: <20191019022048.28065-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191018_192054_051254_41A217E5 X-CRM114-Status: GOOD ( 11.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, Dave.Martin@arm.com, Richard Henderson MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Richard Henderson The ARMv8.5-RNG extension adds a hardware random number generator. The plumbing for this is already present in the kernel; we just have to take advantage of that. Possible issues: When should we use RNDRRS? For now I use it at boot, when validating that the implementation can produce a random number, much like other architectures validate before enabling. I also use it if RNDR fails. I don't know if that's a reasonable thing to do; the generic architecture docs are too vague about what's going on behind the scenes. I mark ARM64_HAS_RNG as ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE so that it is detected early, because crng_initialize() is called early. I don't know if this is quite the right thing if some hypothetial big.LITTLE only has the RNG on the big cpus. Tested with QEMU. r~ Richard Henderson (1): arm64: Implement archrandom.h for ARMv8.5-RNG Documentation/arm64/cpu-feature-registers.rst | 2 + arch/arm64/include/asm/archrandom.h | 76 +++++++++++++++++++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/sysreg.h | 1 + arch/arm64/kernel/cpufeature.c | 34 +++++++++ arch/arm64/Kconfig | 12 +++ drivers/char/Kconfig | 4 +- 7 files changed, 129 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/include/asm/archrandom.h -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel