From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 22 Oct 2019 17:47:53 -0000 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120] helo=us-smtp-1.mimecast.com) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iMyG7-0003sX-TQ for speck@linutronix.de; Tue, 22 Oct 2019 19:47:52 +0200 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id ED6D4800D49 for ; Tue, 22 Oct 2019 17:47:41 +0000 (UTC) Received: from treble (ovpn-124-213.rdu2.redhat.com [10.10.124.213]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9EBC01059A40 for ; Tue, 22 Oct 2019 17:47:41 +0000 (UTC) Date: Tue, 22 Oct 2019 12:47:39 -0500 From: Josh Poimboeuf Subject: [MODERATED] Re: [PATCH v7 03/10] TAAv7 3 Message-ID: <20191022174739.cpzp4l5ac6y2sufx@treble> References: =?utf-8?q?=3C6278bde25302f93c627a3ad631b9d1015535f26f=2E1571688957=2Egi?= =?utf-8?q?t=2Epawan=2Ekumar=2Egupta=40linux=2Eintel=2Ecom=3E?= MIME-Version: 1.0 In-Reply-To: =?utf-8?q?=3C6278bde25302f93c627a3ad631b9d1015535f26f=2E15716?= =?utf-8?q?88957=2Egit=2Epawan=2Ekumar=2Egupta=40linux=2Eintel=2Ecom=3E?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Mon, Oct 21, 2019 at 01:25:02PM -0700, speck for Pawan Gupta wrote: > From: Pawan Gupta > Subject: [PATCH v7 03/10] x86/tsx: Add TSX cmdline option with TSX disabled by > default > > Add kernel cmdline parameter "tsx" to control the Transactional > Synchronization Extensions (TSX) feature. On CPUs that support TSX > control, use "tsx=on|off" to enable or disable TSX. Not specifying this > option is equivalent to "tsx=off". This is because on certain processors > TSX may be used as a part of a speculative side channel attack. > > Signed-off-by: Pawan Gupta > Reviewed-by: Mark Gross > Reviewed-by: Tony Luck > Tested-by: Neelima Krishnan > --- > .../admin-guide/kernel-parameters.txt | 11 ++ > arch/x86/kernel/cpu/Makefile | 2 +- > arch/x86/kernel/cpu/common.c | 2 + > arch/x86/kernel/cpu/cpu.h | 18 +++ > arch/x86/kernel/cpu/intel.c | 5 + > arch/x86/kernel/cpu/tsx.c | 114 ++++++++++++++++++ > 6 files changed, 151 insertions(+), 1 deletion(-) > create mode 100644 arch/x86/kernel/cpu/tsx.c > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > index a84a83f8881e..ad6b69057bb0 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -4848,6 +4848,17 @@ > interruptions from clocksource watchdog are not > acceptable). > > + tsx= [X86] Control Transactional Synchronization > + Extensions (TSX) feature in Intel processors that > + support TSX control. > + > + This parameter controls the TSX feature. The options are: > + > + on - Enable TSX on the system. > + off - Disable TSX on the system. > + > + Not specifying this option is equivalent to tsx=off. In addition to the previous comments about clarifying the functionalities of 'off' and 'auto', I think this really needs to describe the risks associated with 'on' and 'auto', so the user can have more guidance about what to do. It should state that while there are mitigations for all known issues (i.e., the tsx_async_abort= option), TSX has been known to be an accelerator for several previous speculation-related CVEs, and so there may be unknown security risks associated with leaving it enabled. -- Josh