From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0718CA9EC0 for ; Mon, 28 Oct 2019 16:35:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A1F2D20717 for ; Mon, 28 Oct 2019 16:35:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391097AbfJ1Qfl (ORCPT ); Mon, 28 Oct 2019 12:35:41 -0400 Received: from foss.arm.com ([217.140.110.172]:42724 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729420AbfJ1Qfk (ORCPT ); Mon, 28 Oct 2019 12:35:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F03761FB; Mon, 28 Oct 2019 09:35:39 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D03093F6C4; Mon, 28 Oct 2019 09:35:37 -0700 (PDT) Date: Mon, 28 Oct 2019 16:35:33 +0000 From: Mark Rutland To: Sami Tolvanen Cc: Will Deacon , Catalin Marinas , Steven Rostedt , Masami Hiramatsu , Ard Biesheuvel , Dave Martin , Kees Cook , Laura Abbott , Nick Desaulniers , Jann Horn , Miguel Ojeda , Masahiro Yamada , clang-built-linux , Kernel Hardening , linux-arm-kernel , LKML Subject: Re: [PATCH v2 05/17] add support for Clang's Shadow Call Stack (SCS) Message-ID: <20191028163532.GA52213@lakrids.cambridge.arm.com> References: <20191018161033.261971-1-samitolvanen@google.com> <20191024225132.13410-1-samitolvanen@google.com> <20191024225132.13410-6-samitolvanen@google.com> <20191025105643.GD40270@lakrids.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.1+11 (2f07cb52) (2018-12-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 25, 2019 at 01:49:21PM -0700, Sami Tolvanen wrote: > On Fri, Oct 25, 2019 at 3:56 AM Mark Rutland wrote: > > > +#define SCS_END_MAGIC 0xaf0194819b1635f6UL > > > > Keyboard smash? ... or is there a prize for whoever figures out the > > secret? ;) > > It's a random number, so if someone figures out a secret in it, > they'll definitely deserve a prize. :) I'll Cc some treasure hunters. :) > > > diff --git a/kernel/fork.c b/kernel/fork.c > > > index bcdf53125210..ae7ebe9f0586 100644 > > > --- a/kernel/fork.c > > > +++ b/kernel/fork.c > > > @@ -94,6 +94,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > > Nit: alphabetical order, please (this should come before stackleak.h). > > The includes in kernel/fork.c aren't in alphabetical order, so I just > added this to the end here. Fair enough. It looked otherwise in the context, and we generally aim for that as a soft rule. [...] > > > +static inline void *__scs_base(struct task_struct *tsk) > > > +{ > > > + return (void *)((uintptr_t)task_scs(tsk) & ~(SCS_SIZE - 1)); > > > +} > > > > We only ever assign the base to task_scs(tsk), with the current live > > value being in a register that we don't read. Are we expecting arch code > > to keep this up-to-date with the register value? > > > > I would have expected that we just leave this as the base (as we do for > > the regular stack in the task struct), and it's down to arch code to > > save/restore the current value where necessary. > > > > Am I missing some caveat with that approach? > > To keep the address of the currently active shadow stack out of > memory, the arm64 implementation clears this field when it loads x18 > and saves the current value before a context switch. The generic code > doesn't expect the arch code to necessarily do so, but does allow it. > This requires us to use __scs_base() when accessing the base pointer > and to reset it in idle tasks before they're reused, hence > scs_task_reset(). Ok. That'd be worth a comment somewhere, since it adds a number of things which would otherwise be unnecessary. IIUC this assumes an adversary who knows the address of a task's thread_info, and has an arbitrary-read (to extract the SCS base from thead_info) and an arbitrary-write (to modify the SCS area). Assuming that's the case, I don't think this buys much. If said adversary controls two userspace threads A and B, they only need to wait until A is context-switched out or in userspace, and read A's SCS base using B. Given that, I'd rather always store the SCS base in the thread_info, and simplify the rest of the code manipulating it. Thanks, Mark. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 604C0CA9EC2 for ; Mon, 28 Oct 2019 16:44:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 30C7221744 for ; Mon, 28 Oct 2019 16:44:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="etvieBgE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 30C7221744 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=M4VDH7ctLSQuYLQUQMX/uKBVCE+Hi+2KQXeBz4N9D4k=; b=etvieBgEvmv1Su IACdDBVvqO3V9mKAa2D03KHJp167DlhAzuvUmGTGO2HBOA88TWs8k747EqarRIKSym3MrAHS4eq+q qzNY2KOITrFXhZ3ZDBu5yzTn52jNLT0F4llTWuVf6LJ7eu8Nsgrz2yNZiJ7KfMQDnCTtp37xTksTE 9gwxY49W535LHbty7pZImCsPdcGEXja77CFUT7J6sZCXrLBsNGVU+O1kQjYuycW5qJYirbmvKvaHx LVF1gY0jZTEvYHhN5Alt+oe9BDiROSMZqYQ6enN90nLs7Hk9s/qJHwX/EUzzeyo5VEfrPNYaU8Abj wVBcmrCN4w58Nt0PFEHg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iP87b-0001s9-Lq; Mon, 28 Oct 2019 16:43:59 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iP7zZ-0001hg-Jm for linux-arm-kernel@lists.infradead.org; Mon, 28 Oct 2019 16:35:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F03761FB; Mon, 28 Oct 2019 09:35:39 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D03093F6C4; Mon, 28 Oct 2019 09:35:37 -0700 (PDT) Date: Mon, 28 Oct 2019 16:35:33 +0000 From: Mark Rutland To: Sami Tolvanen Subject: Re: [PATCH v2 05/17] add support for Clang's Shadow Call Stack (SCS) Message-ID: <20191028163532.GA52213@lakrids.cambridge.arm.com> References: <20191018161033.261971-1-samitolvanen@google.com> <20191024225132.13410-1-samitolvanen@google.com> <20191024225132.13410-6-samitolvanen@google.com> <20191025105643.GD40270@lakrids.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.1+11 (2f07cb52) (2018-12-01) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191028_093541_788161_B2556889 X-CRM114-Status: GOOD ( 22.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kees Cook , Ard Biesheuvel , Masahiro Yamada , Catalin Marinas , Jann Horn , Nick Desaulniers , LKML , Steven Rostedt , Miguel Ojeda , Masami Hiramatsu , clang-built-linux , Kernel Hardening , Laura Abbott , Will Deacon , Dave Martin , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Oct 25, 2019 at 01:49:21PM -0700, Sami Tolvanen wrote: > On Fri, Oct 25, 2019 at 3:56 AM Mark Rutland wrote: > > > +#define SCS_END_MAGIC 0xaf0194819b1635f6UL > > > > Keyboard smash? ... or is there a prize for whoever figures out the > > secret? ;) > > It's a random number, so if someone figures out a secret in it, > they'll definitely deserve a prize. :) I'll Cc some treasure hunters. :) > > > diff --git a/kernel/fork.c b/kernel/fork.c > > > index bcdf53125210..ae7ebe9f0586 100644 > > > --- a/kernel/fork.c > > > +++ b/kernel/fork.c > > > @@ -94,6 +94,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > > Nit: alphabetical order, please (this should come before stackleak.h). > > The includes in kernel/fork.c aren't in alphabetical order, so I just > added this to the end here. Fair enough. It looked otherwise in the context, and we generally aim for that as a soft rule. [...] > > > +static inline void *__scs_base(struct task_struct *tsk) > > > +{ > > > + return (void *)((uintptr_t)task_scs(tsk) & ~(SCS_SIZE - 1)); > > > +} > > > > We only ever assign the base to task_scs(tsk), with the current live > > value being in a register that we don't read. Are we expecting arch code > > to keep this up-to-date with the register value? > > > > I would have expected that we just leave this as the base (as we do for > > the regular stack in the task struct), and it's down to arch code to > > save/restore the current value where necessary. > > > > Am I missing some caveat with that approach? > > To keep the address of the currently active shadow stack out of > memory, the arm64 implementation clears this field when it loads x18 > and saves the current value before a context switch. The generic code > doesn't expect the arch code to necessarily do so, but does allow it. > This requires us to use __scs_base() when accessing the base pointer > and to reset it in idle tasks before they're reused, hence > scs_task_reset(). Ok. That'd be worth a comment somewhere, since it adds a number of things which would otherwise be unnecessary. IIUC this assumes an adversary who knows the address of a task's thread_info, and has an arbitrary-read (to extract the SCS base from thead_info) and an arbitrary-write (to modify the SCS area). Assuming that's the case, I don't think this buys much. If said adversary controls two userspace threads A and B, they only need to wait until A is context-switched out or in userspace, and read A's SCS base using B. Given that, I'd rather always store the SCS base in the thread_info, and simplify the rest of the code manipulating it. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel