All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ido Schimmel <idosch@idosch.org>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, jiri@mellanox.com, mlxsw@mellanox.com,
	Ido Schimmel <idosch@mellanox.com>
Subject: [PATCH net-next 02/16] mlxsw: reg: Add Port Module Type Mapping Register
Date: Thu, 31 Oct 2019 11:42:07 +0200	[thread overview]
Message-ID: <20191031094221.17526-3-idosch@idosch.org> (raw)
In-Reply-To: <20191031094221.17526-1-idosch@idosch.org>

From: Jiri Pirko <jiri@mellanox.com>

The PMTM allows query or configuration of module types.

Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
---
 drivers/net/ethernet/mellanox/mlxsw/reg.h | 50 +++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 7fd6fd9c5244..bec035ee5349 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5375,6 +5375,55 @@ static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port,
 				 MLXSW_REG_PPLR_LB_TYPE_BIT_PHY_LOCAL : 0);
 }
 
+/* PMTM - Port Module Type Mapping Register
+ * ----------------------------------------
+ * The PMTM allows query or configuration of module types.
+ */
+#define MLXSW_REG_PMTM_ID 0x5067
+#define MLXSW_REG_PMTM_LEN 0x10
+
+MLXSW_REG_DEFINE(pmtm, MLXSW_REG_PMTM_ID, MLXSW_REG_PMTM_LEN);
+
+/* reg_pmtm_module
+ * Module number.
+ * Access: Index
+ */
+MLXSW_ITEM32(reg, pmtm, module, 0x00, 16, 8);
+
+enum mlxsw_reg_pmtm_module_type {
+	/* Backplane with 4 lanes */
+	MLXSW_REG_PMTM_MODULE_TYPE_BP_4X,
+	/* QSFP */
+	MLXSW_REG_PMTM_MODULE_TYPE_BP_QSFP,
+	/* SFP */
+	MLXSW_REG_PMTM_MODULE_TYPE_BP_SFP,
+	/* Backplane with single lane */
+	MLXSW_REG_PMTM_MODULE_TYPE_BP_1X = 4,
+	/* Backplane with two lane */
+	MLXSW_REG_PMTM_MODULE_TYPE_BP_2X = 8,
+	/* Chip2Chip */
+	MLXSW_REG_PMTM_MODULE_TYPE_C2C = 10,
+};
+
+/* reg_pmtm_module_type
+ * Module type.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, pmtm, module_type, 0x04, 0, 4);
+
+static inline void mlxsw_reg_pmtm_pack(char *payload, u8 module)
+{
+	MLXSW_REG_ZERO(pmtm, payload);
+	mlxsw_reg_pmtm_module_set(payload, module);
+}
+
+static inline void
+mlxsw_reg_pmtm_unpack(char *payload,
+		      enum mlxsw_reg_pmtm_module_type *module_type)
+{
+	*module_type = mlxsw_reg_pmtm_module_type_get(payload);
+}
+
 /* HTGT - Host Trap Group Table
  * ----------------------------
  * Configures the properties for forwarding to CPU.
@@ -10545,6 +10594,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
 	MLXSW_REG(pbmc),
 	MLXSW_REG(pspa),
 	MLXSW_REG(pplr),
+	MLXSW_REG(pmtm),
 	MLXSW_REG(htgt),
 	MLXSW_REG(hpkt),
 	MLXSW_REG(rgcr),
-- 
2.21.0


  parent reply	other threads:[~2019-10-31  9:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-31  9:42 [PATCH net-next 00/16] mlxsw: Make port split code more generic Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 01/16] mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits Ido Schimmel
2019-10-31  9:42 ` Ido Schimmel [this message]
2019-10-31  9:42 ` [PATCH net-next 03/16] mlxsw: spectrum: Use PMTM register to get max module width Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 04/16] mlxsw: spectrum: Move max_width check up before count check Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 05/16] mlxsw: spectrum: Distinguish between unsplittable and split port Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 06/16] mlxsw: spectrum: Replace port_to_module array with array of structs Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 07/16] mlxsw: spectrum: Use mapping of port being split for creating split ports Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 08/16] mlxsw: spectrum: Pass mapping values in port mapping structure Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 09/16] mlxsw: spectrum: Add sanity checks into module info get Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 10/16] mlxsw: spectrum: Push getting offsets of split ports into a helper Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 11/16] mlxsw: spectrum: Introduce resource for getting offset of 4 lanes split port Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 12/16] mlxsw: spectrum: Remember split base local port and use it in unsplit Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 13/16] mlxsw: spectrum: Use port_module_max_width to compute base port index Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 14/16] mlxsw: spectrum: Fix base port get for split count 4 and 8 Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 15/16] mlxsw: spectrum: Iterate over all ports in gap during unsplit create Ido Schimmel
2019-10-31  9:42 ` [PATCH net-next 16/16] mlxsw: spectrum: Generalize split count check Ido Schimmel
2019-10-31 17:55 ` [PATCH net-next 00/16] mlxsw: Make port split code more generic David Miller

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191031094221.17526-3-idosch@idosch.org \
    --to=idosch@idosch.org \
    --cc=davem@davemloft.net \
    --cc=idosch@mellanox.com \
    --cc=jiri@mellanox.com \
    --cc=mlxsw@mellanox.com \
    --cc=netdev@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.