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Wed, 6 Nov 2019 08:35:15 +0000 From: Anup Patel To: Peter Maydell , Palmer Dabbelt , Alistair Francis , Sagar Karandikar , Bastian Koppelmann Subject: [PATCH v7 1/3] hw: rtc: Add Goldfish RTC device Thread-Topic: [PATCH v7 1/3] hw: rtc: Add Goldfish RTC device Thread-Index: AQHVlH0crzkabwv/AUiAX5t5AE326Q== Date: Wed, 6 Nov 2019 08:35:15 +0000 Message-ID: <20191106083444.41113-2-anup.patel@wdc.com> References: <20191106083444.41113-1-anup.patel@wdc.com> In-Reply-To: <20191106083444.41113-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR01CA0117.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:1::33) To MN2PR04MB6061.namprd04.prod.outlook.com (2603:10b6:208:d8::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [129.253.179.161] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 4b944883-30f8-4a4a-aeee-08d762943f3b x-ms-traffictypediagnostic: MN2PR04MB5936: x-ms-exchange-purlcount: 3 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:257; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b944883-30f8-4a4a-aeee-08d762943f3b X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2019 08:35:15.6149 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mH6WcGUM1cIzzLj+rmmAIyprUqMJ++9RBvLa3ppmkhNzrJdPE8cscf/QauAlPCqW8zle3+vam43DJQKSOehlrA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB5936 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 68.232.141.245 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "qemu-riscv@nongnu.org" , Anup Patel , Anup Patel , "qemu-devel@nongnu.org" , Atish Patra , =?iso-8859-1?Q?Philippe_Mathieu-Daud=E9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This patch adds model for Google Goldfish virtual platform RTC device. We will be adding Goldfish RTC device to the QEMU RISC-V virt machine for providing real date-time to Guest Linux. The corresponding Linux driver for Goldfish RTC device is already available in upstream Linux. For now, VM migration support is available but untested for Goldfish RTC device. It will be hardened in-future when we implement VM migration for KVM RISC-V. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- hw/rtc/Kconfig | 3 + hw/rtc/Makefile.objs | 1 + hw/rtc/goldfish_rtc.c | 285 ++++++++++++++++++++++++++++++++++ hw/rtc/trace-events | 4 + include/hw/rtc/goldfish_rtc.h | 46 ++++++ 5 files changed, 339 insertions(+) create mode 100644 hw/rtc/goldfish_rtc.c create mode 100644 include/hw/rtc/goldfish_rtc.h diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig index 45daa8d655..bafe6ac2c9 100644 --- a/hw/rtc/Kconfig +++ b/hw/rtc/Kconfig @@ -21,3 +21,6 @@ config MC146818RTC =20 config SUN4V_RTC bool + +config GOLDFISH_RTC + bool diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs index 8dc9fcd3a9..aa208d0d10 100644 --- a/hw/rtc/Makefile.objs +++ b/hw/rtc/Makefile.objs @@ -11,3 +11,4 @@ common-obj-$(CONFIG_EXYNOS4) +=3D exynos4210_rtc.o obj-$(CONFIG_MC146818RTC) +=3D mc146818rtc.o common-obj-$(CONFIG_SUN4V_RTC) +=3D sun4v-rtc.o common-obj-$(CONFIG_ASPEED_SOC) +=3D aspeed_rtc.o +common-obj-$(CONFIG_GOLDFISH_RTC) +=3D goldfish_rtc.o diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c new file mode 100644 index 0000000000..01e9d2b083 --- /dev/null +++ b/hw/rtc/goldfish_rtc.c @@ -0,0 +1,285 @@ +/* + * Goldfish virtual platform RTC + * + * Copyright (C) 2019 Western Digital Corporation or its affiliates. + * + * For more details on Google Goldfish virtual platform refer: + * https://android.googlesource.com/platform/external/qemu/+/refs/heads/em= u-2.0-release/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/rtc/goldfish_rtc.h" +#include "migration/vmstate.h" +#include "hw/irq.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "qemu/bitops.h" +#include "qemu/timer.h" +#include "sysemu/sysemu.h" +#include "qemu/cutils.h" +#include "qemu/log.h" + +#include "trace.h" + +#define RTC_TIME_LOW 0x00 +#define RTC_TIME_HIGH 0x04 +#define RTC_ALARM_LOW 0x08 +#define RTC_ALARM_HIGH 0x0c +#define RTC_IRQ_ENABLED 0x10 +#define RTC_CLEAR_ALARM 0x14 +#define RTC_ALARM_STATUS 0x18 +#define RTC_CLEAR_INTERRUPT 0x1c + +static void goldfish_rtc_update(GoldfishRTCState *s) +{ + qemu_set_irq(s->irq, (s->irq_pending & s->irq_enabled) ? 1 : 0); +} + +static void goldfish_rtc_interrupt(void *opaque) +{ + GoldfishRTCState *s =3D (GoldfishRTCState *)opaque; + + s->alarm_running =3D 0; + s->irq_pending =3D 1; + goldfish_rtc_update(s); +} + +static uint64_t goldfish_rtc_get_count(GoldfishRTCState *s) +{ + return s->tick_offset + (uint64_t)qemu_clock_get_ns(rtc_clock); +} + +static void goldfish_rtc_clear_alarm(GoldfishRTCState *s) +{ + timer_del(s->timer); + s->alarm_running =3D 0; +} + +static void goldfish_rtc_set_alarm(GoldfishRTCState *s) +{ + uint64_t ticks =3D goldfish_rtc_get_count(s); + uint64_t event =3D s->alarm_next; + + if (event <=3D ticks) { + goldfish_rtc_clear_alarm(s); + goldfish_rtc_interrupt(s); + } else { + /* + * We should be setting timer expiry to: + * qemu_clock_get_ns(rtc_clock) + (event - ticks) + * but this is equivalent to: + * event - s->tick_offset + */ + timer_mod(s->timer, event - s->tick_offset); + s->alarm_running =3D 1; + } +} + +static uint64_t goldfish_rtc_read(void *opaque, hwaddr offset, + unsigned size) +{ + GoldfishRTCState *s =3D opaque; + uint64_t r =3D 0; + + switch (offset) { + case RTC_TIME_LOW: + r =3D goldfish_rtc_get_count(s) & 0xffffffff; + break; + case RTC_TIME_HIGH: + r =3D goldfish_rtc_get_count(s) >> 32; + break; + case RTC_ALARM_LOW: + r =3D s->alarm_next & 0xffffffff; + break; + case RTC_ALARM_HIGH: + r =3D s->alarm_next >> 32; + break; + case RTC_IRQ_ENABLED: + r =3D s->irq_enabled; + break; + case RTC_ALARM_STATUS: + r =3D s->alarm_running; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: offset 0x%x is UNIMP.\n", __func__, (uint32_t)offse= t); + break; + } + + trace_goldfish_rtc_read(offset, r); + + return r; +} + +static void goldfish_rtc_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + GoldfishRTCState *s =3D opaque; + uint64_t current_tick, new_tick; + + switch (offset) { + case RTC_TIME_LOW: + current_tick =3D goldfish_rtc_get_count(s); + new_tick =3D deposit64(current_tick, 0, 32, value); + s->tick_offset +=3D new_tick - current_tick; + break; + case RTC_TIME_HIGH: + current_tick =3D goldfish_rtc_get_count(s); + new_tick =3D deposit64(current_tick, 32, 32, value); + s->tick_offset +=3D new_tick - current_tick; + break; + case RTC_ALARM_LOW: + s->alarm_next =3D deposit64(s->alarm_next, 0, 32, value); + goldfish_rtc_set_alarm(s); + break; + case RTC_ALARM_HIGH: + s->alarm_next =3D deposit64(s->alarm_next, 32, 32, value); + break; + case RTC_IRQ_ENABLED: + s->irq_enabled =3D (uint32_t)(value & 0x1); + goldfish_rtc_update(s); + break; + case RTC_CLEAR_ALARM: + goldfish_rtc_clear_alarm(s); + break; + case RTC_CLEAR_INTERRUPT: + s->irq_pending =3D 0; + goldfish_rtc_update(s); + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: offset 0x%x is UNIMP.\n", __func__, (uint32_t)offse= t); + break; + } + + trace_goldfish_rtc_write(offset, value); +} + +static int goldfish_rtc_pre_save(void *opaque) +{ + uint64_t delta; + GoldfishRTCState *s =3D opaque; + + /* + * We want to migrate this offset, which sounds straightforward. + * Unfortunately, we cannot directly pass tick_offset because + * rtc_clock on destination Host might not be same source Host. + * + * To tackle, this we pass tick_offset relative to vm_clock from + * source Host and make it relative to rtc_clock at destination Host. + */ + delta =3D qemu_clock_get_ns(rtc_clock) - + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + s->tick_offset_vmstate =3D s->tick_offset + delta; + + return 0; +} + +static int goldfish_rtc_post_load(void *opaque, int version_id) +{ + uint64_t delta; + GoldfishRTCState *s =3D opaque; + + /* + * We extract tick_offset from tick_offset_vmstate by doing + * reverse math compared to pre_save() function. + */ + delta =3D qemu_clock_get_ns(rtc_clock) - + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + s->tick_offset =3D s->tick_offset_vmstate - delta; + + return 0; +} + +static const MemoryRegionOps goldfish_rtc_ops =3D { + .read =3D goldfish_rtc_read, + .write =3D goldfish_rtc_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4 + } +}; + +static const VMStateDescription goldfish_rtc_vmstate =3D { + .name =3D TYPE_GOLDFISH_RTC, + .version_id =3D 1, + .pre_save =3D goldfish_rtc_pre_save, + .post_load =3D goldfish_rtc_post_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(tick_offset_vmstate, GoldfishRTCState), + VMSTATE_UINT64(alarm_next, GoldfishRTCState), + VMSTATE_UINT32(alarm_running, GoldfishRTCState), + VMSTATE_UINT32(irq_pending, GoldfishRTCState), + VMSTATE_UINT32(irq_enabled, GoldfishRTCState), + VMSTATE_END_OF_LIST() + } +}; + +static void goldfish_rtc_reset(DeviceState *dev) +{ + GoldfishRTCState *s =3D GOLDFISH_RTC(dev); + struct tm tm; + + timer_del(s->timer); + + qemu_get_timedate(&tm, 0); + s->tick_offset =3D mktimegm(&tm); + s->tick_offset *=3D NANOSECONDS_PER_SECOND; + s->tick_offset -=3D qemu_clock_get_ns(rtc_clock); + s->tick_offset_vmstate =3D 0; + s->alarm_next =3D 0; + s->alarm_running =3D 0; + s->irq_pending =3D 0; + s->irq_enabled =3D 0; +} + +static void goldfish_rtc_realize(DeviceState *d, Error **errp) +{ + SysBusDevice *dev =3D SYS_BUS_DEVICE(d); + GoldfishRTCState *s =3D GOLDFISH_RTC(d); + + memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_rtc_ops, s, + "goldfish_rtc", 0x24); + sysbus_init_mmio(dev, &s->iomem); + + sysbus_init_irq(dev, &s->irq); + + s->timer =3D timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s); +} + +static void goldfish_rtc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D goldfish_rtc_realize; + dc->reset =3D goldfish_rtc_reset; + dc->vmsd =3D &goldfish_rtc_vmstate; +} + +static const TypeInfo goldfish_rtc_info =3D { + .name =3D TYPE_GOLDFISH_RTC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(GoldfishRTCState), + .class_init =3D goldfish_rtc_class_init, +}; + +static void goldfish_rtc_register_types(void) +{ + type_register_static(&goldfish_rtc_info); +} + +type_init(goldfish_rtc_register_types) diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events index d6749f4616..0bfaa26cb8 100644 --- a/hw/rtc/trace-events +++ b/hw/rtc/trace-events @@ -17,3 +17,7 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" # aspeed-rtc.c aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value= 0x%08" PRIx64 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " valu= e 0x%08" PRIx64 + +# goldfish_rtc.c +goldfish_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " val= ue 0x%08" PRIx64 +goldfish_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " va= lue 0x%08" PRIx64 diff --git a/include/hw/rtc/goldfish_rtc.h b/include/hw/rtc/goldfish_rtc.h new file mode 100644 index 0000000000..16f9f9e29d --- /dev/null +++ b/include/hw/rtc/goldfish_rtc.h @@ -0,0 +1,46 @@ +/* + * Goldfish virtual platform RTC + * + * Copyright (C) 2019 Western Digital Corporation or its affiliates. + * + * For more details on Google Goldfish virtual platform refer: + * https://android.googlesource.com/platform/external/qemu/+/master/docs/G= OLDFISH-VIRTUAL-HARDWARE.TXT + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#ifndef HW_RTC_GOLDFISH_RTC_H +#define HW_RTC_GOLDFISH_RTC_H + +#include "hw/sysbus.h" + +#define TYPE_GOLDFISH_RTC "goldfish_rtc" +#define GOLDFISH_RTC(obj) \ + OBJECT_CHECK(GoldfishRTCState, (obj), TYPE_GOLDFISH_RTC) + +typedef struct GoldfishRTCState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + QEMUTimer *timer; + qemu_irq irq; + + uint64_t tick_offset; + uint64_t tick_offset_vmstate; + uint64_t alarm_next; + uint32_t alarm_running; + uint32_t irq_pending; + uint32_t irq_enabled; +} GoldfishRTCState; + +#endif --=20 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1iSGms-0006zk-3F for mharc-qemu-riscv@gnu.org; Wed, 06 Nov 2019 03:35:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:43327) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iSGmo-0006v5-NG for qemu-riscv@nongnu.org; Wed, 06 Nov 2019 03:35:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iSGmm-0003bK-GB for qemu-riscv@nongnu.org; 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Wed, 6 Nov 2019 08:35:15 +0000 From: Anup Patel To: Peter Maydell , Palmer Dabbelt , Alistair Francis , Sagar Karandikar , Bastian Koppelmann CC: Atish Patra , =?iso-8859-1?Q?Philippe_Mathieu-Daud=E9?= , Anup Patel , "qemu-riscv@nongnu.org" , "qemu-devel@nongnu.org" , Anup Patel Subject: [PATCH v7 1/3] hw: rtc: Add Goldfish RTC device Thread-Topic: [PATCH v7 1/3] hw: rtc: Add Goldfish RTC device Thread-Index: AQHVlH0crzkabwv/AUiAX5t5AE326Q== Date: Wed, 6 Nov 2019 08:35:15 +0000 Message-ID: <20191106083444.41113-2-anup.patel@wdc.com> References: <20191106083444.41113-1-anup.patel@wdc.com> In-Reply-To: <20191106083444.41113-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR01CA0117.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:1::33) To MN2PR04MB6061.namprd04.prod.outlook.com (2603:10b6:208:d8::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [129.253.179.161] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 4b944883-30f8-4a4a-aeee-08d762943f3b x-ms-traffictypediagnostic: MN2PR04MB5936: x-ms-exchange-purlcount: 3 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: wdcipoutbound: EOP-TRUE x-ms-oob-tlc-oobclassifiers: OLM:257; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b944883-30f8-4a4a-aeee-08d762943f3b X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2019 08:35:15.6149 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mH6WcGUM1cIzzLj+rmmAIyprUqMJ++9RBvLa3ppmkhNzrJdPE8cscf/QauAlPCqW8zle3+vam43DJQKSOehlrA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB5936 X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x [fuzzy] X-Received-From: 68.232.141.245 X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Nov 2019 08:35:33 -0000 This patch adds model for Google Goldfish virtual platform RTC device. We will be adding Goldfish RTC device to the QEMU RISC-V virt machine for providing real date-time to Guest Linux. The corresponding Linux driver for Goldfish RTC device is already available in upstream Linux. For now, VM migration support is available but untested for Goldfish RTC device. It will be hardened in-future when we implement VM migration for KVM RISC-V. Signed-off-by: Anup Patel Reviewed-by: Alistair Francis --- hw/rtc/Kconfig | 3 + hw/rtc/Makefile.objs | 1 + hw/rtc/goldfish_rtc.c | 285 ++++++++++++++++++++++++++++++++++ hw/rtc/trace-events | 4 + include/hw/rtc/goldfish_rtc.h | 46 ++++++ 5 files changed, 339 insertions(+) create mode 100644 hw/rtc/goldfish_rtc.c create mode 100644 include/hw/rtc/goldfish_rtc.h diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig index 45daa8d655..bafe6ac2c9 100644 --- a/hw/rtc/Kconfig +++ b/hw/rtc/Kconfig @@ -21,3 +21,6 @@ config MC146818RTC =20 config SUN4V_RTC bool + +config GOLDFISH_RTC + bool diff --git a/hw/rtc/Makefile.objs b/hw/rtc/Makefile.objs index 8dc9fcd3a9..aa208d0d10 100644 --- a/hw/rtc/Makefile.objs +++ b/hw/rtc/Makefile.objs @@ -11,3 +11,4 @@ common-obj-$(CONFIG_EXYNOS4) +=3D exynos4210_rtc.o obj-$(CONFIG_MC146818RTC) +=3D mc146818rtc.o common-obj-$(CONFIG_SUN4V_RTC) +=3D sun4v-rtc.o common-obj-$(CONFIG_ASPEED_SOC) +=3D aspeed_rtc.o +common-obj-$(CONFIG_GOLDFISH_RTC) +=3D goldfish_rtc.o diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c new file mode 100644 index 0000000000..01e9d2b083 --- /dev/null +++ b/hw/rtc/goldfish_rtc.c @@ -0,0 +1,285 @@ +/* + * Goldfish virtual platform RTC + * + * Copyright (C) 2019 Western Digital Corporation or its affiliates. + * + * For more details on Google Goldfish virtual platform refer: + * https://android.googlesource.com/platform/external/qemu/+/refs/heads/em= u-2.0-release/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/rtc/goldfish_rtc.h" +#include "migration/vmstate.h" +#include "hw/irq.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "qemu/bitops.h" +#include "qemu/timer.h" +#include "sysemu/sysemu.h" +#include "qemu/cutils.h" +#include "qemu/log.h" + +#include "trace.h" + +#define RTC_TIME_LOW 0x00 +#define RTC_TIME_HIGH 0x04 +#define RTC_ALARM_LOW 0x08 +#define RTC_ALARM_HIGH 0x0c +#define RTC_IRQ_ENABLED 0x10 +#define RTC_CLEAR_ALARM 0x14 +#define RTC_ALARM_STATUS 0x18 +#define RTC_CLEAR_INTERRUPT 0x1c + +static void goldfish_rtc_update(GoldfishRTCState *s) +{ + qemu_set_irq(s->irq, (s->irq_pending & s->irq_enabled) ? 1 : 0); +} + +static void goldfish_rtc_interrupt(void *opaque) +{ + GoldfishRTCState *s =3D (GoldfishRTCState *)opaque; + + s->alarm_running =3D 0; + s->irq_pending =3D 1; + goldfish_rtc_update(s); +} + +static uint64_t goldfish_rtc_get_count(GoldfishRTCState *s) +{ + return s->tick_offset + (uint64_t)qemu_clock_get_ns(rtc_clock); +} + +static void goldfish_rtc_clear_alarm(GoldfishRTCState *s) +{ + timer_del(s->timer); + s->alarm_running =3D 0; +} + +static void goldfish_rtc_set_alarm(GoldfishRTCState *s) +{ + uint64_t ticks =3D goldfish_rtc_get_count(s); + uint64_t event =3D s->alarm_next; + + if (event <=3D ticks) { + goldfish_rtc_clear_alarm(s); + goldfish_rtc_interrupt(s); + } else { + /* + * We should be setting timer expiry to: + * qemu_clock_get_ns(rtc_clock) + (event - ticks) + * but this is equivalent to: + * event - s->tick_offset + */ + timer_mod(s->timer, event - s->tick_offset); + s->alarm_running =3D 1; + } +} + +static uint64_t goldfish_rtc_read(void *opaque, hwaddr offset, + unsigned size) +{ + GoldfishRTCState *s =3D opaque; + uint64_t r =3D 0; + + switch (offset) { + case RTC_TIME_LOW: + r =3D goldfish_rtc_get_count(s) & 0xffffffff; + break; + case RTC_TIME_HIGH: + r =3D goldfish_rtc_get_count(s) >> 32; + break; + case RTC_ALARM_LOW: + r =3D s->alarm_next & 0xffffffff; + break; + case RTC_ALARM_HIGH: + r =3D s->alarm_next >> 32; + break; + case RTC_IRQ_ENABLED: + r =3D s->irq_enabled; + break; + case RTC_ALARM_STATUS: + r =3D s->alarm_running; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: offset 0x%x is UNIMP.\n", __func__, (uint32_t)offse= t); + break; + } + + trace_goldfish_rtc_read(offset, r); + + return r; +} + +static void goldfish_rtc_write(void *opaque, hwaddr offset, + uint64_t value, unsigned size) +{ + GoldfishRTCState *s =3D opaque; + uint64_t current_tick, new_tick; + + switch (offset) { + case RTC_TIME_LOW: + current_tick =3D goldfish_rtc_get_count(s); + new_tick =3D deposit64(current_tick, 0, 32, value); + s->tick_offset +=3D new_tick - current_tick; + break; + case RTC_TIME_HIGH: + current_tick =3D goldfish_rtc_get_count(s); + new_tick =3D deposit64(current_tick, 32, 32, value); + s->tick_offset +=3D new_tick - current_tick; + break; + case RTC_ALARM_LOW: + s->alarm_next =3D deposit64(s->alarm_next, 0, 32, value); + goldfish_rtc_set_alarm(s); + break; + case RTC_ALARM_HIGH: + s->alarm_next =3D deposit64(s->alarm_next, 32, 32, value); + break; + case RTC_IRQ_ENABLED: + s->irq_enabled =3D (uint32_t)(value & 0x1); + goldfish_rtc_update(s); + break; + case RTC_CLEAR_ALARM: + goldfish_rtc_clear_alarm(s); + break; + case RTC_CLEAR_INTERRUPT: + s->irq_pending =3D 0; + goldfish_rtc_update(s); + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: offset 0x%x is UNIMP.\n", __func__, (uint32_t)offse= t); + break; + } + + trace_goldfish_rtc_write(offset, value); +} + +static int goldfish_rtc_pre_save(void *opaque) +{ + uint64_t delta; + GoldfishRTCState *s =3D opaque; + + /* + * We want to migrate this offset, which sounds straightforward. + * Unfortunately, we cannot directly pass tick_offset because + * rtc_clock on destination Host might not be same source Host. + * + * To tackle, this we pass tick_offset relative to vm_clock from + * source Host and make it relative to rtc_clock at destination Host. + */ + delta =3D qemu_clock_get_ns(rtc_clock) - + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + s->tick_offset_vmstate =3D s->tick_offset + delta; + + return 0; +} + +static int goldfish_rtc_post_load(void *opaque, int version_id) +{ + uint64_t delta; + GoldfishRTCState *s =3D opaque; + + /* + * We extract tick_offset from tick_offset_vmstate by doing + * reverse math compared to pre_save() function. + */ + delta =3D qemu_clock_get_ns(rtc_clock) - + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + s->tick_offset =3D s->tick_offset_vmstate - delta; + + return 0; +} + +static const MemoryRegionOps goldfish_rtc_ops =3D { + .read =3D goldfish_rtc_read, + .write =3D goldfish_rtc_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4 + } +}; + +static const VMStateDescription goldfish_rtc_vmstate =3D { + .name =3D TYPE_GOLDFISH_RTC, + .version_id =3D 1, + .pre_save =3D goldfish_rtc_pre_save, + .post_load =3D goldfish_rtc_post_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(tick_offset_vmstate, GoldfishRTCState), + VMSTATE_UINT64(alarm_next, GoldfishRTCState), + VMSTATE_UINT32(alarm_running, GoldfishRTCState), + VMSTATE_UINT32(irq_pending, GoldfishRTCState), + VMSTATE_UINT32(irq_enabled, GoldfishRTCState), + VMSTATE_END_OF_LIST() + } +}; + +static void goldfish_rtc_reset(DeviceState *dev) +{ + GoldfishRTCState *s =3D GOLDFISH_RTC(dev); + struct tm tm; + + timer_del(s->timer); + + qemu_get_timedate(&tm, 0); + s->tick_offset =3D mktimegm(&tm); + s->tick_offset *=3D NANOSECONDS_PER_SECOND; + s->tick_offset -=3D qemu_clock_get_ns(rtc_clock); + s->tick_offset_vmstate =3D 0; + s->alarm_next =3D 0; + s->alarm_running =3D 0; + s->irq_pending =3D 0; + s->irq_enabled =3D 0; +} + +static void goldfish_rtc_realize(DeviceState *d, Error **errp) +{ + SysBusDevice *dev =3D SYS_BUS_DEVICE(d); + GoldfishRTCState *s =3D GOLDFISH_RTC(d); + + memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_rtc_ops, s, + "goldfish_rtc", 0x24); + sysbus_init_mmio(dev, &s->iomem); + + sysbus_init_irq(dev, &s->irq); + + s->timer =3D timer_new_ns(rtc_clock, goldfish_rtc_interrupt, s); +} + +static void goldfish_rtc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D goldfish_rtc_realize; + dc->reset =3D goldfish_rtc_reset; + dc->vmsd =3D &goldfish_rtc_vmstate; +} + +static const TypeInfo goldfish_rtc_info =3D { + .name =3D TYPE_GOLDFISH_RTC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(GoldfishRTCState), + .class_init =3D goldfish_rtc_class_init, +}; + +static void goldfish_rtc_register_types(void) +{ + type_register_static(&goldfish_rtc_info); +} + +type_init(goldfish_rtc_register_types) diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events index d6749f4616..0bfaa26cb8 100644 --- a/hw/rtc/trace-events +++ b/hw/rtc/trace-events @@ -17,3 +17,7 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" # aspeed-rtc.c aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value= 0x%08" PRIx64 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " valu= e 0x%08" PRIx64 + +# goldfish_rtc.c +goldfish_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " val= ue 0x%08" PRIx64 +goldfish_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " va= lue 0x%08" PRIx64 diff --git a/include/hw/rtc/goldfish_rtc.h b/include/hw/rtc/goldfish_rtc.h new file mode 100644 index 0000000000..16f9f9e29d --- /dev/null +++ b/include/hw/rtc/goldfish_rtc.h @@ -0,0 +1,46 @@ +/* + * Goldfish virtual platform RTC + * + * Copyright (C) 2019 Western Digital Corporation or its affiliates. + * + * For more details on Google Goldfish virtual platform refer: + * https://android.googlesource.com/platform/external/qemu/+/master/docs/G= OLDFISH-VIRTUAL-HARDWARE.TXT + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or + * more details. + * + * You should have received a copy of the GNU General Public License along= with + * this program. If not, see . + */ + +#ifndef HW_RTC_GOLDFISH_RTC_H +#define HW_RTC_GOLDFISH_RTC_H + +#include "hw/sysbus.h" + +#define TYPE_GOLDFISH_RTC "goldfish_rtc" +#define GOLDFISH_RTC(obj) \ + OBJECT_CHECK(GoldfishRTCState, (obj), TYPE_GOLDFISH_RTC) + +typedef struct GoldfishRTCState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + QEMUTimer *timer; + qemu_irq irq; + + uint64_t tick_offset; + uint64_t tick_offset_vmstate; + uint64_t alarm_next; + uint32_t alarm_running; + uint32_t irq_pending; + uint32_t irq_enabled; +} GoldfishRTCState; + +#endif --=20 2.17.1