* [PATCH, v2] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.
@ 2019-11-13 9:23 Tian Yunhao
2019-11-18 10:18 ` Maxime Ripard
0 siblings, 1 reply; 3+ messages in thread
From: Tian Yunhao @ 2019-11-13 9:23 UTC (permalink / raw)
Cc: Tian Yunhao, Stephen Boyd, Michael Turquette, linux-kernel,
Maxime Ripard, Chen-Yu Tsai, linux-clk, linux-arm-kernel,
Icenowy Zheng
The hws field of sun8i_v3s_hw_clks has only 74
members. However, the number specified by CLK_NUMBER
is 77 (= CLK_I2S0 + 1). This leads to runtime segmentation
fault that is not always reproducible.
This patch corrects this behavior by separating clock
numbers for V3 and V3S.
Signed-off-by: Yunhao Tian <t123yh@outlook.com>
---
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 4 ++--
drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
index 5c779eec454b..72a87dd0c0d8 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
@@ -618,7 +618,7 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = {
[CLK_MBUS] = &mbus_clk.common.hw,
[CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
},
- .num = CLK_NUMBER,
+ .num = CLK_NUMBER_V3S,
};
static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
@@ -700,7 +700,7 @@ static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
[CLK_MBUS] = &mbus_clk.common.hw,
[CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
},
- .num = CLK_NUMBER,
+ .num = CLK_NUMBER_V3,
};
static struct ccu_reset_map sun8i_v3s_ccu_resets[] = {
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h
index b0160d305a67..18cf8f3c112b 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h
@@ -51,6 +51,7 @@
#define CLK_PLL_DDR1 74
-#define CLK_NUMBER (CLK_I2S0 + 1)
+#define CLK_NUMBER_V3 (CLK_I2S0 + 1)
+#define CLK_NUMBER_V3S (CLK_PLL_DDR1 + 1)
#endif /* _CCU_SUN8I_H3_H_ */
--
2.23.0
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* Re: [PATCH, v2] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.
2019-11-13 9:23 [PATCH, v2] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks Tian Yunhao
@ 2019-11-18 10:18 ` Maxime Ripard
0 siblings, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2019-11-18 10:18 UTC (permalink / raw)
To: Tian Yunhao
Cc: Icenowy Zheng, Chen-Yu Tsai, Michael Turquette, Stephen Boyd,
linux-arm-kernel, linux-clk, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1527 bytes --]
Hi,
On Wed, Nov 13, 2019 at 09:23:59AM +0000, Tian Yunhao wrote:
> The hws field of sun8i_v3s_hw_clks has only 74
> members. However, the number specified by CLK_NUMBER
> is 77 (= CLK_I2S0 + 1). This leads to runtime segmentation
> fault that is not always reproducible.
>
> This patch corrects this behavior by separating clock
> numbers for V3 and V3S.
>
> Signed-off-by: Yunhao Tian <t123yh@outlook.com>
Even though they are similar, the Signed-off-by doesn't match the
authorship.
> ---
> drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 4 ++--
> drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 3 ++-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> index 5c779eec454b..72a87dd0c0d8 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> @@ -618,7 +618,7 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = {
> [CLK_MBUS] = &mbus_clk.common.hw,
> [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
> },
> - .num = CLK_NUMBER,
> + .num = CLK_NUMBER_V3S,
> };
>
> static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
> @@ -700,7 +700,7 @@ static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
> [CLK_MBUS] = &mbus_clk.common.hw,
> [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
> },
> - .num = CLK_NUMBER,
> + .num = CLK_NUMBER_V3,
There's not much point in having a defined CLK_NUMBER here, just use
the value you've defined it to (so CLK_I2S0 + 1 and CLK_PLL_DDR1 + 1)
Maxime
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH, v2] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.
@ 2019-11-18 10:18 ` Maxime Ripard
0 siblings, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2019-11-18 10:18 UTC (permalink / raw)
To: Tian Yunhao
Cc: Stephen Boyd, Michael Turquette, linux-kernel, Chen-Yu Tsai,
linux-clk, linux-arm-kernel, Icenowy Zheng
[-- Attachment #1.1: Type: text/plain, Size: 1527 bytes --]
Hi,
On Wed, Nov 13, 2019 at 09:23:59AM +0000, Tian Yunhao wrote:
> The hws field of sun8i_v3s_hw_clks has only 74
> members. However, the number specified by CLK_NUMBER
> is 77 (= CLK_I2S0 + 1). This leads to runtime segmentation
> fault that is not always reproducible.
>
> This patch corrects this behavior by separating clock
> numbers for V3 and V3S.
>
> Signed-off-by: Yunhao Tian <t123yh@outlook.com>
Even though they are similar, the Signed-off-by doesn't match the
authorship.
> ---
> drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 4 ++--
> drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 3 ++-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> index 5c779eec454b..72a87dd0c0d8 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
> @@ -618,7 +618,7 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = {
> [CLK_MBUS] = &mbus_clk.common.hw,
> [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
> },
> - .num = CLK_NUMBER,
> + .num = CLK_NUMBER_V3S,
> };
>
> static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
> @@ -700,7 +700,7 @@ static struct clk_hw_onecell_data sun8i_v3_hw_clks = {
> [CLK_MBUS] = &mbus_clk.common.hw,
> [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw,
> },
> - .num = CLK_NUMBER,
> + .num = CLK_NUMBER_V3,
There's not much point in having a defined CLK_NUMBER here, just use
the value you've defined it to (so CLK_I2S0 + 1 and CLK_PLL_DDR1 + 1)
Maxime
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2019-11-13 9:23 [PATCH, v2] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks Tian Yunhao
2019-11-18 10:18 ` Maxime Ripard
2019-11-18 10:18 ` Maxime Ripard
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