From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8230C432C0 for ; Sun, 24 Nov 2019 19:18:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D2CA82080D for ; Sun, 24 Nov 2019 19:18:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726975AbfKXTSX (ORCPT ); Sun, 24 Nov 2019 14:18:23 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:40603 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726833AbfKXTSX (ORCPT ); Sun, 24 Nov 2019 14:18:23 -0500 Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iYxOi-0005I6-Ku; Sun, 24 Nov 2019 20:18:16 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1iYxOi-0006kB-A6; Sun, 24 Nov 2019 20:18:16 +0100 Date: Sun, 24 Nov 2019 20:18:16 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: =?iso-8859-1?Q?Cl=E9ment_P=E9ron?= Cc: Thierry Reding , Maxime Ripard , Chen-Yu Tsai , Philipp Zabel , linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Jernej Skrabec Subject: Re: [PATCH v9 5/6] pwm: sun4i: Add support to output source clock directly Message-ID: <20191124191816.w5saunvwfhoauj56@pengutronix.de> References: <20191124172908.10804-1-peron.clem@gmail.com> <20191124172908.10804-6-peron.clem@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20191124172908.10804-6-peron.clem@gmail.com> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Clément, On Sun, Nov 24, 2019 at 06:29:07PM +0100, Clément Péron wrote: > From: Jernej Skrabec > > PWM core has an option to bypass whole logic and output unchanged source > clock as PWM output. This is achieved by enabling bypass bit. > > Note that when bypass is enabled, no other setting has any meaning, not > even enable bit. > > This mode of operation is needed to achieve high enough frequency to > serve as clock source for AC200 chip which is integrated into same > package as H6 SoC. > > Signed-off-by: Jernej Skrabec > Signed-off-by: Clément Péron This looks fine now, Reviewed-by: Uwe Kleine-König Thanks Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | https://www.pengutronix.de/ | From mboxrd@z Thu Jan 1 00:00:00 1970 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= Subject: Re: [PATCH v9 5/6] pwm: sun4i: Add support to output source clock directly Date: Sun, 24 Nov 2019 20:18:16 +0100 Message-ID: <20191124191816.w5saunvwfhoauj56@pengutronix.de> References: <20191124172908.10804-1-peron.clem@gmail.com> <20191124172908.10804-6-peron.clem@gmail.com> Reply-To: u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20191124172908.10804-6-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: =?iso-8859-1?Q?Cl=E9ment_P=E9ron?= Cc: Thierry Reding , Maxime Ripard , Chen-Yu Tsai , Philipp Zabel , linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Jernej Skrabec List-Id: linux-pwm@vger.kernel.org Hello Cl=C3=A9ment, On Sun, Nov 24, 2019 at 06:29:07PM +0100, Cl=C3=A9ment P=C3=A9ron wrote: > From: Jernej Skrabec >=20 > PWM core has an option to bypass whole logic and output unchanged source > clock as PWM output. This is achieved by enabling bypass bit. >=20 > Note that when bypass is enabled, no other setting has any meaning, not > even enable bit. >=20 > This mode of operation is needed to achieve high enough frequency to > serve as clock source for AC200 chip which is integrated into same > package as H6 SoC. >=20 > Signed-off-by: Jernej Skrabec > Signed-off-by: Cl=C3=A9ment P=C3=A9ron This looks fine now, Reviewed-by: Uwe Kleine-K=C3=B6nig Thanks Uwe --=20 Pengutronix e.K. | Uwe Kleine-K=C3=B6nig = | Industrial Linux Solutions | https://www.pengutronix.de/ | --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org To view this discussion on the web, visit https://groups.google.com/d/msgid= /linux-sunxi/20191124191816.w5saunvwfhoauj56%40pengutronix.de. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B81CC432C3 for ; Sun, 24 Nov 2019 19:18:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 157652080D for ; Sun, 24 Nov 2019 19:18:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="RRZcQAgL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 157652080D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hzlfvPM9Gfncv2wWElvyB93PBYvqpwOhcXvqPj6TY50=; b=RRZcQAgL0grDBc LbJU1Pqk/hWNskv1qQm+IcTEYeFhCRUhvrGrOjYxgYDe8u+/Bzhv/frToOSb+kayhar5mAKZejw9Z 87rKNuODL+VBWNa2l9E5oDhqPF3PfOqmOB0JEGE5bXt/7Nzj6S4hGNdPZH0KbENAPWa3bONRQjiSr aDgcXr0/yn7vdkyLz5DNgi3drs/zmegWAKDwBH/cbI+5xLdyBoBeD/eGy7FJxAUw0rsW/DgNwryuV 5OyVkkp24phOyFBs1k4xoT2dgoGXq4l4aKD3gfTpC1gntqbEG7hfSy/fb+GvzrcB8weUsJg3/5G2P 2yLX3eRysI0HMfzlPDWw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iYxOo-0004Km-Im; Sun, 24 Nov 2019 19:18:22 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iYxOl-0004KQ-Oh for linux-arm-kernel@lists.infradead.org; Sun, 24 Nov 2019 19:18:21 +0000 Received: from ptx.hi.pengutronix.de ([2001:67c:670:100:1d::c0]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iYxOi-0005I6-Ku; Sun, 24 Nov 2019 20:18:16 +0100 Received: from ukl by ptx.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1iYxOi-0006kB-A6; Sun, 24 Nov 2019 20:18:16 +0100 Date: Sun, 24 Nov 2019 20:18:16 +0100 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: =?iso-8859-1?Q?Cl=E9ment_P=E9ron?= Subject: Re: [PATCH v9 5/6] pwm: sun4i: Add support to output source clock directly Message-ID: <20191124191816.w5saunvwfhoauj56@pengutronix.de> References: <20191124172908.10804-1-peron.clem@gmail.com> <20191124172908.10804-6-peron.clem@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191124172908.10804-6-peron.clem@gmail.com> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c0 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191124_111819_804010_FA2FA29E X-CRM114-Status: GOOD ( 10.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, Jernej Skrabec , linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, Maxime Ripard , Chen-Yu Tsai , Thierry Reding , Philipp Zabel , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Cl=E9ment, On Sun, Nov 24, 2019 at 06:29:07PM +0100, Cl=E9ment P=E9ron wrote: > From: Jernej Skrabec > = > PWM core has an option to bypass whole logic and output unchanged source > clock as PWM output. This is achieved by enabling bypass bit. > = > Note that when bypass is enabled, no other setting has any meaning, not > even enable bit. > = > This mode of operation is needed to achieve high enough frequency to > serve as clock source for AC200 chip which is integrated into same > package as H6 SoC. > = > Signed-off-by: Jernej Skrabec > Signed-off-by: Cl=E9ment P=E9ron This looks fine now, Reviewed-by: Uwe Kleine-K=F6nig Thanks Uwe -- = Pengutronix e.K. | Uwe Kleine-K=F6nig | Industrial Linux Solutions | https://www.pengutronix.de/ | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel