From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBE56C33C99 for ; Tue, 26 Nov 2019 09:20:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B6BA6207DD for ; Tue, 26 Nov 2019 09:20:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727608AbfKZJUo (ORCPT ); Tue, 26 Nov 2019 04:20:44 -0500 Received: from mx2.suse.de ([195.135.220.15]:47934 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727150AbfKZJUk (ORCPT ); Tue, 26 Nov 2019 04:20:40 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 50643BAB1; Tue, 26 Nov 2019 09:20:38 +0000 (UTC) From: Nicolas Saenz Julienne To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Eric Anholt , Stefan Wahren Cc: james.quinlan@broadcom.com, mbrugger@suse.com, f.fainelli@gmail.com, phil@raspberrypi.org, jeremy.linton@arm.com, linux-pci@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, Nicolas Saenz Julienne , devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Date: Tue, 26 Nov 2019 10:19:41 +0100 Message-Id: <20191126091946.7970-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191126091946.7970-1-nsaenzjulienne@suse.de> References: <20191126091946.7970-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne --- This will likely need a rebase once the RPi GENET patches land. Changes since v2: - Remove unused interrupt-map - correct dma-ranges to it's full size, non power of 2 bus DMA constraints now supported in linux-next[1] - add device_type - rename alias from pcie_0 to pcie0 Changes since v1: - remove linux,pci-domain [1] https://lkml.org/lkml/2019/11/21/235 arch/arm/boot/dts/bcm2711.dtsi | 41 ++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 667658497898..2e121fc8b3d0 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -288,6 +288,47 @@ IRQ_TYPE_LEVEL_LOW)>, arm,cpu-registers-not-fw-configured; }; + scb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH>; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. As the bus DMA mask is rounded up to the + * closest power of two of the dma-range size, we're + * forced to set the limit at 2GB. This can be + * harmlessly changed in the future once the DMA code + * handles non power of two DMA limits. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0xc0000000>; + brcm,enable-ssc; + }; + }; + cpus: cpus { #address-cells = <1>; #size-cells = <0>; -- 2.24.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18086C432C0 for ; Tue, 26 Nov 2019 09:21:23 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E12ED2073F for ; Tue, 26 Nov 2019 09:21:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="pIOx/qrn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E12ED2073F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=F8rTvs+SF+3txrRiN1kwf9jw7DzijZJP2PFm11u8BAk=; b=pIOx/qrnBIOxAB eMeh3VWEpzdsm3f6AMrmagGVydneQxkFgUnI251nkaphF+0nigbaQyQE/B+95luWlceCIGm7LAH7X 6B0HqK0J8xQVGzAnHBa8ZUgOg+sweJsE2W9Uz01m5okvsMEmFRCw82Ze68kZYMOuHVQAu3TbKYUnZ snIMEazJ0nJtXPYqhUEC7vD9ydvTnlia/l7IU5+LHbsVZiVXng5VIu6rvftd1OKSZjmRqieRWf3ur ucxzsz0zN6C2QtqVMZpZvzilLe4CE8zIef94qGMz1x/aIJD1MguMUwgAZ8WWYflQ5MwZu90QnZoXW TizgQETu9XvLCXXsin7Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iZX2A-00075L-4k; Tue, 26 Nov 2019 09:21:22 +0000 Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iZX1T-0006Vx-J1; Tue, 26 Nov 2019 09:20:41 +0000 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 50643BAB1; Tue, 26 Nov 2019 09:20:38 +0000 (UTC) From: Nicolas Saenz Julienne To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Eric Anholt , Stefan Wahren Subject: [PATCH v3 3/7] ARM: dts: bcm2711: Enable PCIe controller Date: Tue, 26 Nov 2019 10:19:41 +0100 Message-Id: <20191126091946.7970-4-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191126091946.7970-1-nsaenzjulienne@suse.de> References: <20191126091946.7970-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191126_012039_765235_38F31939 X-CRM114-Status: GOOD ( 12.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, f.fainelli@gmail.com, linux-pci@vger.kernel.org, phil@raspberrypi.org, jeremy.linton@arm.com, mbrugger@suse.com, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, james.quinlan@broadcom.com, Nicolas Saenz Julienne Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne --- This will likely need a rebase once the RPi GENET patches land. Changes since v2: - Remove unused interrupt-map - correct dma-ranges to it's full size, non power of 2 bus DMA constraints now supported in linux-next[1] - add device_type - rename alias from pcie_0 to pcie0 Changes since v1: - remove linux,pci-domain [1] https://lkml.org/lkml/2019/11/21/235 arch/arm/boot/dts/bcm2711.dtsi | 41 ++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 667658497898..2e121fc8b3d0 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -288,6 +288,47 @@ IRQ_TYPE_LEVEL_LOW)>, arm,cpu-registers-not-fw-configured; }; + scb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH>; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. As the bus DMA mask is rounded up to the + * closest power of two of the dma-range size, we're + * forced to set the limit at 2GB. This can be + * harmlessly changed in the future once the DMA code + * handles non power of two DMA limits. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0xc0000000>; + brcm,enable-ssc; + }; + }; + cpus: cpus { #address-cells = <1>; #size-cells = <0>; -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel