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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id i127sm3364581wma.35.2019.11.26.06.12.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2019 06:12:41 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 0/4] target-arm queue Date: Tue, 26 Nov 2019 14:12:35 +0000 Message-Id: <20191126141239.8219-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Arm patches for rc3 : just a handful of bug fixes. thanks -- PMM The following changes since commit 4ecc984210ca1bf508a96a550ec8a93a5f833f6c: Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc3' into staging (2019-11-26 12:36:40 +0000) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20191126 for you to fetch changes up to 6a4ef4e5d1084ce41fafa7d470a644b0fd3d9317: target/arm: Honor HCR_EL2.TID3 trapping requirements (2019-11-26 13:55:37 +0000) ---------------------------------------------------------------- target-arm queue: * handle FTYPE flag correctly in v7M exception return for v7M CPUs with an FPU (v8M CPUs were already correct) * versal: Add the CRP as unimplemented * Fix ISR_EL1 tracking when executing at EL2 * Honor HCR_EL2.TID3 trapping requirements ---------------------------------------------------------------- Edgar E. Iglesias (1): hw/arm: versal: Add the CRP as unimplemented Jean-Hugues Deschênes (1): target/arm: Fix handling of cortex-m FTYPE flag in EXCRET Marc Zyngier (2): target/arm: Fix ISR_EL1 tracking when executing at EL2 target/arm: Honor HCR_EL2.TID3 trapping requirements include/hw/arm/xlnx-versal.h | 3 ++ hw/arm/xlnx-versal.c | 2 ++ target/arm/helper.c | 83 ++++++++++++++++++++++++++++++++++++++++++-- target/arm/m_helper.c | 7 ++-- 4 files changed, 89 insertions(+), 6 deletions(-)