From: Tao Xu <tao3.xu@intel.com>
To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com
Cc: tao3.xu@intel.com, qemu-devel@nongnu.org
Subject: [PATCH RESEND 4/4] target/i386: Add notes for versioned CPU models
Date: Mon, 2 Dec 2019 14:32:33 +0800 [thread overview]
Message-ID: <20191202063233.28523-5-tao3.xu@intel.com> (raw)
In-Reply-To: <20191202063233.28523-1-tao3.xu@intel.com>
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu <tao3.xu@intel.com>
---
target/i386/cpu.c | 50 +++++++++++++++++++++++------------------------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 7b3bd6d4db..c82fbfd02e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2281,10 +2281,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Nehalem-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
{ /* end of list */ }
}
},
@@ -2362,10 +2361,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Westmere-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Westmere E56xx/L56xx/X56xx (IBRS update)" },
{ /* end of list */ }
}
},
@@ -2448,10 +2446,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "SandyBridge-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
{ /* end of list */ }
}
},
@@ -2540,10 +2537,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "IvyBridge-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
{ /* end of list */ }
}
},
@@ -2637,17 +2633,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Haswell-noTSX",
+ .note = "no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
{ "stepping", "1" },
- { "model-id", "Intel Core Processor (Haswell, no TSX)", },
{ /* end of list */ }
},
},
{
.version = 3,
.alias = "Haswell-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* Restore TSX features removed by -v2 above */
{ "hle", "on" },
@@ -2658,21 +2655,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
*/
{ "stepping", "4" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Haswell, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 4,
.alias = "Haswell-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
/* spec-ctrl was already enabled by -v3 above */
{ "stepping", "1" },
- { "model-id",
- "Intel Core Processor (Haswell, no TSX, IBRS)" },
{ /* end of list */ }
}
},
@@ -2768,35 +2762,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Broadwell-noTSX",
+ .note = "no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
- { "model-id", "Intel Core Processor (Broadwell, no TSX)", },
{ /* end of list */ }
},
},
{
.version = 3,
.alias = "Broadwell-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* Restore TSX features removed by -v2 above */
{ "hle", "on" },
{ "rtm", "on" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Broadwell, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 4,
.alias = "Broadwell-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
/* spec-ctrl was already enabled by -v3 above */
- { "model-id",
- "Intel Core Processor (Broadwell, no TSX, IBRS)" },
{ /* end of list */ }
}
},
@@ -2896,17 +2888,17 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "IBRS",
.alias = "Skylake-Client-IBRS",
.props = (PropValue[]) {
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Core Processor (Skylake, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 3,
.alias = "Skylake-Client-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
@@ -3017,19 +3009,19 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "Skylake-Server-IBRS",
+ .note = "IBRS",
.props = (PropValue[]) {
/* clflushopt was not added to Skylake-Server-IBRS */
/* TODO: add -v3 including clflushopt */
{ "clflushopt", "off" },
{ "spec-ctrl", "on" },
- { "model-id",
- "Intel Xeon Processor (Skylake, IBRS)" },
{ /* end of list */ }
}
},
{
.version = 3,
.alias = "Skylake-Server-noTSX-IBRS",
+ .note = "no TSX, IBRS",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
@@ -3141,6 +3133,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
{ .version = 2,
+ .note = "ARCH_CAPABILITIES",
.props = (PropValue[]) {
{ "arch-capabilities", "on" },
{ "rdctl-no", "on" },
@@ -3152,6 +3145,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
},
{ .version = 3,
.alias = "Cascadelake-Server-noTSX",
+ .note = "no TSX",
.props = (PropValue[]) {
{ "hle", "off" },
{ "rtm", "off" },
@@ -3264,6 +3258,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Client-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3381,6 +3376,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no TSX",
.alias = "Icelake-Server-noTSX",
.props = (PropValue[]) {
{ "hle", "off" },
@@ -3488,6 +3484,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MPX, no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ "mpx", "off" },
@@ -3617,14 +3614,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MPX",
.props = (PropValue[]) {
{ "mpx", "off" },
- { "model-id", "Intel Atom Processor (Snowridge, no MPX)" },
{ /* end of list */ },
},
},
{
.version = 3,
+ .note = "no MPX, no MONITOR",
.props = (PropValue[]) {
/* mpx was already removed by -v2 above */
{ "monitor", "off" },
@@ -3746,6 +3744,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ /* end of list */ },
@@ -3870,15 +3869,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
{
.version = 2,
.alias = "EPYC-IBPB",
+ .note = "IBPB",
.props = (PropValue[]) {
{ "ibpb", "on" },
- { "model-id",
- "AMD EPYC Processor (with IBPB)" },
{ /* end of list */ }
}
},
{
.version = 3,
+ .note = "IBPB, no MONITOR",
.props = (PropValue[]) {
/* ibpb was already enabled by -v2 above */
{ "monitor", "off" },
@@ -3941,6 +3940,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
{ .version = 1 },
{
.version = 2,
+ .note = "no MONITOR",
.props = (PropValue[]) {
{ "monitor", "off" },
{ /* end of list */ },
--
2.20.1
next prev parent reply other threads:[~2019-12-02 6:33 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 6:32 [PATCH RESEND 0/4] Add extra information to versioned CPU models Tao Xu
2019-12-02 6:32 ` [PATCH RESEND 1/4] target/i386: Add Denverton-v2 (no MPX) CPU model Tao Xu
2019-12-02 6:32 ` [PATCH RESEND 2/4] target/i386: Remove monitor from some CPU models Tao Xu
2019-12-02 6:32 ` [PATCH RESEND 3/4] target/i386: Add new property note to versioned " Tao Xu
2019-12-02 6:32 ` Tao Xu [this message]
2019-12-05 8:44 ` [PATCH RESEND 4/4] target/i386: Add notes for " Xiaoyao Li
2019-12-09 2:47 ` Tao Xu
2019-12-05 8:55 ` [PATCH RESEND 0/4] Add extra information to " Xiaoyao Li
2019-12-09 2:43 ` Tao Xu
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