[U-Boot] [PATCH v2 0/6] J721e: Add networking support

[U-Boot] [PATCH v2 0/6] J721e: Add networking support

[Vignesh Raghavendra]

This patch enables networking support for TI's J721e SoC.
Patch 1 adds a new interface to DMA uclass to get channel specific
private/configuration data. Patch 2 to 4 use this interface to pass data
from J721e's UDMA driver to CPSW ethernet driver. Last two patches add
DMA and CPSW DT nodes and configs.

Depends on [1] for ethernet to work

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=145954

v2:
Address comments from Grygorii.
Collect Acks

Vignesh Raghavendra (6):
  dma: Introduce dma_get_cfg() interface
  dma: ti: k3-udma: Implement dma_get_cfg() interface
  net: ti: am65-cpsw-nuss: Rework RX flow ID handling
  net: ti: am65-cpsw-nuss: Add new compatible for J721e
  arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT
    nodes
  configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet

 .../k3-j721e-common-proc-board-u-boot.dtsi    | 239 ++++++++++++++++++
 configs/j721e_evm_a72_defconfig               |   8 +
 drivers/dma/dma-uclass.c                      |  12 +
 drivers/dma/ti/k3-udma.c                      |  30 ++-
 drivers/net/ti/am65-cpsw-nuss.c               |  14 +-
 include/dma-uclass.h                          |  11 +
 include/dma.h                                 |  11 +
 include/linux/soc/ti/ti-udma.h                |  19 ++
 8 files changed, 334 insertions(+), 10 deletions(-)

-- 
2.24.0

[U-Boot] [PATCH v2 1/6] dma: Introduce dma_get_cfg() interface

[Vignesh Raghavendra]

Sometimes, there would be a need to exchange data between DMA provider
and DMA client which are very specific to DMA driver of the SoC/platform
and are not generic enough to be put into struct dma. Therefore, introduce
dma_get_cfg() interface to get DMA provider specific data from client
device. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/dma/dma-uclass.c | 12 ++++++++++++
 include/dma-uclass.h     | 11 +++++++++++
 include/dma.h            | 11 +++++++++++
 3 files changed, 34 insertions(+)

diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 9c961cf1e2c7..2321fb513ba3 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -186,6 +186,18 @@ int dma_send(struct dma *dma, void *src, size_t len, void *metadata)
 
 	return ops->send(dma, src, len, metadata);
 }
+
+int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data)
+{
+	struct dma_ops *ops = dma_dev_ops(dma->dev);
+
+	debug("%s(dma=%p)\n", __func__, dma);
+
+	if (!ops->get_cfg)
+		return -ENOSYS;
+
+	return ops->get_cfg(dma, cfg_id, cfg_data);
+}
 #endif /* CONFIG_DMA_CHANNELS */
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)
diff --git a/include/dma-uclass.h b/include/dma-uclass.h
index 31b43fb4b98e..a1d9d26ac56f 100644
--- a/include/dma-uclass.h
+++ b/include/dma-uclass.h
@@ -108,6 +108,17 @@ struct dma_ops {
 	 * @return zero on success, or -ve error code.
 	 */
 	int (*send)(struct dma *dma, void *src, size_t len, void *metadata);
+	/**
+	 * get_cfg() - Get DMA channel configuration for client's use
+	 *
+	 * @dma:    The DMA Channel to manipulate
+	 * @cfg_id: DMA provider specific ID to identify what
+	 *          configuration data client needs
+	 * @data:   Pointer to store pointer to DMA driver specific
+	 *          configuration data for the given cfg_id (output param)
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*get_cfg)(struct dma *dma, u32 cfg_id, void **data);
 #endif /* CONFIG_DMA_CHANNELS */
 	/**
 	 * transfer() - Issue a DMA transfer. The implementation must
diff --git a/include/dma.h b/include/dma.h
index 32885571f7d4..426617b34edf 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -290,6 +290,17 @@ int dma_receive(struct dma *dma, void **dst, void *metadata);
  * @return zero on success, or -ve error code.
  */
 int dma_send(struct dma *dma, void *src, size_t len, void *metadata);
+/**
+ * dma_get_cfg() - Get DMA channel configuration for client's use
+ *
+ * @dma:      The DMA Channel to manipulate
+ * @cfg_id:   DMA provider specific ID to identify what
+ *            configuration data client needs
+ * @cfg_data: Pointer to store pointer to DMA driver specific
+ *            configuration data for the given cfg_id (output param)
+ * @return zero on success, or -ve error code.
+ */
+int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data);
 #endif /* CONFIG_DMA_CHANNELS */
 
 #if CONFIG_IS_ENABLED(DMA)
-- 
2.24.0

[U-Boot] [PATCH v2 2/6] dma: ti: k3-udma: Implement dma_get_cfg() interface

[Vignesh Raghavendra]

Implement dma_get_cfg() interface to pass flow id information for DMA
clients to use. This is needed because on K3 SoCs, CPSW (ethernet) and
UDMA (DMA provider) support "flows" within a given RX DMA channel. This
allows different network packets to be segregated while using same RX
DMA channel. In order for basic ethernet to work, CPSW slave must be
aware of the flow ID allocated for the RX channel by the DMA driver.
This interface allows CPSW to query flow ID from DMA provider and
configure it in CPSW HW.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/dma/ti/k3-udma.c       | 28 ++++++++++++++++++++++++++++
 include/linux/soc/ti/ti-udma.h | 19 +++++++++++++++++++
 2 files changed, 47 insertions(+)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index def3c5c38c66..36bf349a8579 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -103,6 +103,8 @@ struct udma_chan {
 	struct udma_rchan *rchan;
 	struct udma_rflow *rflow;
 
+	struct ti_udma_drv_chan_cfg_data cfg_data;
+
 	u32 bcnt; /* number of bytes completed since the start of the channel */
 
 	bool pkt_mode; /* TR or packet */
@@ -1521,6 +1523,11 @@ static int udma_request(struct dma *dma)
 	uc->desc_rx_cur = 0;
 	uc->num_rx_bufs = 0;
 
+	if (uc->dir == DMA_DEV_TO_MEM) {
+		uc->cfg_data.flow_id_base = uc->rflow->id;
+		uc->cfg_data.flow_id_cnt = 1;
+	}
+
 	return 0;
 }
 
@@ -1795,6 +1802,26 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
 	return 0;
 }
 
+static int udma_get_cfg(struct dma *dma, u32 id, void **data)
+{
+	struct udma_dev *ud = dev_get_priv(dma->dev);
+	struct udma_chan *uc;
+
+	if (dma->id >= (ud->rchan_cnt + ud->tchan_cnt)) {
+		dev_err(dma->dev, "invalid dma ch_id %lu\n", dma->id);
+		return -EINVAL;
+	}
+
+	switch (id) {
+	case TI_UDMA_CHAN_PRIV_INFO:
+		uc = &ud->channels[dma->id];
+		*data = &uc->cfg_data;
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
 static const struct dma_ops udma_ops = {
 	.transfer	= udma_transfer,
 	.of_xlate	= udma_of_xlate,
@@ -1805,6 +1832,7 @@ static const struct dma_ops udma_ops = {
 	.send		= udma_send,
 	.receive	= udma_receive,
 	.prepare_rcv_buf = udma_prepare_rcv_buf,
+	.get_cfg	= udma_get_cfg,
 };
 
 static const struct udevice_id udma_ids[] = {
diff --git a/include/linux/soc/ti/ti-udma.h b/include/linux/soc/ti/ti-udma.h
index e9d4226c48d9..04e354fb2d69 100644
--- a/include/linux/soc/ti/ti-udma.h
+++ b/include/linux/soc/ti/ti-udma.h
@@ -21,4 +21,23 @@ struct ti_udma_drv_packet_data {
 	u32	dest_tag;
 };
 
+/**
+ * struct ti_udma_drv_chan_cfg_data - TI UDMA per channel specific
+ *                                     configuration data
+ *
+ * @flow_id_base: Start index of flow ID allocated to this channel
+ * @flow_id_cnt: Number of flows allocated for this channel starting at
+ *               flow_id_base
+ *
+ * TI UDMA channel specific data returned as part of dma_get_cfg() call
+ * from the DMA client driver.
+ */
+struct ti_udma_drv_chan_cfg_data {
+	u32	flow_id_base;
+	u32	flow_id_cnt;
+};
+
+/* TI UDMA specific flag IDs for dma_get_cfg() call */
+#define TI_UDMA_CHAN_PRIV_INFO		0
+
 #endif /* __TI_UDMA_H */
-- 
2.24.0

[U-Boot] [PATCH v2 3/6] net: ti: am65-cpsw-nuss: Rework RX flow ID handling

[Vignesh Raghavendra]

Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/net/ti/am65-cpsw-nuss.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 06b06639506a..2e14f4be862f 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -99,7 +99,6 @@ struct am65_cpsw_common {
 
 	u32			port_num;
 	struct am65_cpsw_port	ports[AM65_CPSW_CPSWNU_MAX_PORTS];
-	u32			rflow_id_base;
 
 	struct mii_dev		*bus;
 	u32			bus_freq;
@@ -276,6 +275,7 @@ static int am65_cpsw_start(struct udevice *dev)
 	struct am65_cpsw_common	*common = priv->cpsw_common;
 	struct am65_cpsw_port *port = &common->ports[priv->port_id];
 	struct am65_cpsw_port *port0 = &common->ports[0];
+	struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
 	int ret, i;
 
 	ret = power_domain_on(&common->pwrdmn);
@@ -341,7 +341,8 @@ static int am65_cpsw_start(struct udevice *dev)
 	writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG);
 
 	/* set base flow_id */
-	writel(common->rflow_id_base,
+	dma_get_cfg(&common->dma_rx, 0, (void **)&dma_rx_cfg_data);
+	writel(dma_rx_cfg_data->flow_id_base,
 	       port0->port_base + AM65_CPSW_P0_FLOW_ID_REG);
 
 	/* Reset and enable the ALE */
@@ -669,11 +670,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
 				AM65_CPSW_CPSW_NU_ALE_BASE;
 	cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
 
-	cpsw_common->rflow_id_base = 0;
-	cpsw_common->rflow_id_base =
-			dev_read_u32_default(dev, "ti,rx-flow-id-base",
-					     cpsw_common->rflow_id_base);
-
 	ports_np = dev_read_subnode(dev, "ports");
 	if (!ofnode_valid(ports_np)) {
 		ret = -ENOENT;
@@ -761,12 +757,11 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
 	if (ret)
 		goto out;
 
-	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u rflow_id_base:%u mdio_freq:%u\n",
+	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n",
 		 readl(cpsw_common->ss_base),
 		 readl(cpsw_common->cpsw_base),
 		 readl(cpsw_common->ale_base),
 		 cpsw_common->port_num,
-		 cpsw_common->rflow_id_base,
 		 cpsw_common->bus_freq);
 
 out:
-- 
2.24.0

[U-Boot] [PATCH v2 4/6] net: ti: am65-cpsw-nuss: Add new compatible for J721e

[Vignesh Raghavendra]

Add new compatible to handle J721e SoC

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/dma/ti/k3-udma.c        | 2 +-
 drivers/net/ti/am65-cpsw-nuss.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 36bf349a8579..f398c5b4bbbd 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -1837,7 +1837,7 @@ static const struct dma_ops udma_ops = {
 
 static const struct udevice_id udma_ids[] = {
 	{ .compatible = "ti,k3-navss-udmap" },
-	{ .compatible = "ti,j721e-navss-main-udmap" },
+	{ .compatible = "ti,j721e-navss-mcu-udmap" },
 	{ }
 };
 
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 2e14f4be862f..b606ff0ade2a 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -772,6 +772,7 @@ out:
 
 static const struct udevice_id am65_cpsw_nuss_ids[] = {
 	{ .compatible = "ti,am654-cpsw-nuss" },
+	{ .compatible = "ti,j721e-cpsw-nuss" },
 	{ }
 };
 
-- 
2.24.0

[U-Boot] [PATCH v2 5/6] arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodes

[Vignesh Raghavendra]

Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 .../k3-j721e-common-proc-board-u-boot.dtsi    | 239 ++++++++++++++++++
 1 file changed, 239 insertions(+)

diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 541da22c4889..f3857b9100bb 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -3,11 +3,18 @@
  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  */
 
+#include <dt-bindings/dma/k3-udma.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
 / {
 	chosen {
 		stdout-path = "serial2:115200n8";
 		tick-timer = &timer1;
 	};
+
+	aliases {
+		ethernet0 = &cpsw_port1;
+	};
 };
 
 &cbass_main{
@@ -24,6 +31,184 @@
 		clock-frequency = <25000000>;
 		u-boot,dm-spl;
 	};
+
+	mcu_conf: scm_conf at 40f00000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x0 0x40f00000 0x0 0x20000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+		phy_sel: cpsw-phy-sel at 4040 {
+			compatible = "ti,am654-cpsw-phy-sel";
+			reg = <0x4040 0x4>;
+			reg-names = "gmii-sel";
+		};
+	};
+
+	cbass_mcu_navss: mcu_navss {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		dma-coherent;
+		dma-ranges;
+		ranges;
+
+		ti,sci-dev-id = <232>;
+		u-boot,dm-spl;
+
+		mcu_ringacc: ringacc at 2b800000 {
+			compatible = "ti,am654-navss-ringacc";
+			reg =	<0x0 0x2b800000 0x0 0x400000>,
+				<0x0 0x2b000000 0x0 0x400000>,
+				<0x0 0x28590000 0x0 0x100>,
+				<0x0 0x2a500000 0x0 0x40000>;
+			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+			ti,num-rings = <286>;
+			ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <235>;
+			u-boot,dm-spl;
+		};
+
+		mcu_udmap: udmap at 31150000 {
+			compatible = "ti,j721e-navss-mcu-udmap";
+			reg =	<0x0 0x285c0000 0x0 0x100>,
+				<0x0 0x2a800000 0x0 0x40000>,
+				<0x0 0x2aa00000 0x0 0x40000>;
+			reg-names = "gcfg", "rchanrt", "tchanrt";
+			#dma-cells = <3>;
+
+			ti,ringacc = <&mcu_ringacc>;
+			ti,psil-base = <0x6000>;
+
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <236>;
+
+			ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+						<0x0f>; /* TX_HCHAN */
+			ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+						<0x0b>; /* RX_HCHAN */
+			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+			u-boot,dm-spl;
+		};
+	};
+
+	mcu_cpsw: ethernet at 046000000 {
+		compatible = "ti,j721e-cpsw-nuss";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		reg = <0x0 0x46000000 0x0 0x200000>;
+		reg-names = "cpsw_nuss";
+		ranges;
+		dma-coherent;
+		clocks = <&k3_clks 18 22>;
+		clock-names = "fck";
+		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
+		ti,psil-base = <0x7000>;
+		cpsw-phy-sel = <&phy_sel>;
+
+		dmas = <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 1 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 2 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 3 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 4 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 5 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 6 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 7 UDMA_DIR_TX>,
+		       <&mcu_udmap &mcu_cpsw 0 UDMA_DIR_RX>;
+		dma-names = "tx0", "tx1", "tx2", "tx3",
+			    "tx4", "tx5", "tx6", "tx7",
+			    "rx";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			host: host at 0 {
+				reg = <0>;
+				ti,label = "host";
+			};
+
+			cpsw_port1: port at 1 {
+				reg = <1>;
+				ti,mac-only;
+				ti,label = "port1";
+				ti,syscon-efuse = <&mcu_conf 0x200>;
+			};
+		};
+
+		davinci_mdio: mdio {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			bus_freq = <1000000>;
+		};
+
+		cpts {
+			clocks = <&k3_clks 18 2>;
+			clock-names = "cpts";
+			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "cpts";
+			ti,cpts-ext-ts-inputs = <4>;
+			ti,cpts-periodic-outputs = <2>;
+		};
+
+		ti,psil-config0 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config1 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config2 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config3 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config4 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config5 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config6 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+
+		ti,psil-config7 {
+			linux,udma-mode = <UDMA_PKT_MODE>;
+			statictr-type = <PSIL_STATIC_TR_NONE>;
+			ti,needs-epib;
+			ti,psd-size = <16>;
+		};
+	};
 };
 
 &secure_proxy_main {
@@ -52,6 +237,29 @@
 
 &wkup_pmx0 {
 	u-boot,dm-spl;
+	mcu_cpsw_pins_default: mcu_cpsw_pins_default {
+		pinctrl-single,pins = <
+			J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
+			J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
+			J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */
+			J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */
+			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */
+			J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */
+			J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */
+			J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */
+			J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */
+			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */
+			J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* (N1) MCU_RGMII1_TXC */
+			J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */
+		>;
+	};
+
+	mcu_mdio_pins_default: mcu_mdio1_pins_default {
+		pinctrl-single,pins = <
+			J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
+			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
+		>;
+	};
 };
 
 &main_pmx0 {
@@ -73,3 +281,34 @@
 &main_sdhci1 {
 	u-boot,dm-spl;
 };
+
+&mcu_cpsw {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+};
+
+&davinci_mdio {
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+		/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
+		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+	};
+};
+
+&cpsw_port1 {
+	phy-mode = "rgmii-rxid";
+	phy-handle = <&phy0>;
+};
+
+&mcu_cpsw {
+	reg = <0x0 0x46000000 0x0 0x200000>,
+	      <0x0 0x40f00200 0x0 0x2>;
+	reg-names = "cpsw_nuss", "mac_efuse";
+
+	cpsw-phy-sel at 40f04040 {
+		compatible = "ti,am654-cpsw-phy-sel";
+		reg= <0x0 0x40f04040 0x0 0x4>;
+		reg-names = "gmii-sel";
+	};
+};
-- 
2.24.0

[U-Boot] [PATCH v2 6/6] configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet

[Vignesh Raghavendra]

Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 configs/j721e_evm_a72_defconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 2112ce813be9..a73de0857734 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -51,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -61,6 +62,8 @@ CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
@@ -79,6 +82,10 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_HBMC_AM654=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_TI_AM65_CPSW_NUSS=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_GENERIC is not set
 CONFIG_SPL_PINCTRL=y
@@ -93,6 +100,7 @@ CONFIG_RESET_TI_SCI=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
 CONFIG_DM_SERIAL=y
+CONFIG_SOC_TI=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_CADENCE_QSPI=y
-- 
2.24.0

[U-Boot] [PATCH v2 3/6] net: ti: am65-cpsw-nuss: Rework RX flow ID handling

[Grygorii Strashko]

On 02/12/2019 10:59, Vignesh Raghavendra wrote:
> Get flow ID information for RX DMA channel using dma_get_cfg() interface
> instead of reading from DT. This is required in order to avoid DT update
> whenever there is change in the range of flow ID allocated to the host.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
> ---
>   drivers/net/ti/am65-cpsw-nuss.c | 13 ++++---------
>   1 file changed, 4 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
> index 06b06639506a..2e14f4be862f 100644
> --- a/drivers/net/ti/am65-cpsw-nuss.c
> +++ b/drivers/net/ti/am65-cpsw-nuss.c
> @@ -99,7 +99,6 @@ struct am65_cpsw_common {
>   
>   	u32			port_num;
>   	struct am65_cpsw_port	ports[AM65_CPSW_CPSWNU_MAX_PORTS];
> -	u32			rflow_id_base;
>   
>   	struct mii_dev		*bus;
>   	u32			bus_freq;
> @@ -276,6 +275,7 @@ static int am65_cpsw_start(struct udevice *dev)
>   	struct am65_cpsw_common	*common = priv->cpsw_common;
>   	struct am65_cpsw_port *port = &common->ports[priv->port_id];
>   	struct am65_cpsw_port *port0 = &common->ports[0];
> +	struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
>   	int ret, i;
>   
>   	ret = power_domain_on(&common->pwrdmn);
> @@ -341,7 +341,8 @@ static int am65_cpsw_start(struct udevice *dev)
>   	writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG);
>   
>   	/* set base flow_id */
> -	writel(common->rflow_id_base,
> +	dma_get_cfg(&common->dma_rx, 0, (void **)&dma_rx_cfg_data);
> +	writel(dma_rx_cfg_data->flow_id_base,
>   	       port0->port_base + AM65_CPSW_P0_FLOW_ID_REG);

Could you add dbg print here, hence you've dropped it below, pls?

>   
>   	/* Reset and enable the ALE */
> @@ -669,11 +670,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
>   				AM65_CPSW_CPSW_NU_ALE_BASE;
>   	cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
>   
> -	cpsw_common->rflow_id_base = 0;
> -	cpsw_common->rflow_id_base =
> -			dev_read_u32_default(dev, "ti,rx-flow-id-base",
> -					     cpsw_common->rflow_id_base);
> -
>   	ports_np = dev_read_subnode(dev, "ports");
>   	if (!ofnode_valid(ports_np)) {
>   		ret = -ENOENT;
> @@ -761,12 +757,11 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
>   	if (ret)
>   		goto out;
>   
> -	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u rflow_id_base:%u mdio_freq:%u\n",
> +	dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n",
>   		 readl(cpsw_common->ss_base),
>   		 readl(cpsw_common->cpsw_base),
>   		 readl(cpsw_common->ale_base),
>   		 cpsw_common->port_num,
> -		 cpsw_common->rflow_id_base,
>   		 cpsw_common->bus_freq);
>   
>   out:
> 

-- 
Best regards,
grygorii

[U-Boot] [PATCH v2 5/6] arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodes

[Grygorii Strashko]

On 02/12/2019 10:59, Vignesh Raghavendra wrote:
> Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
> up on J721e EVM.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
> ---
>   .../k3-j721e-common-proc-board-u-boot.dtsi    | 239 ++++++++++++++++++
>   1 file changed, 239 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index 541da22c4889..f3857b9100bb 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> @@ -3,11 +3,18 @@
>    * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
>    */
>   
> +#include <dt-bindings/dma/k3-udma.h>
> +#include <dt-bindings/net/ti-dp83867.h>
> +
>   / {
>   	chosen {
>   		stdout-path = "serial2:115200n8";
>   		tick-timer = &timer1;
>   	};
> +
> +	aliases {
> +		ethernet0 = &cpsw_port1;
> +	};
>   };
>   
>   &cbass_main{
> @@ -24,6 +31,184 @@
>   		clock-frequency = <25000000>;
>   		u-boot,dm-spl;
>   	};
> +

[...]

> +&davinci_mdio {
> +	phy0: ethernet-phy at 0 {
> +		reg = <0>;
> +		/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */

Could you drop this TODO pls?

> +		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> +		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> +	};
> +};
> +
> +&cpsw_port1 {
> +	phy-mode = "rgmii-rxid";
> +	phy-handle = <&phy0>;
> +};
> +
> +&mcu_cpsw {
> +	reg = <0x0 0x46000000 0x0 0x200000>,
> +	      <0x0 0x40f00200 0x0 0x2>;
> +	reg-names = "cpsw_nuss", "mac_efuse";
> +
> +	cpsw-phy-sel at 40f04040 {
> +		compatible = "ti,am654-cpsw-phy-sel";
> +		reg= <0x0 0x40f04040 0x0 0x4>;
> +		reg-names = "gmii-sel";
> +	};
> +};
> 

-- 
Best regards,
grygorii

[U-Boot] [PATCH v2 0/6] J721e: Add networking support

[Grygorii Strashko]

On 02/12/2019 10:59, Vignesh Raghavendra wrote:
> This patch enables networking support for TI's J721e SoC.
> Patch 1 adds a new interface to DMA uclass to get channel specific
> private/configuration data. Patch 2 to 4 use this interface to pass data
> from J721e's UDMA driver to CPSW ethernet driver. Last two patches add
> DMA and CPSW DT nodes and configs.
> 
> Depends on [1] for ethernet to work
> 
> [1] http://patchwork.ozlabs.org/project/uboot/list/?series=145954
> 
> v2:
> Address comments from Grygorii.
> Collect Acks

Few minor comments.

Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>

> 
> Vignesh Raghavendra (6):
>    dma: Introduce dma_get_cfg() interface
>    dma: ti: k3-udma: Implement dma_get_cfg() interface
>    net: ti: am65-cpsw-nuss: Rework RX flow ID handling
>    net: ti: am65-cpsw-nuss: Add new compatible for J721e
>    arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT
>      nodes
>    configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet
> 
>   .../k3-j721e-common-proc-board-u-boot.dtsi    | 239 ++++++++++++++++++
>   configs/j721e_evm_a72_defconfig               |   8 +
>   drivers/dma/dma-uclass.c                      |  12 +
>   drivers/dma/ti/k3-udma.c                      |  30 ++-
>   drivers/net/ti/am65-cpsw-nuss.c               |  14 +-
>   include/dma-uclass.h                          |  11 +
>   include/dma.h                                 |  11 +
>   include/linux/soc/ti/ti-udma.h                |  19 ++
>   8 files changed, 334 insertions(+), 10 deletions(-)
> 

-- 
Best regards,
grygorii