From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH 4/4] target/arm: Enable ARMv8.2-UAO in -cpu max
Date: Tue, 3 Dec 2019 15:42:44 -0800 [thread overview]
Message-ID: <20191203234244.9124-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20191203234244.9124-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 9399253b4c..03377084e3 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -674,6 +674,10 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
cpu->isar.id_aa64mmfr1 = t;
+ t = cpu->isar.id_aa64mmfr2;
+ t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1);
+ cpu->isar.id_aa64mmfr2 = t;
+
/* Replicate the same data to the 32-bit id registers. */
u = cpu->isar.id_isar5;
u = FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */
--
2.17.1
next prev parent reply other threads:[~2019-12-03 23:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-03 23:42 [PATCH 0/4] target/arm: Implement ARMv8.2-UAO Richard Henderson
2019-12-03 23:42 ` [PATCH 1/4] target/arm: Add ID_AA64MMFR2_EL1 Richard Henderson
2019-12-06 18:19 ` Peter Maydell
2020-02-02 0:54 ` Richard Henderson
2019-12-03 23:42 ` [PATCH 2/4] target/arm: Update MSR access to UAO Richard Henderson
2019-12-06 18:30 ` Peter Maydell
2019-12-06 19:00 ` Richard Henderson
2020-02-02 1:00 ` Richard Henderson
2020-02-02 13:29 ` Peter Maydell
2020-02-03 7:46 ` Richard Henderson
2019-12-03 23:42 ` [PATCH 3/4] target/arm: Implement UAO semantics Richard Henderson
2019-12-06 18:31 ` Peter Maydell
2019-12-03 23:42 ` Richard Henderson [this message]
2019-12-06 18:31 ` [PATCH 4/4] target/arm: Enable ARMv8.2-UAO in -cpu max Peter Maydell
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