From: George Spelvin <lkml@sdf.org>
To: lkml@sdf.org, michael.chan@broadcom.com
Cc: hauke@hauke-m.de, netdev@vger.kernel.org
Subject: Re: [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range
Date: Mon, 9 Dec 2019 18:01:09 GMT [thread overview]
Message-ID: <201912091801.xB9I192b025088@sdf.org> (raw)
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From michael.chan@broadcom.com Mon Dec 9 17:30:02 2019
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From: Michael Chan <michael.chan@broadcom.com>
Date: Mon, 9 Dec 2019 09:29:46 -0800
Subject: Re: [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range
To: George Spelvin <lkml@sdf.org>
Cc: Netdev <netdev@vger.kernel.org>, Hauke Mehrtens <hauke@hauke-m.de>
Content-Type: text/plain; charset="UTF-8"
On Mon, 9 Dec 2019 at 09:29:46 Michael Chan wrote:
> The patchset looks ok to me. The only minor suggestion is to define
> this (DMA_BIT_MASK(30) + 1) as B44_DMA_ADDR_LIMIT or something like
> that so you don't have to repeat it so many times.
Thank you for the prompt reply. Yes, that's a sensible thing to do.
There's an existing constant I can use: SSB_PCI_DMA_SZ.
Do you have any idea about the WARN_ON_ONCE in report_addr()? That's
a someone more invasive issue. E.g. should it be changed to also
honour the NO_WARN flag?
Looking at the 440x datasheet, one significantly more ambitious
thing I wonder about is if it would be possible to map the swiotlb
using SBToPCITranslation[01] and let that layer do the heavy lifting.
The translation registers are set up, but I don't see them ever actually
used for anything on these chips. (But I havnn't grokked all the
drivers/ssb code yet, so I might have missed something.)
prev parent reply other threads:[~2019-12-09 18:01 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-08 8:36 [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range George Spelvin
2019-12-09 17:29 ` Michael Chan
2019-12-09 18:01 ` George Spelvin [this message]
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