From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E9D5C43603 for ; Thu, 12 Dec 2019 15:53:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 505B4205C9 for ; Thu, 12 Dec 2019 15:53:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 505B4205C9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C3CD96E199; Thu, 12 Dec 2019 15:53:28 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 35DDB6E1A5 for ; Thu, 12 Dec 2019 15:53:28 +0000 (UTC) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Dec 2019 07:53:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,306,1571727600"; d="scan'208";a="216154204" Received: from invictus.jf.intel.com (HELO InViCtUs) ([10.54.75.159]) by orsmga006.jf.intel.com with ESMTP; 12 Dec 2019 07:53:26 -0800 Date: Thu, 12 Dec 2019 07:53:37 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Message-ID: <20191212155337.GC21507@InViCtUs> References: <20191126002635.5779-1-radhakrishna.sripada@intel.com> <20191126002635.5779-4-radhakrishna.sripada@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191126002635.5779-4-radhakrishna.sripada@intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [Intel-gfx] [PATCH v7 3/7] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, nanley.g.chery@intel.com, dhinakaran.pandiyan@intel.com Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Nov 25, 2019 at 04:26:31PM -0800, Radhakrishna Sripada wrote: > From: Dhinakaran Pandiyan > = > Easier to read if all the alignment changes are in one place and contained > within a function. > = > Cc: Ville Syrj=E4l=E4 > Cc: Matt Roper Reviewed-by: Radhakrishna Sripada > Signed-off-by: Dhinakaran Pandiyan > --- > drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++---------- > 1 file changed, 16 insertions(+), 15 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/d= rm/i915/display/intel_display.c > index 2a4593afbe86..85f009500344 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2611,7 +2611,22 @@ intel_fb_stride_alignment(const struct drm_framebu= ffer *fb, int color_plane) > else > return 64; > } else { > - return intel_tile_width_bytes(fb, color_plane); > + u32 tile_width =3D intel_tile_width_bytes(fb, color_plane); > + > + /* > + * Display WA #0531: skl,bxt,kbl,glk > + * > + * Render decompression and plane width > 3840 > + * combined with horizontal panning requires the > + * plane stride to be a multiple of 4. We'll just > + * require the entire fb to accommodate that to avoid > + * potential runtime errors at plane configuration time. > + */ > + if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) && > + color_plane =3D=3D 0 && fb->width > 3840) > + tile_width *=3D 4; > + > + return tile_width; > } > } > = > @@ -16463,20 +16478,6 @@ static int intel_framebuffer_init(struct intel_f= ramebuffer *intel_fb, > } > = > stride_alignment =3D intel_fb_stride_alignment(fb, i); > - > - /* > - * Display WA #0531: skl,bxt,kbl,glk > - * > - * Render decompression and plane width > 3840 > - * combined with horizontal panning requires the > - * plane stride to be a multiple of 4. We'll just > - * require the entire fb to accommodate that to avoid > - * potential runtime errors at plane configuration time. > - */ > - if (IS_GEN(dev_priv, 9) && i =3D=3D 0 && fb->width > 3840 && > - is_ccs_modifier(fb->modifier)) > - stride_alignment *=3D 4; > - > if (fb->pitches[i] & (stride_alignment - 1)) { > DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n= ", > i, fb->pitches[i], stride_alignment); > -- = > 2.20.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx