From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38DF3C34353 for ; Fri, 13 Dec 2019 20:40:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 75694247FA for ; Fri, 13 Dec 2019 20:40:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728685AbfLMSLI (ORCPT ); Fri, 13 Dec 2019 13:11:08 -0500 Received: from relay12.mail.gandi.net ([217.70.178.232]:56379 "EHLO relay12.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728599AbfLMSLI (ORCPT ); Fri, 13 Dec 2019 13:11:08 -0500 Received: from localhost.localdomain (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id A4950200012; Fri, 13 Dec 2019 18:11:03 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Mark Rutland , , Heiko Stuebner , , Daniel Vetter , David Airlie , Sandy Huang Cc: , Paul Kocialkowski , Maxime Chevallier , Thomas Petazzoni , dri-devel@lists.freedesktop.org, Miquel Raynal Subject: [PATCH 05/12] drm/rockchip: lvds: Change platform data Date: Fri, 13 Dec 2019 19:10:44 +0100 Message-Id: <20191213181051.25983-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191213181051.25983-1-miquel.raynal@bootlin.com> References: <20191213181051.25983-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Prepare the introduction of PX30 support by using drm_encoder_helper_funcs as platform data instead of multiple register names which are specific to rk3288 and not generic to all Rockchip IPs. This way adding support for a new flavor of a similar IP will be a matter of adding the relevant helper funcs. Signed-off-by: Miquel Raynal --- drivers/gpu/drm/rockchip/rockchip_lvds.c | 32 ++++++++---------------- drivers/gpu/drm/rockchip/rockchip_lvds.h | 3 +++ 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c index 34e5d0b1172e..262fec61eb78 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -39,16 +39,10 @@ /** * rockchip_lvds_soc_data - rockchip lvds Soc private data - * @ch1_offset: lvds channel 1 registe offset - * grf_soc_con6: general registe offset for LVDS contrl - * grf_soc_con7: general registe offset for LVDS contrl - * has_vop_sel: to indicate whether need to choose from different VOP. + * @helper_funcs: LVDS connector helper functions */ struct rockchip_lvds_soc_data { - u32 ch1_offset; - int grf_soc_con6; - int grf_soc_con7; - bool has_vop_sel; + const struct drm_encoder_helper_funcs *helper_funcs; }; struct rockchip_lvds { @@ -73,7 +67,7 @@ static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, writel_relaxed(val, lvds->regs + offset); if (lvds->output == DISPLAY_OUTPUT_LVDS) return; - writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset); + writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); } static inline int rockchip_lvds_name_to_format(const char *s) @@ -188,7 +182,7 @@ static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds) RK3288_LVDS_CFG_REGC_PLL_ENABLE); val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN; val |= val << 16; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); @@ -242,7 +236,7 @@ static void rk3288_lvds_grf_config(struct drm_encoder *encoder, val |= (pin_dclk << 8) | (pin_hsync << 9); val |= (0xffff << 16); - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) { DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); return; @@ -255,9 +249,6 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, u32 val; int ret; - if (!lvds->soc_data->has_vop_sel) - return 0; - ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); if (ret < 0) return ret; @@ -266,7 +257,7 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, if (ret) val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val); if (ret < 0) return ret; @@ -324,10 +315,7 @@ static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { }; static const struct rockchip_lvds_soc_data rk3288_lvds_data = { - .ch1_offset = 0x100, - .grf_soc_con6 = 0x025c, - .grf_soc_con7 = 0x0260, - .has_vop_sel = true, + .helper_funcs = &rk3288_lvds_encoder_helper_funcs, }; static const struct of_device_id rockchip_lvds_dt_ids[] = { @@ -418,7 +406,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, goto err_put_remote; } - drm_encoder_helper_add(encoder, &rk3288_lvds_encoder_helper_funcs); + drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs); if (lvds->panel) { connector = &lvds->connector; @@ -479,8 +467,10 @@ static void rockchip_lvds_unbind(struct device *dev, struct device *master, void *data) { struct rockchip_lvds *lvds = dev_get_drvdata(dev); + const struct drm_encoder_helper_funcs *encoder_funcs; - rk3288_lvds_encoder_disable(&lvds->encoder); + encoder_funcs = lvds->soc_data->helper_funcs; + encoder_funcs->disable(&lvds->encoder); if (lvds->panel) drm_panel_detach(lvds->panel); pm_runtime_disable(dev); diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h index 1387bcbc4bc0..e41e9ab3c306 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.h +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h @@ -72,6 +72,9 @@ #define RK3288_LVDS_CFG_REG21_TX_DISABLE 0x00 #define RK3288_LVDS_CH1_OFFSET 0x100 +#define RK3288_LVDS_GRF_SOC_CON6 0x025C +#define RK3288_LVDS_GRF_SOC_CON7 0x0260 + /* fbdiv value is split over 2 registers, with bit8 in reg2 */ #define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \ (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0) -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: [PATCH 05/12] drm/rockchip: lvds: Change platform data Date: Fri, 13 Dec 2019 19:10:44 +0100 Message-ID: <20191213181051.25983-6-miquel.raynal@bootlin.com> References: <20191213181051.25983-1-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20191213181051.25983-1-miquel.raynal@bootlin.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Heiko Stuebner , linux-rockchip@lists.infradead.org, Daniel Vetter , David Airlie , Sandy Huang Cc: dri-devel@lists.freedesktop.org, Maxime Chevallier , Paul Kocialkowski , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org List-Id: linux-rockchip.vger.kernel.org Prepare the introduction of PX30 support by using drm_encoder_helper_funcs as platform data instead of multiple register names which are specific to rk3288 and not generic to all Rockchip IPs. This way adding support for a new flavor of a similar IP will be a matter of adding the relevant helper funcs. Signed-off-by: Miquel Raynal --- drivers/gpu/drm/rockchip/rockchip_lvds.c | 32 ++++++++---------------- drivers/gpu/drm/rockchip/rockchip_lvds.h | 3 +++ 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c index 34e5d0b1172e..262fec61eb78 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -39,16 +39,10 @@ /** * rockchip_lvds_soc_data - rockchip lvds Soc private data - * @ch1_offset: lvds channel 1 registe offset - * grf_soc_con6: general registe offset for LVDS contrl - * grf_soc_con7: general registe offset for LVDS contrl - * has_vop_sel: to indicate whether need to choose from different VOP. + * @helper_funcs: LVDS connector helper functions */ struct rockchip_lvds_soc_data { - u32 ch1_offset; - int grf_soc_con6; - int grf_soc_con7; - bool has_vop_sel; + const struct drm_encoder_helper_funcs *helper_funcs; }; struct rockchip_lvds { @@ -73,7 +67,7 @@ static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, writel_relaxed(val, lvds->regs + offset); if (lvds->output == DISPLAY_OUTPUT_LVDS) return; - writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset); + writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); } static inline int rockchip_lvds_name_to_format(const char *s) @@ -188,7 +182,7 @@ static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds) RK3288_LVDS_CFG_REGC_PLL_ENABLE); val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN; val |= val << 16; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); @@ -242,7 +236,7 @@ static void rk3288_lvds_grf_config(struct drm_encoder *encoder, val |= (pin_dclk << 8) | (pin_hsync << 9); val |= (0xffff << 16); - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) { DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); return; @@ -255,9 +249,6 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, u32 val; int ret; - if (!lvds->soc_data->has_vop_sel) - return 0; - ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); if (ret < 0) return ret; @@ -266,7 +257,7 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, if (ret) val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val); if (ret < 0) return ret; @@ -324,10 +315,7 @@ static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { }; static const struct rockchip_lvds_soc_data rk3288_lvds_data = { - .ch1_offset = 0x100, - .grf_soc_con6 = 0x025c, - .grf_soc_con7 = 0x0260, - .has_vop_sel = true, + .helper_funcs = &rk3288_lvds_encoder_helper_funcs, }; static const struct of_device_id rockchip_lvds_dt_ids[] = { @@ -418,7 +406,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, goto err_put_remote; } - drm_encoder_helper_add(encoder, &rk3288_lvds_encoder_helper_funcs); + drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs); if (lvds->panel) { connector = &lvds->connector; @@ -479,8 +467,10 @@ static void rockchip_lvds_unbind(struct device *dev, struct device *master, void *data) { struct rockchip_lvds *lvds = dev_get_drvdata(dev); + const struct drm_encoder_helper_funcs *encoder_funcs; - rk3288_lvds_encoder_disable(&lvds->encoder); + encoder_funcs = lvds->soc_data->helper_funcs; + encoder_funcs->disable(&lvds->encoder); if (lvds->panel) drm_panel_detach(lvds->panel); pm_runtime_disable(dev); diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h index 1387bcbc4bc0..e41e9ab3c306 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.h +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h @@ -72,6 +72,9 @@ #define RK3288_LVDS_CFG_REG21_TX_DISABLE 0x00 #define RK3288_LVDS_CH1_OFFSET 0x100 +#define RK3288_LVDS_GRF_SOC_CON6 0x025C +#define RK3288_LVDS_GRF_SOC_CON7 0x0260 + /* fbdiv value is split over 2 registers, with bit8 in reg2 */ #define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \ (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0) -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB336C43603 for ; Fri, 13 Dec 2019 22:25:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 927E12077B for ; Fri, 13 Dec 2019 22:25:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lsPhUyaj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 927E12077B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YABDTu+MTmAUBhdOT6VVtC2KpvId1acpFPzHFwacW4g=; b=lsPhUyajks6EOE oJNuL8rkFqfkgIIXc1KibC4MWP5hUj19whm5qMJt5/N55YkRVVrLD+DrXUiB7bUbY6ULdNyzTefHV 3HVAJ/y8vZLMX3uZuqOtBuICzdC+0jaW5gPtxaoq8/Z1wUeMeBuoL15THmajPksZvNgaNMMoufAY6 v0a8VexAZre8UeOzRLps2zOqc/AdDjTkvGAfSUuFCvK9qij+pJoi79XHXOSqRb69ZnnvHucMVBf2X VVjQS+M3jRaOcQ1dHQ87fyWMEOjgVhSM/k3YgueT8DtogCd/j08jY6Ylf0X8qWF//4s6PCjzB304/ M2SI52ezZO1COqa+AuLA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1ifpQg-0001OP-4Z; Fri, 13 Dec 2019 18:12:42 +0000 Received: from relay12.mail.gandi.net ([217.70.178.232]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1ifpP9-0008OT-Qt; Fri, 13 Dec 2019 18:11:10 +0000 Received: from localhost.localdomain (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id A4950200012; Fri, 13 Dec 2019 18:11:03 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Mark Rutland , , Heiko Stuebner , , Daniel Vetter , David Airlie , Sandy Huang Subject: [PATCH 05/12] drm/rockchip: lvds: Change platform data Date: Fri, 13 Dec 2019 19:10:44 +0100 Message-Id: <20191213181051.25983-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191213181051.25983-1-miquel.raynal@bootlin.com> References: <20191213181051.25983-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191213_101108_140094_C63C2AF8 X-CRM114-Status: GOOD ( 15.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, Maxime Chevallier , Paul Kocialkowski , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Prepare the introduction of PX30 support by using drm_encoder_helper_funcs as platform data instead of multiple register names which are specific to rk3288 and not generic to all Rockchip IPs. This way adding support for a new flavor of a similar IP will be a matter of adding the relevant helper funcs. Signed-off-by: Miquel Raynal --- drivers/gpu/drm/rockchip/rockchip_lvds.c | 32 ++++++++---------------- drivers/gpu/drm/rockchip/rockchip_lvds.h | 3 +++ 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c index 34e5d0b1172e..262fec61eb78 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -39,16 +39,10 @@ /** * rockchip_lvds_soc_data - rockchip lvds Soc private data - * @ch1_offset: lvds channel 1 registe offset - * grf_soc_con6: general registe offset for LVDS contrl - * grf_soc_con7: general registe offset for LVDS contrl - * has_vop_sel: to indicate whether need to choose from different VOP. + * @helper_funcs: LVDS connector helper functions */ struct rockchip_lvds_soc_data { - u32 ch1_offset; - int grf_soc_con6; - int grf_soc_con7; - bool has_vop_sel; + const struct drm_encoder_helper_funcs *helper_funcs; }; struct rockchip_lvds { @@ -73,7 +67,7 @@ static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, writel_relaxed(val, lvds->regs + offset); if (lvds->output == DISPLAY_OUTPUT_LVDS) return; - writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset); + writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); } static inline int rockchip_lvds_name_to_format(const char *s) @@ -188,7 +182,7 @@ static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds) RK3288_LVDS_CFG_REGC_PLL_ENABLE); val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN; val |= val << 16; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); @@ -242,7 +236,7 @@ static void rk3288_lvds_grf_config(struct drm_encoder *encoder, val |= (pin_dclk << 8) | (pin_hsync << 9); val |= (0xffff << 16); - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) { DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); return; @@ -255,9 +249,6 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, u32 val; int ret; - if (!lvds->soc_data->has_vop_sel) - return 0; - ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); if (ret < 0) return ret; @@ -266,7 +257,7 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, if (ret) val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val); if (ret < 0) return ret; @@ -324,10 +315,7 @@ static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { }; static const struct rockchip_lvds_soc_data rk3288_lvds_data = { - .ch1_offset = 0x100, - .grf_soc_con6 = 0x025c, - .grf_soc_con7 = 0x0260, - .has_vop_sel = true, + .helper_funcs = &rk3288_lvds_encoder_helper_funcs, }; static const struct of_device_id rockchip_lvds_dt_ids[] = { @@ -418,7 +406,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, goto err_put_remote; } - drm_encoder_helper_add(encoder, &rk3288_lvds_encoder_helper_funcs); + drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs); if (lvds->panel) { connector = &lvds->connector; @@ -479,8 +467,10 @@ static void rockchip_lvds_unbind(struct device *dev, struct device *master, void *data) { struct rockchip_lvds *lvds = dev_get_drvdata(dev); + const struct drm_encoder_helper_funcs *encoder_funcs; - rk3288_lvds_encoder_disable(&lvds->encoder); + encoder_funcs = lvds->soc_data->helper_funcs; + encoder_funcs->disable(&lvds->encoder); if (lvds->panel) drm_panel_detach(lvds->panel); pm_runtime_disable(dev); diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h index 1387bcbc4bc0..e41e9ab3c306 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.h +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h @@ -72,6 +72,9 @@ #define RK3288_LVDS_CFG_REG21_TX_DISABLE 0x00 #define RK3288_LVDS_CH1_OFFSET 0x100 +#define RK3288_LVDS_GRF_SOC_CON6 0x025C +#define RK3288_LVDS_GRF_SOC_CON7 0x0260 + /* fbdiv value is split over 2 registers, with bit8 in reg2 */ #define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \ (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0) -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F694C43603 for ; Sat, 14 Dec 2019 14:43:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 20F01214AF for ; Sat, 14 Dec 2019 14:43:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 20F01214AF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 764A96E378; Sat, 14 Dec 2019 14:43:28 +0000 (UTC) Received: from mslow2.mail.gandi.net (mslow2.mail.gandi.net [217.70.178.242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 41D2D6E2EC for ; Fri, 13 Dec 2019 18:20:41 +0000 (UTC) Received: from relay12.mail.gandi.net (unknown [217.70.178.232]) by mslow2.mail.gandi.net (Postfix) with ESMTP id 095173B1314 for ; Fri, 13 Dec 2019 18:11:27 +0000 (UTC) Received: from localhost.localdomain (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id A4950200012; Fri, 13 Dec 2019 18:11:03 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Mark Rutland , , Heiko Stuebner , , Daniel Vetter , David Airlie , Sandy Huang Subject: [PATCH 05/12] drm/rockchip: lvds: Change platform data Date: Fri, 13 Dec 2019 19:10:44 +0100 Message-Id: <20191213181051.25983-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191213181051.25983-1-miquel.raynal@bootlin.com> References: <20191213181051.25983-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-Mailman-Approved-At: Sat, 14 Dec 2019 14:42:54 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, Maxime Chevallier , Paul Kocialkowski , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Prepare the introduction of PX30 support by using drm_encoder_helper_funcs as platform data instead of multiple register names which are specific to rk3288 and not generic to all Rockchip IPs. This way adding support for a new flavor of a similar IP will be a matter of adding the relevant helper funcs. Signed-off-by: Miquel Raynal --- drivers/gpu/drm/rockchip/rockchip_lvds.c | 32 ++++++++---------------- drivers/gpu/drm/rockchip/rockchip_lvds.h | 3 +++ 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.c b/drivers/gpu/drm/rockchip/rockchip_lvds.c index 34e5d0b1172e..262fec61eb78 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.c +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.c @@ -39,16 +39,10 @@ /** * rockchip_lvds_soc_data - rockchip lvds Soc private data - * @ch1_offset: lvds channel 1 registe offset - * grf_soc_con6: general registe offset for LVDS contrl - * grf_soc_con7: general registe offset for LVDS contrl - * has_vop_sel: to indicate whether need to choose from different VOP. + * @helper_funcs: LVDS connector helper functions */ struct rockchip_lvds_soc_data { - u32 ch1_offset; - int grf_soc_con6; - int grf_soc_con7; - bool has_vop_sel; + const struct drm_encoder_helper_funcs *helper_funcs; }; struct rockchip_lvds { @@ -73,7 +67,7 @@ static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, writel_relaxed(val, lvds->regs + offset); if (lvds->output == DISPLAY_OUTPUT_LVDS) return; - writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset); + writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET); } static inline int rockchip_lvds_name_to_format(const char *s) @@ -188,7 +182,7 @@ static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds) RK3288_LVDS_CFG_REGC_PLL_ENABLE); val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN; val |= val << 16; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); @@ -242,7 +236,7 @@ static void rk3288_lvds_grf_config(struct drm_encoder *encoder, val |= (pin_dclk << 8) | (pin_hsync << 9); val |= (0xffff << 16); - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val); if (ret != 0) { DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret); return; @@ -255,9 +249,6 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, u32 val; int ret; - if (!lvds->soc_data->has_vop_sel) - return 0; - ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); if (ret < 0) return ret; @@ -266,7 +257,7 @@ static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, if (ret) val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT; - ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val); + ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val); if (ret < 0) return ret; @@ -324,10 +315,7 @@ static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = { }; static const struct rockchip_lvds_soc_data rk3288_lvds_data = { - .ch1_offset = 0x100, - .grf_soc_con6 = 0x025c, - .grf_soc_con7 = 0x0260, - .has_vop_sel = true, + .helper_funcs = &rk3288_lvds_encoder_helper_funcs, }; static const struct of_device_id rockchip_lvds_dt_ids[] = { @@ -418,7 +406,7 @@ static int rockchip_lvds_bind(struct device *dev, struct device *master, goto err_put_remote; } - drm_encoder_helper_add(encoder, &rk3288_lvds_encoder_helper_funcs); + drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs); if (lvds->panel) { connector = &lvds->connector; @@ -479,8 +467,10 @@ static void rockchip_lvds_unbind(struct device *dev, struct device *master, void *data) { struct rockchip_lvds *lvds = dev_get_drvdata(dev); + const struct drm_encoder_helper_funcs *encoder_funcs; - rk3288_lvds_encoder_disable(&lvds->encoder); + encoder_funcs = lvds->soc_data->helper_funcs; + encoder_funcs->disable(&lvds->encoder); if (lvds->panel) drm_panel_detach(lvds->panel); pm_runtime_disable(dev); diff --git a/drivers/gpu/drm/rockchip/rockchip_lvds.h b/drivers/gpu/drm/rockchip/rockchip_lvds.h index 1387bcbc4bc0..e41e9ab3c306 100644 --- a/drivers/gpu/drm/rockchip/rockchip_lvds.h +++ b/drivers/gpu/drm/rockchip/rockchip_lvds.h @@ -72,6 +72,9 @@ #define RK3288_LVDS_CFG_REG21_TX_DISABLE 0x00 #define RK3288_LVDS_CH1_OFFSET 0x100 +#define RK3288_LVDS_GRF_SOC_CON6 0x025C +#define RK3288_LVDS_GRF_SOC_CON7 0x0260 + /* fbdiv value is split over 2 registers, with bit8 in reg2 */ #define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \ (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0) -- 2.20.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel