From: Matt Roper <matthew.d.roper@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [Intel-gfx] [PATCH 07/15] drm/i915/tgl: Make sure FBs have a correct CCS plane stride
Date: Thu, 19 Dec 2019 14:48:50 -0800 [thread overview]
Message-ID: <20191219224850.GF2712252@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20191218161105.30638-8-imre.deak@intel.com>
On Wed, Dec 18, 2019 at 06:10:57PM +0200, Imre Deak wrote:
> The CCS plane stride must be fixed on TGL, as it's not configurable for
> the display. Instead the HW has a hardwired logic to determine it from
> the main plane stride. Make sure userspace passes in the correct stride.
Do you have a bspec page number reference for this? I don't see it
mentioned anywhere obvious.
Matt
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 641ea24539eb..7c52591172e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2620,6 +2620,11 @@ bool is_ccs_modifier(u64 modifier)
> modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
> }
>
> +static int gen12_ccs_aux_stride(struct drm_framebuffer *fb, int ccs_plane)
> +{
> + return DIV_ROUND_UP(fb->pitches[ccs_to_main_plane(fb, ccs_plane)], 512) * 64;
> +}
> +
> u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
> u32 pixel_format, u64 modifier)
> {
> @@ -16530,6 +16535,16 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
> goto err;
> }
>
> + if (is_gen12_ccs_plane(fb, i)) {
> + int ccs_aux_stride = gen12_ccs_aux_stride(fb, i);
> +
> + if (fb->pitches[i] != ccs_aux_stride) {
> + DRM_DEBUG_KMS("ccs aux plane %d pitch (%d) must be %d\n",
> + i, fb->pitches[i], ccs_aux_stride);
> + goto err;
> + }
> + }
> +
> fb->obj[i] = &obj->base;
> }
>
> --
> 2.22.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-12-19 22:48 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-18 16:10 [Intel-gfx] [PATCH 00/15] drm/i915/tgl: Render/media decompression support Imre Deak
2019-12-18 16:10 ` [Intel-gfx] [PATCH 01/15] drm/framebuffer: Format modifier for Intel Gen-12 render compression Imre Deak
2019-12-19 9:01 ` Kahola, Mika
2019-12-19 21:03 ` Matt Roper
2019-12-19 23:30 ` Imre Deak
2019-12-20 10:49 ` Imre Deak
2019-12-20 10:49 ` [Intel-gfx] " Imre Deak
2019-12-18 16:10 ` [Intel-gfx] [PATCH 02/15] drm/i915: Use intel_tile_height() instead of re-implementing Imre Deak
2019-12-19 9:39 ` Kahola, Mika
2019-12-19 21:04 ` Matt Roper
2019-12-18 16:10 ` [Intel-gfx] [PATCH 03/15] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment Imre Deak
2019-12-19 9:42 ` Kahola, Mika
2019-12-19 21:04 ` Matt Roper
2019-12-18 16:10 ` [Intel-gfx] [PATCH 04/15] drm/i915: Extract framebufer CCS offset checks into a function Imre Deak
2019-12-19 11:10 ` Kahola, Mika
2019-12-19 12:02 ` Imre Deak
2019-12-20 10:49 ` [Intel-gfx] [PATCH v2 " Imre Deak
2019-12-23 7:43 ` Kahola, Mika
2019-12-18 16:10 ` [Intel-gfx] [PATCH 05/15] drm/i915: Add helpers to select correct ccs/aux planes Imre Deak
2019-12-19 11:56 ` Kahola, Mika
2019-12-19 21:04 ` Matt Roper
2019-12-20 0:26 ` Imre Deak
2019-12-20 14:03 ` Ville Syrjälä
2019-12-20 14:23 ` Imre Deak
2019-12-18 16:10 ` [Intel-gfx] [PATCH 06/15] drm/i915/tgl: Gen-12 render decompression Imre Deak
2019-12-18 17:07 ` [Intel-gfx] [PATCH v2 " Imre Deak
2019-12-19 22:37 ` Sripada, Radhakrishna
2019-12-20 10:49 ` [Intel-gfx] [PATCH v3 " Imre Deak
2019-12-19 19:44 ` [Intel-gfx] [PATCH " Sripada, Radhakrishna
2019-12-18 16:10 ` [Intel-gfx] [PATCH 07/15] drm/i915/tgl: Make sure FBs have a correct CCS plane stride Imre Deak
2019-12-19 12:47 ` Kahola, Mika
2019-12-19 22:48 ` Matt Roper [this message]
2019-12-20 0:06 ` Imre Deak
2019-12-18 16:10 ` [Intel-gfx] [PATCH 08/15] drm/i915: Skip rotated offset adjustment for unsupported modifiers Imre Deak
2019-12-18 23:34 ` [Intel-gfx] [PATCH v2 " Imre Deak
2019-12-19 13:31 ` Kahola, Mika
2019-12-18 16:10 ` [Intel-gfx] [PATCH 09/15] drm/i915: Make sure Y slave planes get all the required state Imre Deak
2019-12-19 13:34 ` Kahola, Mika
2019-12-18 16:11 ` [Intel-gfx] [PATCH 10/15] drm/i915: Make sure CCS YUV semiplanar format checks work Imre Deak
2019-12-19 14:14 ` Kahola, Mika
2019-12-19 14:34 ` Imre Deak
2019-12-18 16:11 ` [Intel-gfx] [PATCH 11/15] drm/framebuffer: Format modifier for Intel Gen-12 media compression Imre Deak
2019-12-19 14:17 ` Kahola, Mika
2019-12-20 10:49 ` Imre Deak
2019-12-20 10:49 ` [Intel-gfx] " Imre Deak
2019-12-18 16:11 ` [Intel-gfx] [PATCH 12/15] drm/fb: Extend format_info member arrays to handle four planes Imre Deak
2019-12-19 14:20 ` Kahola, Mika
2019-12-20 10:49 ` Imre Deak
2019-12-20 10:49 ` [Intel-gfx] " Imre Deak
2019-12-18 16:11 ` [Intel-gfx] [PATCH 13/15] drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine Imre Deak
2019-12-19 21:44 ` Sripada, Radhakrishna
2019-12-20 10:49 ` [Intel-gfx] [PATCH v2 " Imre Deak
2019-12-18 16:11 ` [Intel-gfx] [PATCH 14/15] drm/framebuffer: Format modifier for Intel Gen 12 render compression with Clear Color Imre Deak
2019-12-19 14:28 ` Kahola, Mika
2019-12-20 10:49 ` Imre Deak
2019-12-20 10:49 ` [Intel-gfx] " Imre Deak
2019-12-18 16:11 ` [Intel-gfx] [PATCH 15/15] drm/i915/tgl: Add Clear Color support for TGL Render Decompression Imre Deak
2019-12-20 22:58 ` Matt Roper
2019-12-21 16:48 ` Imre Deak
2019-12-18 20:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Render/media decompression support (rev2) Patchwork
2019-12-18 20:54 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2019-12-19 1:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Render/media decompression support (rev3) Patchwork
2019-12-19 1:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-20 10:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Render/media decompression support (rev10) Patchwork
2019-12-20 11:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-20 13:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Render/media decompression support (rev3) Patchwork
2019-12-20 15:31 ` Imre Deak
2019-12-21 11:50 ` Vudum, Lakshminarayana
2019-12-20 17:07 ` Patchwork
2019-12-21 13:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Render/media decompression support (rev10) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191219224850.GF2712252@mdroper-desk1.amr.corp.intel.com \
--to=matthew.d.roper@intel.com \
--cc=dhinakaran.pandiyan@intel.com \
--cc=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.