[PATCH v2 1/2] Add GigaDevice gd25q128 128Mbit chip to spi-nor id table.

[PATCH v2 1/2] Add GigaDevice gd25q128 128Mbit chip to spi-nor id table.

[Mauro Condarelli]

From: MCon <mc5686@mclink.it>

Tested on VoCore2

Signed-off-by: MCon <mc5686@mclink.it>
Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
---

Changes in v2: None

 drivers/mtd/spi/spi-nor-ids.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index d3b84574ac..973b6f86c9 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
 	},
+	{
+		INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{
 		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ |
-- 
2.24.1

[PATCH v2 2/2] Port to new board "VoCore2"

[Mauro Condarelli]

Small patch series to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html".

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
---

Changes in v2:
- Removed some dead code
- Changed Author to my full name (no nick)
- Removed unwanted fixup to .dts generation (not my call).
- Fixed commit message
- Fixed various variables/filenames to include Vendor name
- Changed Vendor name (Vonger -> Vocore)

 MAINTAINERS                      |  1 +
 arch/mips/dts/Makefile           |  1 +
 arch/mips/dts/vocore_vocore2.dts | 62 ++++++++++++++++++++++++++++++++
 arch/mips/mach-mtmips/Kconfig    |  9 +++++
 board/vocore/vocore2/Kconfig     | 11 ++++++
 board/vocore/vocore2/Makefile    |  2 ++
 board/vocore/vocore2/board.c     | 35 ++++++++++++++++++
 configs/vocore2_defconfig        | 62 ++++++++++++++++++++++++++++++++
 include/configs/vocore2.h        | 50 ++++++++++++++++++++++++++
 9 files changed, 233 insertions(+)
 create mode 100644 arch/mips/dts/vocore_vocore2.dts
 create mode 100644 board/vocore/vocore2/Kconfig
 create mode 100644 board/vocore/vocore2/Makefile
 create mode 100644 board/vocore/vocore2/board.c
 create mode 100644 configs/vocore2_defconfig
 create mode 100644 include/configs/vocore2.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8d588b7d64..8c15deaafe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1,3 +1,4 @@
+source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333 #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line:
 Descriptions of section entries:
 
 	P: Person (obsolete)
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index c9d75596f2..5ece224511 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -22,6 +22,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
 dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
 dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
 dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
 dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts
new file mode 100644
index 0000000000..cdcd9b4e1d
--- /dev/null
+++ b/arch/mips/dts/vocore_vocore2.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ */
+
+/dts-v1/;
+#include "mt7628a.dtsi"
+
+/ {
+	compatible = "vocore,vocore2", "ralink,mt7628a-soc";
+	model = "VoCore2";
+
+	aliases {
+		serial0 = &uart2;
+		spi0 = &spi0;
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x08000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS2,115200";
+		stdout-path = &uart2;
+	};
+};
+
+&pinctrl {
+	state_default: pin_state {
+		p0led {
+			groups = "p0led_a";
+			function = "led";
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+	nor0: m25p80 at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "m25p80";
+		spi-max-frequency = <10000000>;
+		reg = <0x0>;
+		m25p,chunked-io = <32>;
+	};
+};
+
+&eth {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_iot_mode>;
+	mediatek,poll-link-phy = <0>;
+};
+
+&mmc {
+	status = "okay";
+};
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index c8dcf19c0d..57dfaebaec 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -43,6 +43,14 @@ config BOARD_LINKIT_SMART_7688
 	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
 	  a MT7688 (PCIe).
 
+config BOARD_VOCORE2
+	bool "VoCore2"
+	depends on SOC_MT7628
+	select SUPPORTS_BOOT_RAM
+	help
+	  VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
+	  and 16 MiB of flash (SPI).
+
 endchoice
 
 choice
@@ -134,5 +142,6 @@ config SUPPORTS_BOOT_RAM
 
 source "board/gardena/smart-gateway-mt7688/Kconfig"
 source "board/seeed/linkit-smart-7688/Kconfig"
+source "board/vocore/vocore2/Kconfig"
 
 endmenu
diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
new file mode 100644
index 0000000000..9178c3ab32
--- /dev/null
+++ b/board/vocore/vocore2/Kconfig
@@ -0,0 +1,11 @@
+if BOARD_VOCORE2
+config SYS_BOARD
+	default "vocore2"
+
+config SYS_VENDOR
+	default "vocore"
+
+config SYS_CONFIG_NAME
+	default "vocore2"
+
+endif
diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile
new file mode 100644
index 0000000000..4b162318c2
--- /dev/null
+++ b/board/vocore/vocore2/Makefile
@@ -0,0 +1,2 @@
+
+obj-y := board.o
diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
new file mode 100644
index 0000000000..1ab430247b
--- /dev/null
+++ b/board/vocore/vocore2/board.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ *
+ * Note: this is largely copied from:
+ *       board/seeed/linkit_smart_7688/board.c
+ *       Copyright (C) 2018 Stefan Roese <sr@denx.de>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define MT76XX_GPIO1_MODE   0x10000060
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_debug_uart_init(void)
+{
+	void __iomem *gpio_mode;
+
+	/* Select UART2 mode instead of GPIO mode (default) */
+	gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
+	clrbits_le32(gpio_mode, GENMASK(27, 26));
+}
+
+int board_early_init_f(void)
+{
+	/*
+	 * The pin muxing of UART2 also needs to be done, if debug uart
+	 * is not enabled. So we need to call this function here as well.
+	 */
+	board_debug_uart_init();
+
+	return 0;
+}
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
new file mode 100644
index 0000000000..fe56d8f196
--- /dev/null
+++ b/configs/vocore2_defconfig
@@ -0,0 +1,62 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_ENV_SIZE=0x00001000
+CONFIG_ENV_OFFSET=0x00FFE000
+CONFIG_ENV_SECT_SIZE=0x00001000
+CONFIG_ARCH_MTMIPS=y
+CONFIG_BOARD_VOCORE2=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_LOGLEVEL=8
+CONFIG_VERSION_VARIABLE=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_AUTOBOOT is not set
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDPARTS_DEFAULT="spi0.0:320k(u-boot),2752k(kernel),13304k(filesystem),4k(env),-(factory)"
+# CONFIG_ISO_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x00FFE000
+# CONFIG_NET is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BLK=y
+# CONFIG_INPUT is not set
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MTD=y
+# CONFIG_DM_ETH is not set
+# CONFIG_RAM_ROCKCHIP_DEBUG is not set
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_CONS_INDEX=3
+CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_LZMA=y
+CONFIG_LZO=y
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
new file mode 100644
index 0000000000..e7e6ac3666
--- /dev/null
+++ b/include/configs/vocore2.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ */
+
+#ifndef __VOCORE2_CONFIG_H__
+#define __VOCORE2_CONFIG_H__
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ      290000000
+
+/* RAM */
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
+
+#define CONFIG_SYS_LOAD_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#define CONFIG_SYS_INIT_SP_OFFSET        0x400000
+
+#ifdef CONFIG_BOOT_RAM
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* UART */
+#define CONFIG_SYS_BAUDRATE_TABLE   { 9600, 19200, 38400, 57600, \
+					115200, 230400, 460800, 921600 }
+#define CONFIG_BAUDRATE			115200
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START       0x80100000
+#define CONFIG_SYS_MEMTEST_END         0x80400000
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS                     64
+#define CONFIG_SYS_MALLOC_LEN       (1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN    (128 * 1024)
+#define CONFIG_SYS_CBSIZE                     512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE     CONFIG_SYS_TEXT_BASE
+
+/* Environment settings */
+#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
+#define CONFIG_EXTRA_ENV_SETTINGS			\
+	"mtdids="   CONFIG_MTDIDS_DEFAULT	"\0"	\
+	"mtdparts=" CONFIG_MTDPARTS_DEFAULT	"\0"
+#endif
+
+#define CONFIG_ENV_IS_IN_SPI_FLASH              1
+
+#endif//__VOCORE2_CONFIG_H__
-- 
2.24.1

[PATCH v2 1/2] Add GigaDevice gd25q128 128Mbit chip to spi-nor id table.

[Stefan Roese]

Hi Mauro,

On 27.12.19 14:25, Mauro Condarelli wrote:
> From: MCon <mc5686@mclink.it>
> 
> Tested on VoCore2
> 
> Signed-off-by: MCon <mc5686@mclink.it>
> Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
> ---
> 
> Changes in v2: None
> 
>   drivers/mtd/spi/spi-nor-ids.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index d3b84574ac..973b6f86c9 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
>   			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
>   			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
>   	},
> +	{
> +		INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
> +			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> +			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> +	},
>   	{
>   		INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
>   			SECT_4K | SPI_NOR_DUAL_READ |
> 

You can drop this patch. The support for this SPI NOR is now included
in mainline.

Thanks,
Stefan

[PATCH v2 2/2] Port to new board "VoCore2"

[Stefan Roese]

Hi Mauro,

On 27.12.19 14:25, Mauro Condarelli wrote:
> Small patch series to add support for VoCore/VoCore2 board.
> 
> VoCore is open hardware and runs OpenWrt/LEDE.
> It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
> It will help you to make a smart house, study embedded system
> or even make the tiniest router in the world.
> 
> Details about this SoM can be found at "https://vocore.io/v2.html".
> 
> Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
> ---
> 
> Changes in v2:
> - Removed some dead code
> - Changed Author to my full name (no nick)
> - Removed unwanted fixup to .dts generation (not my call).
> - Fixed commit message
> - Fixed various variables/filenames to include Vendor name
> - Changed Vendor name (Vonger -> Vocore)
> 
>   MAINTAINERS                      |  1 +
>   arch/mips/dts/Makefile           |  1 +
>   arch/mips/dts/vocore_vocore2.dts | 62 ++++++++++++++++++++++++++++++++
>   arch/mips/mach-mtmips/Kconfig    |  9 +++++
>   board/vocore/vocore2/Kconfig     | 11 ++++++
>   board/vocore/vocore2/Makefile    |  2 ++
>   board/vocore/vocore2/board.c     | 35 ++++++++++++++++++
>   configs/vocore2_defconfig        | 62 ++++++++++++++++++++++++++++++++
>   include/configs/vocore2.h        | 50 ++++++++++++++++++++++++++
>   9 files changed, 233 insertions(+)
>   create mode 100644 arch/mips/dts/vocore_vocore2.dts
>   create mode 100644 board/vocore/vocore2/Kconfig
>   create mode 100644 board/vocore/vocore2/Makefile
>   create mode 100644 board/vocore/vocore2/board.c
>   create mode 100644 configs/vocore2_defconfig
>   create mode 100644 include/configs/vocore2.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8d588b7d64..8c15deaafe 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1,3 +1,4 @@
> +source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333 #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line:
>   Descriptions of section entries:
>   
>   	P: Person (obsolete)
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index c9d75596f2..5ece224511 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -22,6 +22,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
>   dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
>   dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
>   dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
> +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
>   dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
>   dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
>   dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
> diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts
> new file mode 100644
> index 0000000000..cdcd9b4e1d
> --- /dev/null
> +++ b/arch/mips/dts/vocore_vocore2.dts
> @@ -0,0 +1,62 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
> + */
> +
> +/dts-v1/;
> +#include "mt7628a.dtsi"
> +
> +/ {
> +	compatible = "vocore,vocore2", "ralink,mt7628a-soc";
> +	model = "VoCore2";
> +
> +	aliases {
> +		serial0 = &uart2;
> +		spi0 = &spi0;
> +	};
> +
> +	memory at 0 {
> +		device_type = "memory";
> +		reg = <0x0 0x08000000>;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS2,115200";
> +		stdout-path = &uart2;
> +	};
> +};
> +
> +&pinctrl {
> +	state_default: pin_state {
> +		p0led {
> +			groups = "p0led_a";
> +			function = "led";
> +		};
> +	};
> +};
> +
> +&uart2 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +	nor0: m25p80 at 0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "m25p80";
> +		spi-max-frequency = <10000000>;
> +		reg = <0x0>;
> +		m25p,chunked-io = <32>;

Do you need these m25p properties? Does not the generic version
work for you like in the linkit:

         spi-flash at 0 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "jedec,spi-nor";
                 spi-max-frequency = <25000000>;
                 reg = <0>;
         };

?

> +	};
> +};
> +
> +&eth {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&ephy_iot_mode>;
> +	mediatek,poll-link-phy = <0>;
> +};
> +
> +&mmc {
> +	status = "okay";
> +};
> diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
> index c8dcf19c0d..57dfaebaec 100644
> --- a/arch/mips/mach-mtmips/Kconfig
> +++ b/arch/mips/mach-mtmips/Kconfig
> @@ -43,6 +43,14 @@ config BOARD_LINKIT_SMART_7688
>   	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
>   	  a MT7688 (PCIe).
>   
> +config BOARD_VOCORE2
> +	bool "VoCore2"
> +	depends on SOC_MT7628
> +	select SUPPORTS_BOOT_RAM
> +	help
> +	  VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
> +	  and 16 MiB of flash (SPI).
> +
>   endchoice
>   
>   choice
> @@ -134,5 +142,6 @@ config SUPPORTS_BOOT_RAM
>   
>   source "board/gardena/smart-gateway-mt7688/Kconfig"
>   source "board/seeed/linkit-smart-7688/Kconfig"
> +source "board/vocore/vocore2/Kconfig"
>   
>   endmenu
> diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
> new file mode 100644
> index 0000000000..9178c3ab32
> --- /dev/null
> +++ b/board/vocore/vocore2/Kconfig
> @@ -0,0 +1,11 @@
> +if BOARD_VOCORE2
> +config SYS_BOARD
> +	default "vocore2"
> +
> +config SYS_VENDOR
> +	default "vocore"
> +
> +config SYS_CONFIG_NAME
> +	default "vocore2"
> +
> +endif
> diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile
> new file mode 100644
> index 0000000000..4b162318c2
> --- /dev/null
> +++ b/board/vocore/vocore2/Makefile
> @@ -0,0 +1,2 @@
> +
> +obj-y := board.o
> diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
> new file mode 100644
> index 0000000000..1ab430247b
> --- /dev/null
> +++ b/board/vocore/vocore2/board.c
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
> + *
> + * Note: this is largely copied from:
> + *       board/seeed/linkit_smart_7688/board.c
> + *       Copyright (C) 2018 Stefan Roese <sr@denx.de>
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +
> +#define MT76XX_GPIO1_MODE   0x10000060
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +void board_debug_uart_init(void)
> +{
> +	void __iomem *gpio_mode;
> +
> +	/* Select UART2 mode instead of GPIO mode (default) */
> +	gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
> +	clrbits_le32(gpio_mode, GENMASK(27, 26));
> +}
> +
> +int board_early_init_f(void)
> +{
> +	/*
> +	 * The pin muxing of UART2 also needs to be done, if debug uart
> +	 * is not enabled. So we need to call this function here as well.
> +	 */
> +	board_debug_uart_init();
> +
> +	return 0;
> +}
> diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
> new file mode 100644
> index 0000000000..fe56d8f196
> --- /dev/null
> +++ b/configs/vocore2_defconfig
> @@ -0,0 +1,62 @@
> +CONFIG_MIPS=y
> +CONFIG_SYS_TEXT_BASE=0x80010000
> +CONFIG_ENV_SIZE=0x00001000
> +CONFIG_ENV_OFFSET=0x00FFE000
> +CONFIG_ENV_SECT_SIZE=0x00001000
> +CONFIG_ARCH_MTMIPS=y
> +CONFIG_BOARD_VOCORE2=y
> +CONFIG_MIPS_BOOT_FDT=y
> +CONFIG_ENV_VARS_UBOOT_CONFIG=y
> +CONFIG_SYS_BOOT_GET_CMDLINE=y
> +CONFIG_SYS_BOOT_GET_KBD=y
> +# CONFIG_LEGACY_IMAGE_FORMAT is not set
> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_LOGLEVEL=8
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +# CONFIG_AUTOBOOT is not set
> +# CONFIG_BOOTM_NETBSD is not set
> +# CONFIG_BOOTM_PLAN9 is not set
> +# CONFIG_BOOTM_RTEMS is not set
> +# CONFIG_BOOTM_VXWORKS is not set
> +# CONFIG_CMD_XIMG is not set
> +# CONFIG_CMD_LOADB is not set
> +# CONFIG_CMD_LOADS is not set
> +CONFIG_CMD_MTD=y
> +CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_CMD_MTDPARTS=y
> +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
> +CONFIG_MTDPARTS_DEFAULT="spi0.0:320k(u-boot),2752k(kernel),13304k(filesystem),4k(env),-(factory)"
> +# CONFIG_ISO_PARTITION is not set
> +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
> +CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_ENV_ADDR=0x00FFE000
> +# CONFIG_NET is not set
> +# CONFIG_DM_DEVICE_REMOVE is not set
> +CONFIG_BLK=y
> +# CONFIG_INPUT is not set
> +CONFIG_LED=y
> +CONFIG_LED_BLINK=y
> +CONFIG_LED_GPIO=y
> +CONFIG_MTD=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MTD=y
> +# CONFIG_DM_ETH is not set
> +# CONFIG_RAM_ROCKCHIP_DEBUG is not set
> +CONFIG_SPECIFY_CONSOLE_INDEX=y
> +CONFIG_CONS_INDEX=3
> +CONFIG_SPI=y
> +CONFIG_MT7621_SPI=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_LZMA=y
> +CONFIG_LZO=y
> diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
> new file mode 100644
> index 0000000000..e7e6ac3666
> --- /dev/null
> +++ b/include/configs/vocore2.h
> @@ -0,0 +1,50 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
> + */
> +
> +#ifndef __VOCORE2_CONFIG_H__
> +#define __VOCORE2_CONFIG_H__
> +
> +/* CPU */
> +#define CONFIG_SYS_MIPS_TIMER_FREQ      290000000
> +
> +/* RAM */
> +#define CONFIG_SYS_SDRAM_BASE          0x80000000
> +
> +#define CONFIG_SYS_LOAD_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100000
> +
> +#define CONFIG_SYS_INIT_SP_OFFSET        0x400000
> +
> +#ifdef CONFIG_BOOT_RAM
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#endif
> +
> +/* UART */
> +#define CONFIG_SYS_BAUDRATE_TABLE   { 9600, 19200, 38400, 57600, \
> +					115200, 230400, 460800, 921600 }
> +#define CONFIG_BAUDRATE			115200

Is this define really needed?

> +
> +/* RAM */
> +#define CONFIG_SYS_MEMTEST_START       0x80100000
> +#define CONFIG_SYS_MEMTEST_END         0x80400000
> +
> +/* Memory usage */
> +#define CONFIG_SYS_MAXARGS                     64
> +#define CONFIG_SYS_MALLOC_LEN       (1024 * 1024)
> +#define CONFIG_SYS_BOOTPARAMS_LEN    (128 * 1024)
> +#define CONFIG_SYS_CBSIZE                     512

This looks like an indentation problem. Please use tabs not spaces to
align.

> +
> +/* U-Boot */
> +#define CONFIG_SYS_MONITOR_BASE     CONFIG_SYS_TEXT_BASE
> +
> +/* Environment settings */
> +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
> +#define CONFIG_EXTRA_ENV_SETTINGS			\
> +	"mtdids="   CONFIG_MTDIDS_DEFAULT	"\0"	\
> +	"mtdparts=" CONFIG_MTDPARTS_DEFAULT	"\0"
> +#endif
> +
> +#define CONFIG_ENV_IS_IN_SPI_FLASH              1
> +
> +#endif//__VOCORE2_CONFIG_H__

Did you run checkpatch.pl on this patch? I would suspect that the last
line would raise a warning (missing space).

Thanks,
Stefan

[PATCH v2 2/2] Port to new board "VoCore2"

[Mauro Condarelli]

On 1/7/20 2:21 PM, Stefan Roese wrote:
> Hi Mauro,
>
> On 27.12.19 14:25, Mauro Condarelli wrote:
>> Small patch series to add support for VoCore/VoCore2 board.
>>
>> VoCore is open hardware and runs OpenWrt/LEDE.
>> It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
>> It will help you to make a smart house, study embedded system
>> or even make the tiniest router in the world.
>>
>> Details about this SoM can be found at "https://vocore.io/v2.html".
>>
>> Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
>> ---
>>
>> Changes in v2:
>> - Removed some dead code
>> - Changed Author to my full name (no nick)
>> - Removed unwanted fixup to .dts generation (not my call).
>> - Fixed commit message
>> - Fixed various variables/filenames to include Vendor name
>> - Changed Vendor name (Vonger -> Vocore)
>>
>>   MAINTAINERS                      |  1 +
>>   arch/mips/dts/Makefile           |  1 +
>>   arch/mips/dts/vocore_vocore2.dts | 62 ++++++++++++++++++++++++++++++++
>>   arch/mips/mach-mtmips/Kconfig    |  9 +++++
>>   board/vocore/vocore2/Kconfig     | 11 ++++++
>>   board/vocore/vocore2/Makefile    |  2 ++
>>   board/vocore/vocore2/board.c     | 35 ++++++++++++++++++
>>   configs/vocore2_defconfig        | 62 ++++++++++++++++++++++++++++++++
>>   include/configs/vocore2.h        | 50 ++++++++++++++++++++++++++
>>   9 files changed, 233 insertions(+)
>>   create mode 100644 arch/mips/dts/vocore_vocore2.dts
>>   create mode 100644 board/vocore/vocore2/Kconfig
>>   create mode 100644 board/vocore/vocore2/Makefile
>>   create mode 100644 board/vocore/vocore2/board.c
>>   create mode 100644 configs/vocore2_defconfig
>>   create mode 100644 include/configs/vocore2.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 8d588b7d64..8c15deaafe 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -1,3 +1,4 @@
>> +source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333
>> #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line:
>>   Descriptions of section entries:
>>         P: Person (obsolete)
>> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
>> index c9d75596f2..5ece224511 100644
>> --- a/arch/mips/dts/Makefile
>> +++ b/arch/mips/dts/Makefile
>> @@ -22,6 +22,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) +=
>> netgear,dgnd3700v2.dtb
>>   dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
>>   dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
>>   dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
>> +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
>>   dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
>>   dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
>>   dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
>> diff --git a/arch/mips/dts/vocore_vocore2.dts
>> b/arch/mips/dts/vocore_vocore2.dts
>> new file mode 100644
>> index 0000000000..cdcd9b4e1d
>> --- /dev/null
>> +++ b/arch/mips/dts/vocore_vocore2.dts
>> @@ -0,0 +1,62 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>> + */
>> +
>> +/dts-v1/;
>> +#include "mt7628a.dtsi"
>> +
>> +/ {
>> +    compatible = "vocore,vocore2", "ralink,mt7628a-soc";
>> +    model = "VoCore2";
>> +
>> +    aliases {
>> +        serial0 = &uart2;
>> +        spi0 = &spi0;
>> +    };
>> +
>> +    memory at 0 {
>> +        device_type = "memory";
>> +        reg = <0x0 0x08000000>;
>> +    };
>> +
>> +    chosen {
>> +        bootargs = "console=ttyS2,115200";
>> +        stdout-path = &uart2;
>> +    };
>> +};
>> +
>> +&pinctrl {
>> +    state_default: pin_state {
>> +        p0led {
>> +            groups = "p0led_a";
>> +            function = "led";
>> +        };
>> +    };
>> +};
>> +
>> +&uart2 {
>> +    status = "okay";
>> +};
>> +
>> +&spi0 {
>> +    status = "okay";
>> +    nor0: m25p80 at 0 {
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +        compatible = "m25p80";
>> +        spi-max-frequency = <10000000>;
>> +        reg = <0x0>;
>> +        m25p,chunked-io = <32>;
>
> Do you need these m25p properties? Does not the generic version
> work for you like in the linkit:
>
>         spi-flash at 0 {
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 compatible = "jedec,spi-nor";
>                 spi-max-frequency = <25000000>;
>                 reg = <0>;
>         };
>
> ?
It seems I can use generic.
I'm testing with very similar settings (I kept the spi-max-frequency).
Those settings come from original (in kernel tree definition of vocore2).
I am trying now to trim down to what's really needed.
I'll send yet-another-version hopefully soon, but I'm fighting with
WDT in linux (in u-boot it seems to work ok, but I want to have
everything lined up).
I also have problems with entropy pool in Linux, do you happen to know
if (and how) MT7628 supports HWRNG?
>
>> +    };
>> +};
>> +
>> +&eth {
>> +    pinctrl-names = "default";
>> +    pinctrl-0 = <&ephy_iot_mode>;
>> +    mediatek,poll-link-phy = <0>;
>> +};
>> +
>> +&mmc {
>> +    status = "okay";
>> +};
>> diff --git a/arch/mips/mach-mtmips/Kconfig
>> b/arch/mips/mach-mtmips/Kconfig
>> index c8dcf19c0d..57dfaebaec 100644
>> --- a/arch/mips/mach-mtmips/Kconfig
>> +++ b/arch/mips/mach-mtmips/Kconfig
>> @@ -43,6 +43,14 @@ config BOARD_LINKIT_SMART_7688
>>         ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
>>         a MT7688 (PCIe).
>>   +config BOARD_VOCORE2
>> +    bool "VoCore2"
>> +    depends on SOC_MT7628
>> +    select SUPPORTS_BOOT_RAM
>> +    help
>> +      VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
>> +      and 16 MiB of flash (SPI).
>> +
>>   endchoice
>>     choice
>> @@ -134,5 +142,6 @@ config SUPPORTS_BOOT_RAM
>>     source "board/gardena/smart-gateway-mt7688/Kconfig"
>>   source "board/seeed/linkit-smart-7688/Kconfig"
>> +source "board/vocore/vocore2/Kconfig"
>>     endmenu
>> diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
>> new file mode 100644
>> index 0000000000..9178c3ab32
>> --- /dev/null
>> +++ b/board/vocore/vocore2/Kconfig
>> @@ -0,0 +1,11 @@
>> +if BOARD_VOCORE2
>> +config SYS_BOARD
>> +    default "vocore2"
>> +
>> +config SYS_VENDOR
>> +    default "vocore"
>> +
>> +config SYS_CONFIG_NAME
>> +    default "vocore2"
>> +
>> +endif
>> diff --git a/board/vocore/vocore2/Makefile
>> b/board/vocore/vocore2/Makefile
>> new file mode 100644
>> index 0000000000..4b162318c2
>> --- /dev/null
>> +++ b/board/vocore/vocore2/Makefile
>> @@ -0,0 +1,2 @@
>> +
>> +obj-y := board.o
>> diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
>> new file mode 100644
>> index 0000000000..1ab430247b
>> --- /dev/null
>> +++ b/board/vocore/vocore2/board.c
>> @@ -0,0 +1,35 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>> + *
>> + * Note: this is largely copied from:
>> + *       board/seeed/linkit_smart_7688/board.c
>> + *       Copyright (C) 2018 Stefan Roese <sr@denx.de>
>> + */
>> +
>> +#include <common.h>
>> +#include <asm/io.h>
>> +
>> +#define MT76XX_GPIO1_MODE   0x10000060
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +void board_debug_uart_init(void)
>> +{
>> +    void __iomem *gpio_mode;
>> +
>> +    /* Select UART2 mode instead of GPIO mode (default) */
>> +    gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
>> +    clrbits_le32(gpio_mode, GENMASK(27, 26));
>> +}
>> +
>> +int board_early_init_f(void)
>> +{
>> +    /*
>> +     * The pin muxing of UART2 also needs to be done, if debug uart
>> +     * is not enabled. So we need to call this function here as well.
>> +     */
>> +    board_debug_uart_init();
>> +
>> +    return 0;
>> +}
>> diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
>> new file mode 100644
>> index 0000000000..fe56d8f196
>> --- /dev/null
>> +++ b/configs/vocore2_defconfig
>> @@ -0,0 +1,62 @@
>> +CONFIG_MIPS=y
>> +CONFIG_SYS_TEXT_BASE=0x80010000
>> +CONFIG_ENV_SIZE=0x00001000
>> +CONFIG_ENV_OFFSET=0x00FFE000
>> +CONFIG_ENV_SECT_SIZE=0x00001000
>> +CONFIG_ARCH_MTMIPS=y
>> +CONFIG_BOARD_VOCORE2=y
>> +CONFIG_MIPS_BOOT_FDT=y
>> +CONFIG_ENV_VARS_UBOOT_CONFIG=y
>> +CONFIG_SYS_BOOT_GET_CMDLINE=y
>> +CONFIG_SYS_BOOT_GET_KBD=y
>> +# CONFIG_LEGACY_IMAGE_FORMAT is not set
>> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
>> +CONFIG_USE_BOOTARGS=y
>> +CONFIG_LOGLEVEL=8
>> +CONFIG_VERSION_VARIABLE=y
>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>> +# CONFIG_AUTOBOOT is not set
>> +# CONFIG_BOOTM_NETBSD is not set
>> +# CONFIG_BOOTM_PLAN9 is not set
>> +# CONFIG_BOOTM_RTEMS is not set
>> +# CONFIG_BOOTM_VXWORKS is not set
>> +# CONFIG_CMD_XIMG is not set
>> +# CONFIG_CMD_LOADB is not set
>> +# CONFIG_CMD_LOADS is not set
>> +CONFIG_CMD_MTD=y
>> +CONFIG_CMD_PART=y
>> +CONFIG_CMD_SPI=y
>> +CONFIG_CMD_USB=y
>> +CONFIG_CMD_FAT=y
>> +CONFIG_CMD_FS_GENERIC=y
>> +CONFIG_CMD_MTDPARTS=y
>> +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
>> +CONFIG_MTDPARTS_DEFAULT="spi0.0:320k(u-boot),2752k(kernel),13304k(filesystem),4k(env),-(factory)"
>>
>> +# CONFIG_ISO_PARTITION is not set
>> +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
>> +CONFIG_ENV_IS_IN_SPI_FLASH=y
>> +CONFIG_ENV_ADDR=0x00FFE000
>> +# CONFIG_NET is not set
>> +# CONFIG_DM_DEVICE_REMOVE is not set
>> +CONFIG_BLK=y
>> +# CONFIG_INPUT is not set
>> +CONFIG_LED=y
>> +CONFIG_LED_BLINK=y
>> +CONFIG_LED_GPIO=y
>> +CONFIG_MTD=y
>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>> +CONFIG_SPI_FLASH_GIGADEVICE=y
>> +CONFIG_SPI_FLASH_MTD=y
>> +# CONFIG_DM_ETH is not set
>> +# CONFIG_RAM_ROCKCHIP_DEBUG is not set
>> +CONFIG_SPECIFY_CONSOLE_INDEX=y
>> +CONFIG_CONS_INDEX=3
>> +CONFIG_SPI=y
>> +CONFIG_MT7621_SPI=y
>> +CONFIG_USB=y
>> +CONFIG_DM_USB=y
>> +CONFIG_USB_EHCI_HCD=y
>> +CONFIG_USB_EHCI_GENERIC=y
>> +CONFIG_USB_STORAGE=y
>> +CONFIG_LZMA=y
>> +CONFIG_LZO=y
>> diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
>> new file mode 100644
>> index 0000000000..e7e6ac3666
>> --- /dev/null
>> +++ b/include/configs/vocore2.h
>> @@ -0,0 +1,50 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ */
>> +/*
>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>> + */
>> +
>> +#ifndef __VOCORE2_CONFIG_H__
>> +#define __VOCORE2_CONFIG_H__
>> +
>> +/* CPU */
>> +#define CONFIG_SYS_MIPS_TIMER_FREQ      290000000
>> +
>> +/* RAM */
>> +#define CONFIG_SYS_SDRAM_BASE          0x80000000
>> +
>> +#define CONFIG_SYS_LOAD_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100000
>> +
>> +#define CONFIG_SYS_INIT_SP_OFFSET        0x400000
>> +
>> +#ifdef CONFIG_BOOT_RAM
>> +#define CONFIG_SKIP_LOWLEVEL_INIT
>> +#endif
>> +
>> +/* UART */
>> +#define CONFIG_SYS_BAUDRATE_TABLE   { 9600, 19200, 38400, 57600, \
>> +                    115200, 230400, 460800, 921600 }
>> +#define CONFIG_BAUDRATE            115200
>
> Is this define really needed?
What is alternative?
I can specify in default env, I suppose.
>
>> +
>> +/* RAM */
>> +#define CONFIG_SYS_MEMTEST_START       0x80100000
>> +#define CONFIG_SYS_MEMTEST_END         0x80400000
>> +
>> +/* Memory usage */
>> +#define CONFIG_SYS_MAXARGS                     64
>> +#define CONFIG_SYS_MALLOC_LEN       (1024 * 1024)
>> +#define CONFIG_SYS_BOOTPARAMS_LEN    (128 * 1024)
>> +#define CONFIG_SYS_CBSIZE                     512
>
> This looks like an indentation problem. Please use tabs not spaces to
> align.
Yup.
Problem is I like to right-align, but that is hardly a requirement ;)

>
>> +
>> +/* U-Boot */
>> +#define CONFIG_SYS_MONITOR_BASE     CONFIG_SYS_TEXT_BASE
>> +
>> +/* Environment settings */
>> +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
>> +#define CONFIG_EXTRA_ENV_SETTINGS            \
>> +    "mtdids="   CONFIG_MTDIDS_DEFAULT    "\0"    \
>> +    "mtdparts=" CONFIG_MTDPARTS_DEFAULT    "\0"
>> +#endif
>> +
>> +#define CONFIG_ENV_IS_IN_SPI_FLASH              1
>> +
>> +#endif//__VOCORE2_CONFIG_H__
>
> Did you run checkpatch.pl on this patch? I would suspect that the last
> line would raise a warning (missing space).
I'm using patman and it did not compalin.
>
> Thanks,
> Stefan
>
Thanks
Mauro

[PATCH v2 2/2] Port to new board "VoCore2"

[Daniel Schwierzeck]

On Tue, Jan 7, 2020 at 3:30 PM Mauro Condarelli <mc5686@mclink.it> wrote:
>
...
> I also have problems with entropy pool in Linux, do you happen to know
> if (and how) MT7628 supports HWRNG?

what problems exactly?

On a embedded device you usually can only add randomness from
interrupts sources to the entropy pool
due to lack of disk or input devices. On a router the most interrupts
are typically generated by drivers
for ethernet and SPI/NAND/MMC controllers. You could use user-space
daemons like haveged [1]
to add more randomness from hardware events.

Also have a look at the documentation in Linux's drivers/char/random.c
for more information, especially
the paragraph "Ensuring unpredictability at system startup".

PS: In my day job (embedded router devices) I use a hash like SHA256
over the U-Boot MTD partition
where also some device specific information like MAC addresses and
serial numbers are stored to generate
the initial seed for the entropy pool on first boot. Afterwards I
manage the random seed over reboots as
described in drivers/char/random.c.

[1] https://linux.die.net/man/8/haveged

-- 
- Daniel

[PATCH v2 2/2] Port to new board "VoCore2"

[Mauro Condarelli]

Thanks Daniel.

On 1/7/20 4:58 PM, Daniel Schwierzeck wrote:
> On Tue, Jan 7, 2020 at 3:30 PM Mauro Condarelli <mc5686@mclink.it> wrote:
> ...
>> I also have problems with entropy pool in Linux, do you happen to know
>> if (and how) MT7628 supports HWRNG?
> what problems exactly?
Currently it takes a LOT of time to fill-up the entropy pool
(over half an hour) and on first startup, when it has to
generate ssh keys and other stuff system is virtually dead
for that long.
>
> On a embedded device you usually can only add randomness from
> interrupts sources to the entropy pool
> due to lack of disk or input devices. On a router the most interrupts
> are typically generated by drivers
> for ethernet and SPI/NAND/MMC controllers. You could use user-space
> daemons like haveged [1]
> to add more randomness from hardware events.
I tried that and it helps.
I also found *traces* pointing in the direction of hardware
support for RNG in my SoC; I have ca opy of the (badly
incomplete) "MT7628 PROGRAMMING GUIDE" and it
reports in "PWM1 Control register" an "interesting" field:
RESV1 Select Random Generator mode.
This males a lot of sense because this SoC is meant to implement
Wireless routers, so crypto and random acceleration would
be very useful.
Unfortunately I don't have more precise information, hence
the question.

> Also have a look at the documentation in Linux's drivers/char/random.c
> for more information, especially
> the paragraph "Ensuring unpredictability at system startup".
>
> PS: In my day job (embedded router devices) I use a hash like SHA256
> over the U-Boot MTD partition
> where also some device specific information like MAC addresses and
> serial numbers are stored to generate
> the initial seed for the entropy pool on first boot. Afterwards I
> manage the random seed over reboots as
> described in drivers/char/random.c.
>
> [1] https://linux.die.net/man/8/haveged
>

[PATCH v2 2/2] Port to new board "VoCore2"

[Daniel Schwierzeck]

+cc Weijie

On 1/7/20 6:43 PM, Mauro Condarelli wrote:
> Thanks Daniel.
> 
> On 1/7/20 4:58 PM, Daniel Schwierzeck wrote:
>> On Tue, Jan 7, 2020 at 3:30 PM Mauro Condarelli <mc5686@mclink.it> wrote:
>> ...
>>> I also have problems with entropy pool in Linux, do you happen to know
>>> if (and how) MT7628 supports HWRNG?
>> what problems exactly?
> Currently it takes a LOT of time to fill-up the entropy pool
> (over half an hour) and on first startup, when it has to
> generate ssh keys and other stuff system is virtually dead
> for that long.

if possible you should generate the host keys on the first SSH
connection attempt. Otherwise the time of generation is predictable. If
you use dropbear you can configure that.

>>
>> On a embedded device you usually can only add randomness from
>> interrupts sources to the entropy pool
>> due to lack of disk or input devices. On a router the most interrupts
>> are typically generated by drivers
>> for ethernet and SPI/NAND/MMC controllers. You could use user-space
>> daemons like haveged [1]
>> to add more randomness from hardware events.
> I tried that and it helps.
> I also found *traces* pointing in the direction of hardware
> support for RNG in my SoC; I have ca opy of the (badly
> incomplete) "MT7628 PROGRAMMING GUIDE" and it
> reports in "PWM1 Control register" an "interesting" field:
> RESV1 Select Random Generator mode.
> This males a lot of sense because this SoC is meant to implement
> Wireless routers, so crypto and random acceleration would
> be very useful.
> Unfortunately I don't have more precise information, hence
> the question.

maybe Weijie from Mediatek can tell if MT7628 has a HWRNG. But PWM1
sounds more like a pulse width modulator and shouldn't be related to a
HWRNG.

-- 
- Daniel

[PATCH v2 2/2] Port to new board "VoCore2"

[Stefan Roese]

On 07.01.20 15:30, Mauro Condarelli wrote:
> 
> 
> On 1/7/20 2:21 PM, Stefan Roese wrote:
>> Hi Mauro,
>>
>> On 27.12.19 14:25, Mauro Condarelli wrote:
>>> Small patch series to add support for VoCore/VoCore2 board.
>>>
>>> VoCore is open hardware and runs OpenWrt/LEDE.
>>> It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
>>> It will help you to make a smart house, study embedded system
>>> or even make the tiniest router in the world.
>>>
>>> Details about this SoM can be found at "https://vocore.io/v2.html".
>>>
>>> Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
>>> ---
>>>
>>> Changes in v2:
>>> - Removed some dead code
>>> - Changed Author to my full name (no nick)
>>> - Removed unwanted fixup to .dts generation (not my call).
>>> - Fixed commit message
>>> - Fixed various variables/filenames to include Vendor name
>>> - Changed Vendor name (Vonger -> Vocore)
>>>
>>>    MAINTAINERS                      |  1 +
>>>    arch/mips/dts/Makefile           |  1 +
>>>    arch/mips/dts/vocore_vocore2.dts | 62 ++++++++++++++++++++++++++++++++
>>>    arch/mips/mach-mtmips/Kconfig    |  9 +++++
>>>    board/vocore/vocore2/Kconfig     | 11 ++++++
>>>    board/vocore/vocore2/Makefile    |  2 ++
>>>    board/vocore/vocore2/board.c     | 35 ++++++++++++++++++
>>>    configs/vocore2_defconfig        | 62 ++++++++++++++++++++++++++++++++
>>>    include/configs/vocore2.h        | 50 ++++++++++++++++++++++++++
>>>    9 files changed, 233 insertions(+)
>>>    create mode 100644 arch/mips/dts/vocore_vocore2.dts
>>>    create mode 100644 board/vocore/vocore2/Kconfig
>>>    create mode 100644 board/vocore/vocore2/Makefile
>>>    create mode 100644 board/vocore/vocore2/board.c
>>>    create mode 100644 configs/vocore2_defconfig
>>>    create mode 100644 include/configs/vocore2.h
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 8d588b7d64..8c15deaafe 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -1,3 +1,4 @@
>>> +source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333
>>> #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line:
>>>    Descriptions of section entries:
>>>          P: Person (obsolete)
>>> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
>>> index c9d75596f2..5ece224511 100644
>>> --- a/arch/mips/dts/Makefile
>>> +++ b/arch/mips/dts/Makefile
>>> @@ -22,6 +22,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) +=
>>> netgear,dgnd3700v2.dtb
>>>    dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
>>>    dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
>>>    dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
>>> +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
>>>    dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
>>>    dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
>>>    dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
>>> diff --git a/arch/mips/dts/vocore_vocore2.dts
>>> b/arch/mips/dts/vocore_vocore2.dts
>>> new file mode 100644
>>> index 0000000000..cdcd9b4e1d
>>> --- /dev/null
>>> +++ b/arch/mips/dts/vocore_vocore2.dts
>>> @@ -0,0 +1,62 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>>> + */
>>> +
>>> +/dts-v1/;
>>> +#include "mt7628a.dtsi"
>>> +
>>> +/ {
>>> +    compatible = "vocore,vocore2", "ralink,mt7628a-soc";
>>> +    model = "VoCore2";
>>> +
>>> +    aliases {
>>> +        serial0 = &uart2;
>>> +        spi0 = &spi0;
>>> +    };
>>> +
>>> +    memory at 0 {
>>> +        device_type = "memory";
>>> +        reg = <0x0 0x08000000>;
>>> +    };
>>> +
>>> +    chosen {
>>> +        bootargs = "console=ttyS2,115200";
>>> +        stdout-path = &uart2;
>>> +    };
>>> +};
>>> +
>>> +&pinctrl {
>>> +    state_default: pin_state {
>>> +        p0led {
>>> +            groups = "p0led_a";
>>> +            function = "led";
>>> +        };
>>> +    };
>>> +};
>>> +
>>> +&uart2 {
>>> +    status = "okay";
>>> +};
>>> +
>>> +&spi0 {
>>> +    status = "okay";
>>> +    nor0: m25p80 at 0 {
>>> +        #address-cells = <1>;
>>> +        #size-cells = <1>;
>>> +        compatible = "m25p80";
>>> +        spi-max-frequency = <10000000>;
>>> +        reg = <0x0>;
>>> +        m25p,chunked-io = <32>;
>>
>> Do you need these m25p properties? Does not the generic version
>> work for you like in the linkit:
>>
>>          spi-flash at 0 {
>>                  #address-cells = <1>;
>>                  #size-cells = <1>;
>>                  compatible = "jedec,spi-nor";
>>                  spi-max-frequency = <25000000>;
>>                  reg = <0>;
>>          };
>>
>> ?
> It seems I can use generic.
> I'm testing with very similar settings (I kept the spi-max-frequency).
> Those settings come from original (in kernel tree definition of vocore2).
> I am trying now to trim down to what's really needed.

Good.

> I'll send yet-another-version hopefully soon, but I'm fighting with
> WDT in linux (in u-boot it seems to work ok, but I want to have
> everything lined up).
> I also have problems with entropy pool in Linux, do you happen to know
> if (and how) MT7628 supports HWRNG?
>>
>>> +    };
>>> +};
>>> +
>>> +&eth {
>>> +    pinctrl-names = "default";
>>> +    pinctrl-0 = <&ephy_iot_mode>;
>>> +    mediatek,poll-link-phy = <0>;
>>> +};
>>> +
>>> +&mmc {
>>> +    status = "okay";
>>> +};
>>> diff --git a/arch/mips/mach-mtmips/Kconfig
>>> b/arch/mips/mach-mtmips/Kconfig
>>> index c8dcf19c0d..57dfaebaec 100644
>>> --- a/arch/mips/mach-mtmips/Kconfig
>>> +++ b/arch/mips/mach-mtmips/Kconfig
>>> @@ -43,6 +43,14 @@ config BOARD_LINKIT_SMART_7688
>>>          ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
>>>          a MT7688 (PCIe).
>>>    +config BOARD_VOCORE2
>>> +    bool "VoCore2"
>>> +    depends on SOC_MT7628
>>> +    select SUPPORTS_BOOT_RAM
>>> +    help
>>> +      VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
>>> +      and 16 MiB of flash (SPI).
>>> +
>>>    endchoice
>>>      choice
>>> @@ -134,5 +142,6 @@ config SUPPORTS_BOOT_RAM
>>>      source "board/gardena/smart-gateway-mt7688/Kconfig"
>>>    source "board/seeed/linkit-smart-7688/Kconfig"
>>> +source "board/vocore/vocore2/Kconfig"
>>>      endmenu
>>> diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
>>> new file mode 100644
>>> index 0000000000..9178c3ab32
>>> --- /dev/null
>>> +++ b/board/vocore/vocore2/Kconfig
>>> @@ -0,0 +1,11 @@
>>> +if BOARD_VOCORE2
>>> +config SYS_BOARD
>>> +    default "vocore2"
>>> +
>>> +config SYS_VENDOR
>>> +    default "vocore"
>>> +
>>> +config SYS_CONFIG_NAME
>>> +    default "vocore2"
>>> +
>>> +endif
>>> diff --git a/board/vocore/vocore2/Makefile
>>> b/board/vocore/vocore2/Makefile
>>> new file mode 100644
>>> index 0000000000..4b162318c2
>>> --- /dev/null
>>> +++ b/board/vocore/vocore2/Makefile
>>> @@ -0,0 +1,2 @@
>>> +
>>> +obj-y := board.o
>>> diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
>>> new file mode 100644
>>> index 0000000000..1ab430247b
>>> --- /dev/null
>>> +++ b/board/vocore/vocore2/board.c
>>> @@ -0,0 +1,35 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>>> + *
>>> + * Note: this is largely copied from:
>>> + *       board/seeed/linkit_smart_7688/board.c
>>> + *       Copyright (C) 2018 Stefan Roese <sr@denx.de>
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <asm/io.h>
>>> +
>>> +#define MT76XX_GPIO1_MODE   0x10000060
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +void board_debug_uart_init(void)
>>> +{
>>> +    void __iomem *gpio_mode;
>>> +
>>> +    /* Select UART2 mode instead of GPIO mode (default) */
>>> +    gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
>>> +    clrbits_le32(gpio_mode, GENMASK(27, 26));
>>> +}
>>> +
>>> +int board_early_init_f(void)
>>> +{
>>> +    /*
>>> +     * The pin muxing of UART2 also needs to be done, if debug uart
>>> +     * is not enabled. So we need to call this function here as well.
>>> +     */
>>> +    board_debug_uart_init();
>>> +
>>> +    return 0;
>>> +}
>>> diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
>>> new file mode 100644
>>> index 0000000000..fe56d8f196
>>> --- /dev/null
>>> +++ b/configs/vocore2_defconfig
>>> @@ -0,0 +1,62 @@
>>> +CONFIG_MIPS=y
>>> +CONFIG_SYS_TEXT_BASE=0x80010000
>>> +CONFIG_ENV_SIZE=0x00001000
>>> +CONFIG_ENV_OFFSET=0x00FFE000
>>> +CONFIG_ENV_SECT_SIZE=0x00001000
>>> +CONFIG_ARCH_MTMIPS=y
>>> +CONFIG_BOARD_VOCORE2=y
>>> +CONFIG_MIPS_BOOT_FDT=y
>>> +CONFIG_ENV_VARS_UBOOT_CONFIG=y
>>> +CONFIG_SYS_BOOT_GET_CMDLINE=y
>>> +CONFIG_SYS_BOOT_GET_KBD=y
>>> +# CONFIG_LEGACY_IMAGE_FORMAT is not set
>>> +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
>>> +CONFIG_USE_BOOTARGS=y
>>> +CONFIG_LOGLEVEL=8
>>> +CONFIG_VERSION_VARIABLE=y
>>> +CONFIG_DISPLAY_BOARDINFO_LATE=y
>>> +# CONFIG_AUTOBOOT is not set
>>> +# CONFIG_BOOTM_NETBSD is not set
>>> +# CONFIG_BOOTM_PLAN9 is not set
>>> +# CONFIG_BOOTM_RTEMS is not set
>>> +# CONFIG_BOOTM_VXWORKS is not set
>>> +# CONFIG_CMD_XIMG is not set
>>> +# CONFIG_CMD_LOADB is not set
>>> +# CONFIG_CMD_LOADS is not set
>>> +CONFIG_CMD_MTD=y
>>> +CONFIG_CMD_PART=y
>>> +CONFIG_CMD_SPI=y
>>> +CONFIG_CMD_USB=y
>>> +CONFIG_CMD_FAT=y
>>> +CONFIG_CMD_FS_GENERIC=y
>>> +CONFIG_CMD_MTDPARTS=y
>>> +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
>>> +CONFIG_MTDPARTS_DEFAULT="spi0.0:320k(u-boot),2752k(kernel),13304k(filesystem),4k(env),-(factory)"
>>>
>>> +# CONFIG_ISO_PARTITION is not set
>>> +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
>>> +CONFIG_ENV_IS_IN_SPI_FLASH=y
>>> +CONFIG_ENV_ADDR=0x00FFE000
>>> +# CONFIG_NET is not set
>>> +# CONFIG_DM_DEVICE_REMOVE is not set
>>> +CONFIG_BLK=y
>>> +# CONFIG_INPUT is not set
>>> +CONFIG_LED=y
>>> +CONFIG_LED_BLINK=y
>>> +CONFIG_LED_GPIO=y
>>> +CONFIG_MTD=y
>>> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>>> +CONFIG_SPI_FLASH_GIGADEVICE=y
>>> +CONFIG_SPI_FLASH_MTD=y
>>> +# CONFIG_DM_ETH is not set
>>> +# CONFIG_RAM_ROCKCHIP_DEBUG is not set
>>> +CONFIG_SPECIFY_CONSOLE_INDEX=y
>>> +CONFIG_CONS_INDEX=3
>>> +CONFIG_SPI=y
>>> +CONFIG_MT7621_SPI=y
>>> +CONFIG_USB=y
>>> +CONFIG_DM_USB=y
>>> +CONFIG_USB_EHCI_HCD=y
>>> +CONFIG_USB_EHCI_GENERIC=y
>>> +CONFIG_USB_STORAGE=y
>>> +CONFIG_LZMA=y
>>> +CONFIG_LZO=y
>>> diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
>>> new file mode 100644
>>> index 0000000000..e7e6ac3666
>>> --- /dev/null
>>> +++ b/include/configs/vocore2.h
>>> @@ -0,0 +1,50 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
>>> + */
>>> +
>>> +#ifndef __VOCORE2_CONFIG_H__
>>> +#define __VOCORE2_CONFIG_H__
>>> +
>>> +/* CPU */
>>> +#define CONFIG_SYS_MIPS_TIMER_FREQ      290000000
>>> +
>>> +/* RAM */
>>> +#define CONFIG_SYS_SDRAM_BASE          0x80000000
>>> +
>>> +#define CONFIG_SYS_LOAD_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100000
>>> +
>>> +#define CONFIG_SYS_INIT_SP_OFFSET        0x400000
>>> +
>>> +#ifdef CONFIG_BOOT_RAM
>>> +#define CONFIG_SKIP_LOWLEVEL_INIT
>>> +#endif
>>> +
>>> +/* UART */
>>> +#define CONFIG_SYS_BAUDRATE_TABLE   { 9600, 19200, 38400, 57600, \
>>> +                    115200, 230400, 460800, 921600 }
>>> +#define CONFIG_BAUDRATE            115200
>>
>> Is this define really needed?
> What is alternative?

Its defined via Kconfig now and defaults to 115200. So you can just drop
it here.

> I can specify in default env, I suppose.
>>
>>> +
>>> +/* RAM */
>>> +#define CONFIG_SYS_MEMTEST_START       0x80100000
>>> +#define CONFIG_SYS_MEMTEST_END         0x80400000
>>> +
>>> +/* Memory usage */
>>> +#define CONFIG_SYS_MAXARGS                     64
>>> +#define CONFIG_SYS_MALLOC_LEN       (1024 * 1024)
>>> +#define CONFIG_SYS_BOOTPARAMS_LEN    (128 * 1024)
>>> +#define CONFIG_SYS_CBSIZE                     512
>>
>> This looks like an indentation problem. Please use tabs not spaces to
>> align.
> Yup.
> Problem is I like to right-align, but that is hardly a requirement ;)

Not that "hard" but its necessary to keep the patch checkpatch clean I
assume. So please use tabs.
  
>>
>>> +
>>> +/* U-Boot */
>>> +#define CONFIG_SYS_MONITOR_BASE     CONFIG_SYS_TEXT_BASE
>>> +
>>> +/* Environment settings */
>>> +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
>>> +#define CONFIG_EXTRA_ENV_SETTINGS            \
>>> +    "mtdids="   CONFIG_MTDIDS_DEFAULT    "\0"    \
>>> +    "mtdparts=" CONFIG_MTDPARTS_DEFAULT    "\0"
>>> +#endif
>>> +
>>> +#define CONFIG_ENV_IS_IN_SPI_FLASH              1
>>> +
>>> +#endif//__VOCORE2_CONFIG_H__
>>
>> Did you run checkpatch.pl on this patch? I would suspect that the last
>> line would raise a warning (missing space).
> I'm using patman and it did not compalin.

I suggest that you use checkpatch manually - not sure if its invoked
automatically with every patman run.

Thanks,
Stefan

[PATCH v2 2/2] Port to new board "VoCore2"

[Weijie Gao]

Hi Mauro,

As far as I know MT7628 only has a hw crypto engine.

I have only the same programming guide as yours so I can't tell you what
does the "RESV1 Select Random Generator mode" mean.

Best Regards,

Weijie

On Wed, 2020-01-08 at 14:37 +0100, Daniel Schwierzeck wrote:
> +cc Weijie
> 
> On 1/7/20 6:43 PM, Mauro Condarelli wrote:
> > Thanks Daniel.
> > 
> > On 1/7/20 4:58 PM, Daniel Schwierzeck wrote:
> >> On Tue, Jan 7, 2020 at 3:30 PM Mauro Condarelli <mc5686@mclink.it> wrote:
> >> ...
> >>> I also have problems with entropy pool in Linux, do you happen to know
> >>> if (and how) MT7628 supports HWRNG?
> >> what problems exactly?
> > Currently it takes a LOT of time to fill-up the entropy pool
> > (over half an hour) and on first startup, when it has to
> > generate ssh keys and other stuff system is virtually dead
> > for that long.
> 
> if possible you should generate the host keys on the first SSH
> connection attempt. Otherwise the time of generation is predictable. If
> you use dropbear you can configure that.
> 
> >>
> >> On a embedded device you usually can only add randomness from
> >> interrupts sources to the entropy pool
> >> due to lack of disk or input devices. On a router the most interrupts
> >> are typically generated by drivers
> >> for ethernet and SPI/NAND/MMC controllers. You could use user-space
> >> daemons like haveged [1]
> >> to add more randomness from hardware events.
> > I tried that and it helps.
> > I also found *traces* pointing in the direction of hardware
> > support for RNG in my SoC; I have ca opy of the (badly
> > incomplete) "MT7628 PROGRAMMING GUIDE" and it
> > reports in "PWM1 Control register" an "interesting" field:
> > RESV1 Select Random Generator mode.
> > This males a lot of sense because this SoC is meant to implement
> > Wireless routers, so crypto and random acceleration would
> > be very useful.
> > Unfortunately I don't have more precise information, hence
> > the question.
> 
> maybe Weijie from Mediatek can tell if MT7628 has a HWRNG. But PWM1
> sounds more like a pulse width modulator and shouldn't be related to a
> HWRNG.
>