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* [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
@ 2020-01-06 20:01 ` Horia Geantă
  0 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-01-06 20:01 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: David S. Miller, Aymen Sghaier, Pengutronix Kernel Team,
	Fabio Estevam, NXP Linux Team, linux-crypto, devicetree,
	linux-arm-kernel, linux-kernel

Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
which is very similar to the one used in i.mx8mq, i.mx8mm.

Since the clocks are identical for all members of i.MX 8M family,
simplify the SoC <--> clock array mapping table.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 drivers/crypto/caam/ctrl.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 6659c8d9672e..88a58a8fc533 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
 
 	if (ctrlpriv->virt_en == 1 ||
 	    /*
-	     * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
+	     * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
 	     * and the following steps should be performed regardless
 	     */
 	    of_machine_is_compatible("fsl,imx8mq") ||
-	    of_machine_is_compatible("fsl,imx8mm")) {
+	    of_machine_is_compatible("fsl,imx8mm") ||
+	    of_machine_is_compatible("fsl,imx8mn")) {
 		clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
 
 		while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
@@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
 	{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
 	{ .soc_id = "i.MX6*",  .data = &caam_imx6_data },
 	{ .soc_id = "i.MX7*",  .data = &caam_imx7_data },
-	{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
-	{ .soc_id = "i.MX8MM", .data = &caam_imx7_data },
+	{ .soc_id = "i.MX8M*", .data = &caam_imx7_data },
 	{ .family = "Freescale i.MX" },
 	{ /* sentinel */ }
 };
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
@ 2020-01-06 20:01 ` Horia Geantă
  0 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-01-06 20:01 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: devicetree, Aymen Sghaier, linux-kernel, linux-crypto,
	Pengutronix Kernel Team, Fabio Estevam, David S. Miller,
	linux-arm-kernel, NXP Linux Team

Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
which is very similar to the one used in i.mx8mq, i.mx8mm.

Since the clocks are identical for all members of i.MX 8M family,
simplify the SoC <--> clock array mapping table.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 drivers/crypto/caam/ctrl.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 6659c8d9672e..88a58a8fc533 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
 
 	if (ctrlpriv->virt_en == 1 ||
 	    /*
-	     * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
+	     * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
 	     * and the following steps should be performed regardless
 	     */
 	    of_machine_is_compatible("fsl,imx8mq") ||
-	    of_machine_is_compatible("fsl,imx8mm")) {
+	    of_machine_is_compatible("fsl,imx8mm") ||
+	    of_machine_is_compatible("fsl,imx8mn")) {
 		clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
 
 		while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
@@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
 	{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
 	{ .soc_id = "i.MX6*",  .data = &caam_imx6_data },
 	{ .soc_id = "i.MX7*",  .data = &caam_imx7_data },
-	{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
-	{ .soc_id = "i.MX8MM", .data = &caam_imx7_data },
+	{ .soc_id = "i.MX8M*", .data = &caam_imx7_data },
 	{ .family = "Freescale i.MX" },
 	{ /* sentinel */ }
 };
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] arm64: dts: imx8mn: add crypto node
  2020-01-06 20:01 ` Horia Geantă
@ 2020-01-06 20:01   ` Horia Geantă
  -1 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-01-06 20:01 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: David S. Miller, Aymen Sghaier, Pengutronix Kernel Team,
	Fabio Estevam, NXP Linux Team, linux-crypto, devicetree,
	linux-arm-kernel, linux-kernel

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index cce65b9a861f..c3fec19f4f05 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -537,6 +537,36 @@
 				status = "disabled";
 			};
 
+			crypto: crypto@30900000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MN_CLK_AHB>,
+					 <&clk IMX8MN_CLK_IPG_ROOT>;
+				clock-names = "aclk", "ipg";
+
+				sec_jr0: jr0@1000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x1000 0x1000>;
+					 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr1@2000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x2000 0x1000>;
+					 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr2@3000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x3000 0x1000>;
+					 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			i2c1: i2c@30a20000 {
 				compatible = "fsl,imx8mn-i2c", "fsl,imx21-i2c";
 				#address-cells = <1>;
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [PATCH 2/2] arm64: dts: imx8mn: add crypto node
@ 2020-01-06 20:01   ` Horia Geantă
  0 siblings, 0 replies; 10+ messages in thread
From: Horia Geantă @ 2020-01-06 20:01 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: devicetree, Aymen Sghaier, linux-kernel, linux-crypto,
	Pengutronix Kernel Team, Fabio Estevam, David S. Miller,
	linux-arm-kernel, NXP Linux Team

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index cce65b9a861f..c3fec19f4f05 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -537,6 +537,36 @@
 				status = "disabled";
 			};
 
+			crypto: crypto@30900000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MN_CLK_AHB>,
+					 <&clk IMX8MN_CLK_IPG_ROOT>;
+				clock-names = "aclk", "ipg";
+
+				sec_jr0: jr0@1000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x1000 0x1000>;
+					 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr1@2000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x2000 0x1000>;
+					 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr2@3000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x3000 0x1000>;
+					 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			i2c1: i2c@30a20000 {
 				compatible = "fsl,imx8mn-i2c", "fsl,imx21-i2c";
 				#address-cells = <1>;
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
  2020-01-06 20:01 ` Horia Geantă
@ 2020-01-07 13:40   ` Iuliana Prodan
  -1 siblings, 0 replies; 10+ messages in thread
From: Iuliana Prodan @ 2020-01-07 13:40 UTC (permalink / raw)
  To: Horia Geanta, Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: David S. Miller, Aymen Sghaier, Pengutronix Kernel Team,
	Fabio Estevam, dl-linux-imx, linux-crypto, devicetree,
	linux-arm-kernel, linux-kernel

On 1/6/2020 10:02 PM, Horia Geantă wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
> 
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

For the series:

Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>

> ---
>   drivers/crypto/caam/ctrl.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> index 6659c8d9672e..88a58a8fc533 100644
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
>   
>   	if (ctrlpriv->virt_en == 1 ||
>   	    /*
> -	     * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
> +	     * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
>   	     * and the following steps should be performed regardless
>   	     */
>   	    of_machine_is_compatible("fsl,imx8mq") ||
> -	    of_machine_is_compatible("fsl,imx8mm")) {
> +	    of_machine_is_compatible("fsl,imx8mm") ||
> +	    of_machine_is_compatible("fsl,imx8mn")) {
>   		clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
>   
>   		while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
> @@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
>   	{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
>   	{ .soc_id = "i.MX6*",  .data = &caam_imx6_data },
>   	{ .soc_id = "i.MX7*",  .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MM", .data = &caam_imx7_data },
> +	{ .soc_id = "i.MX8M*", .data = &caam_imx7_data },
>   	{ .family = "Freescale i.MX" },
>   	{ /* sentinel */ }
>   };
> 


^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
@ 2020-01-07 13:40   ` Iuliana Prodan
  0 siblings, 0 replies; 10+ messages in thread
From: Iuliana Prodan @ 2020-01-07 13:40 UTC (permalink / raw)
  To: Horia Geanta, Shawn Guo, Sascha Hauer, Herbert Xu
  Cc: devicetree, Aymen Sghaier, linux-kernel, linux-crypto,
	Pengutronix Kernel Team, Fabio Estevam, David S. Miller,
	linux-arm-kernel, dl-linux-imx

On 1/6/2020 10:02 PM, Horia Geantă wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
> 
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

For the series:

Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>

> ---
>   drivers/crypto/caam/ctrl.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> index 6659c8d9672e..88a58a8fc533 100644
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
>   
>   	if (ctrlpriv->virt_en == 1 ||
>   	    /*
> -	     * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
> +	     * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
>   	     * and the following steps should be performed regardless
>   	     */
>   	    of_machine_is_compatible("fsl,imx8mq") ||
> -	    of_machine_is_compatible("fsl,imx8mm")) {
> +	    of_machine_is_compatible("fsl,imx8mm") ||
> +	    of_machine_is_compatible("fsl,imx8mn")) {
>   		clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
>   
>   		while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
> @@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
>   	{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
>   	{ .soc_id = "i.MX6*",  .data = &caam_imx6_data },
>   	{ .soc_id = "i.MX7*",  .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MM", .data = &caam_imx7_data },
> +	{ .soc_id = "i.MX8M*", .data = &caam_imx7_data },
>   	{ .family = "Freescale i.MX" },
>   	{ /* sentinel */ }
>   };
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx8mn: add crypto node
  2020-01-06 20:01   ` Horia Geantă
@ 2020-01-09 10:42     ` Shawn Guo
  -1 siblings, 0 replies; 10+ messages in thread
From: Shawn Guo @ 2020-01-09 10:42 UTC (permalink / raw)
  To: Horia Geantă
  Cc: Sascha Hauer, Herbert Xu, David S. Miller, Aymen Sghaier,
	Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	linux-crypto, devicetree, linux-arm-kernel, linux-kernel

On Mon, Jan 06, 2020 at 10:01:54PM +0200, Horia Geantă wrote:
> Add node for CAAM - Cryptographic Acceleration and Assurance Module.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

Applied, thanks.

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] arm64: dts: imx8mn: add crypto node
@ 2020-01-09 10:42     ` Shawn Guo
  0 siblings, 0 replies; 10+ messages in thread
From: Shawn Guo @ 2020-01-09 10:42 UTC (permalink / raw)
  To: Horia Geantă
  Cc: devicetree, Aymen Sghaier, Herbert Xu, Sascha Hauer,
	linux-kernel, NXP Linux Team, Pengutronix Kernel Team,
	Fabio Estevam, David S. Miller, linux-arm-kernel, linux-crypto

On Mon, Jan 06, 2020 at 10:01:54PM +0200, Horia Geantă wrote:
> Add node for CAAM - Cryptographic Acceleration and Assurance Module.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>

Applied, thanks.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
  2020-01-06 20:01 ` Horia Geantă
@ 2020-01-16  7:28   ` Herbert Xu
  -1 siblings, 0 replies; 10+ messages in thread
From: Herbert Xu @ 2020-01-16  7:28 UTC (permalink / raw)
  To: Horia Geantă
  Cc: Shawn Guo, Sascha Hauer, David S. Miller, Aymen Sghaier,
	Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	linux-crypto, devicetree, linux-arm-kernel, linux-kernel

On Mon, Jan 06, 2020 at 10:01:53PM +0200, Horia Geantă wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
> 
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
>  drivers/crypto/caam/ctrl.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply	[flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano
@ 2020-01-16  7:28   ` Herbert Xu
  0 siblings, 0 replies; 10+ messages in thread
From: Herbert Xu @ 2020-01-16  7:28 UTC (permalink / raw)
  To: Horia Geantă
  Cc: devicetree, Aymen Sghaier, Shawn Guo, Sascha Hauer, linux-kernel,
	NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
	David S. Miller, linux-arm-kernel, linux-crypto

On Mon, Jan 06, 2020 at 10:01:53PM +0200, Horia Geantă wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
> 
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
>  drivers/crypto/caam/ctrl.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-01-16  7:29 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-06 20:01 [PATCH 1/2] crypto: caam - add support for i.MX8M Nano Horia Geantă
2020-01-06 20:01 ` Horia Geantă
2020-01-06 20:01 ` [PATCH 2/2] arm64: dts: imx8mn: add crypto node Horia Geantă
2020-01-06 20:01   ` Horia Geantă
2020-01-09 10:42   ` Shawn Guo
2020-01-09 10:42     ` Shawn Guo
2020-01-07 13:40 ` [PATCH 1/2] crypto: caam - add support for i.MX8M Nano Iuliana Prodan
2020-01-07 13:40   ` Iuliana Prodan
2020-01-16  7:28 ` Herbert Xu
2020-01-16  7:28   ` Herbert Xu

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