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[79.183.34.164]) by smtp.gmail.com with ESMTPSA id 21sm2859398qky.41.2020.01.09.04.02.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jan 2020 04:02:09 -0800 (PST) Date: Thu, 9 Jan 2020 07:02:03 -0500 From: "Michael S. Tsirkin" To: Eric Auger Subject: Re: [PATCH for-5.0 v11 19/20] pc: Add support for virtio-iommu-pci Message-ID: <20200109065832-mutt-send-email-mst@kernel.org> References: <20191122182943.4656-1-eric.auger@redhat.com> <20191122182943.4656-20-eric.auger@redhat.com> MIME-Version: 1.0 In-Reply-To: <20191122182943.4656-20-eric.auger@redhat.com> X-MC-Unique: l0Uge83GM_COQ3t0mbEr4g-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, peter.maydell@linaro.org, kevin.tian@intel.com, tnowicki@marvell.com, quintela@redhat.com, jean-philippe.brucker@arm.com, qemu-devel@nongnu.org, peterx@redhat.com, armbru@redhat.com, bharatb.linux@gmail.com, qemu-arm@nongnu.org, dgilbert@redhat.com, eric.auger.pro@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Nov 22, 2019 at 07:29:42PM +0100, Eric Auger wrote: > The virtio-iommu-pci is instantiated through the -device QEMU > option. However if instantiated it also requires an IORT ACPI table > to describe the ID mappings between the root complex and the iommu. >=20 > This patch adds the generation of the IORT table if the > virtio-iommu-pci device is instantiated. >=20 > We also declare the [0xfee00000 - 0xfeefffff] MSI reserved region > so that it gets bypassed by the IOMMU. >=20 > Signed-off-by: Eric Auger So I'd like us to use virtio config space in preference to ACPI. Guest bits for that are not ready yet, but I think it's better to wait than maintaining both ACPI and config space forever later. Could you send a smaller patchset without pci/acpi bits for now? > --- > hw/i386/acpi-build.c | 72 ++++++++++++++++++++++++++++++++++++++++++++ > hw/i386/pc.c | 15 ++++++++- > include/hw/i386/pc.h | 2 ++ > 3 files changed, 88 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index 12ff55fcfb..f09cabdcae 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -2744,6 +2744,72 @@ static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg) > return true; > } > =20 > +static inline void > +fill_iort_idmap(AcpiIortIdMapping *idmap, int i, > + uint32_t input_base, uint32_t id_count, > + uint32_t output_base, uint32_t output_reference) > +{ > + idmap[i].input_base =3D cpu_to_le32(input_base); > + idmap[i].id_count =3D cpu_to_le32(id_count); > + idmap[i].output_base =3D cpu_to_le32(output_base); > + idmap[i].output_reference =3D cpu_to_le32(output_reference); > +} > + > +static void > +build_iort(GArray *table_data, BIOSLinker *linker, PCMachineState *pcms) > +{ > + size_t iommu_node_size, rc_node_size, iommu_node_offset; > + int iort_start =3D table_data->len; > + AcpiIortPVIommuPCI *iommu; > + AcpiIortIdMapping *idmap; > + AcpiIortTable *iort; > + size_t iort_length; > + AcpiIortRC *rc; > + > + iort =3D acpi_data_push(table_data, sizeof(*iort)); > + iort_length =3D sizeof(*iort); > + iort->node_count =3D cpu_to_le32(2); > + > + /* virtio-iommu node */ > + > + iommu_node_offset =3D sizeof(*iort); > + iort->node_offset =3D cpu_to_le32(iommu_node_offset); > + iommu_node_size =3D sizeof(*iommu); > + iort_length +=3D iommu_node_offset; > + iommu =3D acpi_data_push(table_data, iommu_node_size); > + iommu->type =3D ACPI_IORT_NODE_PARAVIRT; > + iommu->length =3D cpu_to_le16(iommu_node_size); > + iommu->mapping_count =3D 0; > + iommu->devid =3D cpu_to_le32(pcms->virtio_iommu_bdf); > + iommu->model =3D cpu_to_le32(ACPI_IORT_NODE_PV_VIRTIO_IOMMU_PCI); > + > + /* Root Complex Node */ > + rc_node_size =3D sizeof(*rc) + 2 * sizeof(*idmap); > + iort_length +=3D rc_node_size; > + rc =3D acpi_data_push(table_data, rc_node_size); > + > + rc->type =3D ACPI_IORT_NODE_PCI_ROOT_COMPLEX; > + rc->length =3D cpu_to_le16(rc_node_size); > + rc->mapping_count =3D cpu_to_le32(2); > + rc->mapping_offset =3D cpu_to_le32(sizeof(*rc)); > + > + /* fully coherent device */ > + rc->memory_properties.cache_coherency =3D cpu_to_le32(1); > + rc->memory_properties.memory_flags =3D 0x3; /* CCA =3D CPM =3D DCAS = =3D 1 */ > + rc->pci_segment_number =3D 0; /* MCFG pci_segment */ > + fill_iort_idmap(rc->id_mapping_array, 0, 0, pcms->virtio_iommu_bdf, = 0, > + iommu_node_offset); > + fill_iort_idmap(rc->id_mapping_array, 1, pcms->virtio_iommu_bdf + 1, > + 0xFFFF - pcms->virtio_iommu_bdf, > + pcms->virtio_iommu_bdf + 1, iommu_node_offset); > + > + iort =3D (AcpiIortTable *)(table_data->data + iort_start); > + iort->length =3D cpu_to_le32(iort_length); > + > + build_header(linker, table_data, (void *)(table_data->data + iort_st= art), > + "IORT", table_data->len - iort_start, 0, NULL, NULL); > +} > + > static > void acpi_build(AcpiBuildTables *tables, MachineState *machine) > { > @@ -2835,6 +2901,12 @@ void acpi_build(AcpiBuildTables *tables, MachineSt= ate *machine) > build_slit(tables_blob, tables->linker, machine); > } > } > + > + if (pcms->virtio_iommu) { > + acpi_add_table(table_offsets, tables_blob); > + build_iort(tables_blob, tables->linker, pcms); > + } > + > if (acpi_get_mcfg(&mcfg)) { > acpi_add_table(table_offsets, tables_blob); > build_mcfg(tables_blob, tables->linker, &mcfg); > diff --git a/hw/i386/pc.c b/hw/i386/pc.c > index ac08e63604..af984ee041 100644 > --- a/hw/i386/pc.c > +++ b/hw/i386/pc.c > @@ -84,6 +84,7 @@ > #include "hw/net/ne2000-isa.h" > #include "standard-headers/asm-x86/bootparam.h" > #include "hw/virtio/virtio-pmem-pci.h" > +#include "hw/virtio/virtio-iommu.h" > #include "hw/mem/memory-device.h" > #include "sysemu/replay.h" > #include "qapi/qmp/qerror.h" > @@ -1940,6 +1941,11 @@ static void pc_machine_device_pre_plug_cb(HotplugH= andler *hotplug_dev, > pc_cpu_pre_plug(hotplug_dev, dev, errp); > } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) { > pc_virtio_pmem_pci_pre_plug(hotplug_dev, dev, errp); > + } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) = { > + /* we declare a VIRTIO_IOMMU_RESV_MEM_T_MSI region */ > + qdev_prop_set_uint32(dev, "len-reserved-regions", 1); > + qdev_prop_set_string(dev, "reserved-regions[0]", > + "0xfee00000, 0xfeefffff, 1"); > } > } > =20 > @@ -1952,6 +1958,12 @@ static void pc_machine_device_plug_cb(HotplugHandl= er *hotplug_dev, > pc_cpu_plug(hotplug_dev, dev, errp); > } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) { > pc_virtio_pmem_pci_plug(hotplug_dev, dev, errp); > + } else if (object_dynamic_cast(OBJECT(dev), "virtio-iommu-pci")) { > + PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); > + PCIDevice *pdev =3D PCI_DEVICE(dev); > + > + pcms->virtio_iommu =3D true; > + pcms->virtio_iommu_bdf =3D pci_get_bdf(pdev); > } > } > =20 > @@ -1990,7 +2002,8 @@ static HotplugHandler *pc_get_hotplug_handler(Machi= neState *machine, > { > if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || > object_dynamic_cast(OBJECT(dev), TYPE_CPU) || > - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI)) { > + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || > + object_dynamic_cast(OBJECT(dev), "virtio-iommu-pci")) { > return HOTPLUG_HANDLER(machine); > } > =20 > diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h > index 1f86eba3f9..221b4c6ef9 100644 > --- a/include/hw/i386/pc.h > +++ b/include/hw/i386/pc.h > @@ -49,6 +49,8 @@ struct PCMachineState { > bool smbus_enabled; > bool sata_enabled; > bool pit_enabled; > + bool virtio_iommu; > + uint16_t virtio_iommu_bdf; > =20 > /* NUMA information: */ > uint64_t numa_nodes; > --=20 > 2.20.1