From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>,
Hans de Goede <hdegoede@redhat.com>
Subject: Re: [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
Date: Thu, 9 Jan 2020 12:21:45 +0200 [thread overview]
Message-ID: <20200109102145.GC2838@lahna.fi.intel.com> (raw)
In-Reply-To: <20200109075329.398347-1-linus.walleij@linaro.org>
On Thu, Jan 09, 2020 at 08:53:28AM +0100, Linus Walleij wrote:
> When IRQ chip is instantiated via GPIO library flow, the few functions,
> in particular the ACPI event registration mechanism, on some of ACPI based
> platforms expect that the pin ranges are initialized to that point.
>
> Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.
>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
next prev parent reply other threads:[~2020-01-09 10:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
2020-01-09 10:22 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
2020-01-09 10:21 ` Mika Westerberg [this message]
2020-01-09 11:13 ` [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Andy Shevchenko
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