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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Currently, we are supporting block protection only for flash chips with 3 block protection bits in the SR register. This patch enables block protection support for some flash with 4 block protection bits(bp0-3). Signed-off-by: Jungseung Lee --- drivers/mtd/spi-nor/spi-nor.c | 90 +++++++++++++++++++++++++++++++---- include/linux/mtd/spi-nor.h | 8 ++++ 2 files changed, 88 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index e3da6a8654a8..214f3b733e9b 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -238,6 +238,14 @@ struct flash_info { * status register. Must be used with * SPI_NOR_HAS_TB. */ +#define SPI_NOR_HAS_BP3 BIT(17) /* + * Flash SR has 4 bit fields (BP0-3) + * for block protection. + */ +#define SPI_NOR_BP3_SR_BIT6 BIT(18) /* + * BP3 is bit 6 of status register. + * Must be used with SPI_NOR_HAS_BP3. + */ /* Part specific fixup hooks. */ const struct spi_nor_fixups *fixups; @@ -1766,24 +1774,48 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, { struct mtd_info *mtd = &nor->mtd; u8 mask = SR_BP2 | SR_BP1 | SR_BP0; - u8 tb_mask = SR_TB_BIT5; - int pow; + u8 tb_mask = SR_TB_BIT5, bp; + int pow = 0; if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) tb_mask = SR_TB_BIT6; - if (!(sr & mask)) { + if (nor->flags & SNOR_F_HAS_SR_BP3) { + u8 tmp; + + if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6) + tmp = sr & (mask | SR_BP3_BIT6); + else + tmp = sr & (mask | SR_BP3_BIT5); + + if (tmp & SR_BP3_BIT6) + tmp = (tmp & ~BIT(6)) | BIT(5); + + bp = tmp >> SR_BP_SHIFT; + } else { + bp = (sr & mask) >> SR_BP_SHIFT; + } + + if (!bp) { /* No protection */ *ofs = 0; *len = 0; + return; + } + + if (nor->flags & SNOR_F_HAS_SR_BP3) { + if (bp <= ilog2(nor->n_sectors)) + pow = ilog2(nor->n_sectors) + 1 - bp; } else { - pow = ((sr & mask) ^ mask) >> SR_BP_SHIFT; - *len = mtd->size >> pow; - if (nor->flags & SNOR_F_HAS_SR_TB && sr & tb_mask) - *ofs = 0; - else - *ofs = mtd->size - *len; + pow = bp ^ (mask >> SR_BP_SHIFT); } + + *len = mtd->size >> pow; + + if (nor->flags & SNOR_F_HAS_SR_TB && sr & tb_mask) + *ofs = 0; + else + *ofs = mtd->size - *len; } /* @@ -1898,6 +1930,12 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) tb_mask = SR_TB_BIT6; + if (nor->flags & SNOR_F_HAS_SR_BP3) { + if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6) + mask = mask | SR_BP3_BIT6; + else + mask = mask | SR_BP3_BIT5; + } /* * Need smallest pow such that: * @@ -1908,7 +1946,17 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len)) */ pow = ilog2(mtd->size) - ilog2(lock_len); - val = mask - (pow << SR_BP_SHIFT); + + if (nor->flags & SNOR_F_HAS_SR_BP3) { + val = ilog2(nor->n_sectors) + 1 - pow; + val = val << SR_BP_SHIFT; + + if (val & BIT(5) && mask & SR_BP3_BIT6) + val = (val & ~BIT(5)) | BIT(6); + } else { + val = mask - (pow << SR_BP_SHIFT); + } + if (val & ~mask) return -EINVAL; /* Don't "lock" with no region! */ @@ -1983,6 +2031,13 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) if (nor->flags & SNOR_F_HAS_SR_TB_BIT6) tb_mask = SR_TB_BIT6; + + if (nor->flags & SNOR_F_HAS_SR_BP3) { + if (nor->flags & SNOR_F_HAS_SR_BP3_BIT6) + mask = mask | SR_BP3_BIT6; + else + mask = mask | SR_BP3_BIT5; + } /* * Need largest pow such that: * @@ -1995,6 +2050,14 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) pow = ilog2(mtd->size) - order_base_2(lock_len); if (lock_len == 0) { val = 0; /* fully unlocked */ + } else if (nor->flags & SNOR_F_HAS_SR_BP3) { + val = ilog2(nor->n_sectors) - pow + 1; + val = val << SR_BP_SHIFT; + + if (val & BIT(5) && mask & SR_BP3_BIT6) + val = (val & ~BIT(5)) | BIT(6); + if (val & ~mask) + return -EINVAL; } else { val = mask - (pow << SR_BP_SHIFT); /* Some power-of-two sizes are not supported */ @@ -4736,6 +4799,7 @@ static void spi_nor_info_init_params(struct spi_nor *nor) /* Set SPI NOR sizes. */ params->size = (u64)info->sector_size * info->n_sectors; params->page_size = info->page_size; + params->n_sectors = info->n_sectors; if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ @@ -5192,6 +5256,11 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; if (info->flags & USE_CLSR) nor->flags |= SNOR_F_USE_CLSR; + if (info->flags & SPI_NOR_HAS_BP3) { + nor->flags |= SNOR_F_HAS_SR_BP3; + if (info->flags & SPI_NOR_BP3_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; + } if (info->flags & SPI_NOR_NO_ERASE) mtd->flags |= MTD_NO_ERASE; @@ -5199,6 +5268,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->dev.parent = dev; nor->page_size = params->page_size; mtd->writebufsize = nor->page_size; + nor->n_sectors = params->n_sectors; if (of_property_read_bool(np, "broken-flash-reset")) nor->flags |= SNOR_F_BROKEN_RESET; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 541c06d042e8..92d550501daf 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -129,7 +129,9 @@ #define SR_BP1 BIT(3) /* Block protect 1 */ #define SR_BP2 BIT(4) /* Block protect 2 */ #define SR_TB_BIT5 BIT(5) /* Top/Bottom protect */ +#define SR_BP3_BIT5 BIT(5) /* Block protect 3 */ #define SR_TB_BIT6 BIT(6) /* Top/Bottom protect */ +#define SR_BP3_BIT6 BIT(6) /* Block protect 3 */ #define SR_SRWD BIT(7) /* SR write protect */ /* Spansion/Cypress specific status bits */ #define SR_E_ERR BIT(5) @@ -248,6 +250,8 @@ enum spi_nor_option_flags { SNOR_F_HAS_16BIT_SR = BIT(9), SNOR_F_NO_READ_CR = BIT(10), SNOR_F_HAS_SR_TB_BIT6 = BIT(11), + SNOR_F_HAS_SR_BP3 = BIT(12), + SNOR_F_HAS_SR_BP3_BIT6 = BIT(13), }; @@ -519,6 +523,7 @@ struct spi_nor_locking_ops { * * @size: the flash memory density in bytes. * @page_size: the page size of the SPI NOR flash memory. + * @n_sectors: number of sectors * @hwcaps: describes the read and page program hardware * capabilities. * @reads: read capabilities ordered by priority: the higher index @@ -541,6 +546,7 @@ struct spi_nor_locking_ops { struct spi_nor_flash_parameter { u64 size; u32 page_size; + u16 n_sectors; struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; @@ -573,6 +579,7 @@ struct flash_info; * @bouncebuf_size: size of the bounce buffer * @info: spi-nor part JDEC MFR id and other info * @page_size: the page size of the SPI NOR + * @n_sector: number of sectors * @addr_width: number of address bytes * @erase_opcode: the opcode for erasing a sector * @read_opcode: the read opcode @@ -599,6 +606,7 @@ struct spi_nor { size_t bouncebuf_size; const struct flash_info *info; u32 page_size; + u16 n_sectors; u8 addr_width; u8 erase_opcode; u8 read_opcode; -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/