From: Andre Przywara <andre.przywara@arm.com> To: "David S . Miller" <davem@davemloft.net>, Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>, Robert Hancock <hancock@sedsystems.ca>, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 00/14] net: axienet: Error handling, SGMII and 64-bit DMA fixes Date: Fri, 10 Jan 2020 11:54:01 +0000 [thread overview] Message-ID: <20200110115415.75683-1-andre.przywara@arm.com> (raw) Hi, this series updates the Xilinx Axienet driver to work on our board here. One big issue was broken SGMII support, which patch 7 fixes. While debugging and understanding the driver, I found several problems in the error handling and cleanup paths, which patches 2-6 address. Patch 8 paves the way for newer revisions of the IP, the following patch adds mii-tool support, just for good measure. The next four patches add support for 64-bit DMA. This is an integration option on newer IP revisions (>= v7.1), and expects MSB bits in formerly reserved registers. Without writing to those MSB registers, the state machine won't trigger, so it's mandatory to access them, even if they are zero. Patches 10 and 11 prepare the code by adding accessors, to wrap this properly and keep it working on older IP revisions. Patch 12 enables access to the MSB registers, by trying to write a non-zero value to them and checking if that sticks. Older IP revisions always read those registers as zero. Patch 13 then adjusts the DMA mask, if it finds a "xlnx,addrwidth" property in the DMA DT node. I did not manage to autodetect this actual implemented DMA width, so we need to rely on a DT property. If this is missing, it will fall back to the current default of 32 bit. The final patch updates the DT binding documentation in this respect. The Xilinx PG138 and PG021 documents (in versions 7.1 in both cases) were used for this series. Please have a look and comment! Cheers, Andre Andre Przywara (14): net: xilinx: temac: Relax Kconfig dependencies net: axienet: Propagate failure of DMA descriptor setup net: axienet: Fix DMA descriptor cleanup path net: axienet: Improve DMA error handling net: axienet: Factor out TX descriptor chain cleanup net: axienet: Check for DMA mapping errors net: axienet: Fix SGMII support net: axienet: Drop MDIO interrupt registers from ethtools dump net: axienet: Add mii-tool support net: axienet: Wrap DMA pointer writes to prepare for 64 bit net: axienet: Upgrade descriptors to hold 64-bit addresses net: axienet: Autodetect 64-bit DMA capability net: axienet: Allow DMA to beyond 4GB net: axienet: Update devicetree binding documentation .../bindings/net/xilinx_axienet.txt | 57 ++- drivers/net/ethernet/xilinx/Kconfig | 1 - drivers/net/ethernet/xilinx/xilinx_axienet.h | 10 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 366 +++++++++++++----- 4 files changed, 328 insertions(+), 106 deletions(-) -- 2.17.1
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From: Andre Przywara <andre.przywara@arm.com> To: "David S . Miller" <davem@davemloft.net>, Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Cc: Robert Hancock <hancock@sedsystems.ca>, netdev@vger.kernel.org, Michal Simek <michal.simek@xilinx.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 00/14] net: axienet: Error handling, SGMII and 64-bit DMA fixes Date: Fri, 10 Jan 2020 11:54:01 +0000 [thread overview] Message-ID: <20200110115415.75683-1-andre.przywara@arm.com> (raw) Hi, this series updates the Xilinx Axienet driver to work on our board here. One big issue was broken SGMII support, which patch 7 fixes. While debugging and understanding the driver, I found several problems in the error handling and cleanup paths, which patches 2-6 address. Patch 8 paves the way for newer revisions of the IP, the following patch adds mii-tool support, just for good measure. The next four patches add support for 64-bit DMA. This is an integration option on newer IP revisions (>= v7.1), and expects MSB bits in formerly reserved registers. Without writing to those MSB registers, the state machine won't trigger, so it's mandatory to access them, even if they are zero. Patches 10 and 11 prepare the code by adding accessors, to wrap this properly and keep it working on older IP revisions. Patch 12 enables access to the MSB registers, by trying to write a non-zero value to them and checking if that sticks. Older IP revisions always read those registers as zero. Patch 13 then adjusts the DMA mask, if it finds a "xlnx,addrwidth" property in the DMA DT node. I did not manage to autodetect this actual implemented DMA width, so we need to rely on a DT property. If this is missing, it will fall back to the current default of 32 bit. The final patch updates the DT binding documentation in this respect. The Xilinx PG138 and PG021 documents (in versions 7.1 in both cases) were used for this series. Please have a look and comment! Cheers, Andre Andre Przywara (14): net: xilinx: temac: Relax Kconfig dependencies net: axienet: Propagate failure of DMA descriptor setup net: axienet: Fix DMA descriptor cleanup path net: axienet: Improve DMA error handling net: axienet: Factor out TX descriptor chain cleanup net: axienet: Check for DMA mapping errors net: axienet: Fix SGMII support net: axienet: Drop MDIO interrupt registers from ethtools dump net: axienet: Add mii-tool support net: axienet: Wrap DMA pointer writes to prepare for 64 bit net: axienet: Upgrade descriptors to hold 64-bit addresses net: axienet: Autodetect 64-bit DMA capability net: axienet: Allow DMA to beyond 4GB net: axienet: Update devicetree binding documentation .../bindings/net/xilinx_axienet.txt | 57 ++- drivers/net/ethernet/xilinx/Kconfig | 1 - drivers/net/ethernet/xilinx/xilinx_axienet.h | 10 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 366 +++++++++++++----- 4 files changed, 328 insertions(+), 106 deletions(-) -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-01-10 11:54 UTC|newest] Thread overview: 130+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-10 11:54 Andre Przywara [this message] 2020-01-10 11:54 ` [PATCH 00/14] net: axienet: Error handling, SGMII and 64-bit DMA fixes Andre Przywara 2020-01-10 11:54 ` [PATCH 01/14] net: xilinx: temac: Relax Kconfig dependencies Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 14:19 ` Radhey Shyam Pandey 2020-01-10 14:19 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 02/14] net: axienet: Propagate failure of DMA descriptor setup Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 14:54 ` Radhey Shyam Pandey 2020-01-10 14:54 ` Radhey Shyam Pandey 2020-01-10 17:53 ` Radhey Shyam Pandey 2020-01-10 17:53 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 03/14] net: axienet: Fix DMA descriptor cleanup path Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 15:14 ` Radhey Shyam Pandey 2020-01-10 15:14 ` Radhey Shyam Pandey 2020-01-10 15:43 ` Andre Przywara 2020-01-10 15:43 ` Andre Przywara 2020-01-10 17:05 ` Radhey Shyam Pandey 2020-01-10 17:05 ` Radhey Shyam Pandey 2020-01-16 18:03 ` Andre Przywara 2020-01-16 18:03 ` Andre Przywara 2020-01-20 18:32 ` Radhey Shyam Pandey 2020-01-20 18:32 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 04/14] net: axienet: Improve DMA error handling Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 15:26 ` Radhey Shyam Pandey 2020-01-10 15:26 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 05/14] net: axienet: Factor out TX descriptor chain cleanup Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 18:04 ` Radhey Shyam Pandey 2020-01-10 18:04 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 06/14] net: axienet: Check for DMA mapping errors Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-13 5:54 ` Radhey Shyam Pandey 2020-01-13 5:54 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 07/14] net: axienet: Fix SGMII support Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 14:04 ` Andrew Lunn 2020-01-10 14:04 ` Andrew Lunn 2020-01-10 14:20 ` Andre Przywara 2020-01-10 14:20 ` Andre Przywara 2020-01-10 14:26 ` Andrew Lunn 2020-01-10 14:26 ` Andrew Lunn 2020-01-10 15:04 ` Russell King - ARM Linux admin 2020-01-10 15:04 ` Russell King - ARM Linux admin 2020-01-10 15:22 ` Russell King - ARM Linux admin 2020-01-10 15:22 ` Russell King - ARM Linux admin 2020-01-10 17:04 ` Russell King - ARM Linux admin 2020-01-10 17:04 ` Russell King - ARM Linux admin 2020-01-18 11:22 ` Russell King - ARM Linux admin 2020-01-18 11:22 ` Russell King - ARM Linux admin 2020-01-20 14:50 ` Andre Przywara 2020-01-20 14:50 ` Andre Przywara 2020-01-20 15:45 ` Russell King - ARM Linux admin 2020-01-20 15:45 ` Russell King - ARM Linux admin 2020-01-27 17:04 ` Andre Przywara 2020-01-27 17:04 ` Andre Przywara 2020-01-27 17:20 ` Radhey Shyam Pandey 2020-01-27 17:20 ` Radhey Shyam Pandey 2020-01-27 18:53 ` Russell King - ARM Linux admin 2020-01-27 18:53 ` Russell King - ARM Linux admin 2020-04-22 1:45 ` Xilinx axienet 1000BaseX support (was: Re: [PATCH 07/14] net: axienet: Fix SGMII support) Robert Hancock 2020-04-22 1:45 ` Robert Hancock 2020-04-22 7:51 ` Russell King - ARM Linux admin 2020-04-22 7:51 ` Russell King - ARM Linux admin 2020-04-22 16:31 ` Xilinx axienet 1000BaseX support Robert Hancock 2020-04-22 16:31 ` Robert Hancock 2020-04-28 21:59 ` Robert Hancock 2020-04-28 21:59 ` Robert Hancock 2020-04-28 23:01 ` Russell King - ARM Linux admin 2020-04-28 23:01 ` Russell King - ARM Linux admin 2020-04-28 23:51 ` Robert Hancock 2020-04-28 23:51 ` Robert Hancock 2020-04-29 8:21 ` Russell King - ARM Linux admin 2020-04-29 8:21 ` Russell King - ARM Linux admin 2020-01-10 14:58 ` [PATCH 07/14] net: axienet: Fix SGMII support Russell King - ARM Linux admin 2020-01-10 14:58 ` Russell King - ARM Linux admin 2020-01-10 17:32 ` Andre Przywara 2020-01-10 17:32 ` Andre Przywara 2020-01-10 18:05 ` Russell King - ARM Linux admin 2020-01-10 18:05 ` Russell King - ARM Linux admin 2020-01-10 19:33 ` Andrew Lunn 2020-01-10 19:33 ` Andrew Lunn 2020-01-10 11:54 ` [PATCH 08/14] net: axienet: Drop MDIO interrupt registers from ethtools dump Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-13 6:02 ` Radhey Shyam Pandey 2020-01-13 6:02 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 09/14] net: axienet: Add mii-tool support Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-13 6:12 ` Radhey Shyam Pandey 2020-01-13 6:12 ` Radhey Shyam Pandey 2020-03-12 11:41 ` Andre Przywara 2020-03-12 11:41 ` Andre Przywara 2020-01-10 11:54 ` [PATCH 10/14] net: axienet: Wrap DMA pointer writes to prepare for 64 bit Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 11:54 ` [PATCH 11/14] net: axienet: Upgrade descriptors to hold 64-bit addresses Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-14 16:35 ` Radhey Shyam Pandey 2020-01-14 16:35 ` Radhey Shyam Pandey 2020-01-14 17:29 ` Andre Przywara 2020-01-14 17:29 ` Andre Przywara 2020-01-10 11:54 ` [PATCH 12/14] net: axienet: Autodetect 64-bit DMA capability Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 14:08 ` Andrew Lunn 2020-01-10 14:08 ` Andrew Lunn 2020-01-10 14:13 ` Andre Przywara 2020-01-10 14:13 ` Andre Przywara 2020-01-10 14:22 ` Andrew Lunn 2020-01-10 14:22 ` Andrew Lunn 2020-01-10 15:08 ` Andre Przywara 2020-01-10 15:08 ` Andre Przywara 2020-01-10 15:22 ` Andrew Lunn 2020-01-10 15:22 ` Andrew Lunn 2020-01-14 17:03 ` Radhey Shyam Pandey 2020-01-14 17:03 ` Radhey Shyam Pandey 2020-01-14 17:41 ` Andre Przywara 2020-01-14 17:41 ` Andre Przywara 2020-01-15 6:02 ` Radhey Shyam Pandey 2020-01-15 6:02 ` Radhey Shyam Pandey 2020-01-10 11:54 ` [PATCH 13/14] net: axienet: Allow DMA to beyond 4GB Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-10 11:54 ` [PATCH 14/14] net: axienet: Update devicetree binding documentation Andre Przywara 2020-01-10 11:54 ` Andre Przywara 2020-01-21 21:51 ` Rob Herring 2020-01-21 21:51 ` Rob Herring 2020-01-24 16:29 ` Andre Przywara 2020-01-24 16:29 ` Andre Przywara 2020-01-27 9:28 ` Radhey Shyam Pandey 2020-01-27 9:28 ` Radhey Shyam Pandey
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