From: Will Deacon <will@kernel.org> To: iommu@lists.linux-foundation.org Cc: Will Deacon <will@kernel.org>, kernel-team@android.com, Robin Murphy <robin.murphy@arm.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/8] iommu/io-pgtable-arm: Ensure non-cacheable mappings are Outer Shareable Date: Fri, 10 Jan 2020 15:28:47 +0000 [thread overview] Message-ID: <20200110152852.24259-4-will@kernel.org> (raw) In-Reply-To: <20200110152852.24259-1-will@kernel.org> The Armv7 ARM states that Normal, Non-cacheable mappings must explicitly be marked as Outer Shareable in order to avoid UNPREDICTABLE behaviour: | Overlaying the shareability attribute (B3-1377, ARM DDI 0406C.c) | | A memory region with a resultant memory type attribute of Normal, and | a resultant cacheability attribute of Inner Non-cacheable, Outer | Non-cacheable, must have a resultant shareability attribute of Outer | Shareable, otherwise shareability is UNPREDICTABLE Although this requirement doesn't appear to exist in the Armv8 docs, where the 'SH' field is simply ignored in this case, it's straightforward enough to set it here. Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org> --- drivers/iommu/io-pgtable-arm.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index ab440b52a5f4..4b437ead2300 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -303,9 +303,8 @@ static void __arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, if (data->iop.fmt != ARM_MALI_LPAE) pte |= ARM_LPAE_PTE_AF; - pte |= ARM_LPAE_PTE_SH_IS; - pte |= paddr_to_iopte(paddr, data); + pte |= paddr_to_iopte(paddr, data); __arm_lpae_set_pte(ptep, pte, &data->iop.cfg); } @@ -463,6 +462,11 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, if (prot & IOMMU_NOEXEC) pte |= ARM_LPAE_PTE_XN; + if (prot & IOMMU_CACHE) + pte |= ARM_LPAE_PTE_SH_IS; + else + pte |= ARM_LPAE_PTE_SH_OS; + return pte; } -- 2.25.0.rc1.283.g88dfdc4193-goog _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org> To: iommu@lists.linux-foundation.org Cc: Will Deacon <will@kernel.org>, Jordan Crouse <jcrouse@codeaurora.org>, kernel-team@android.com, Robin Murphy <robin.murphy@arm.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/8] iommu/io-pgtable-arm: Ensure non-cacheable mappings are Outer Shareable Date: Fri, 10 Jan 2020 15:28:47 +0000 [thread overview] Message-ID: <20200110152852.24259-4-will@kernel.org> (raw) In-Reply-To: <20200110152852.24259-1-will@kernel.org> The Armv7 ARM states that Normal, Non-cacheable mappings must explicitly be marked as Outer Shareable in order to avoid UNPREDICTABLE behaviour: | Overlaying the shareability attribute (B3-1377, ARM DDI 0406C.c) | | A memory region with a resultant memory type attribute of Normal, and | a resultant cacheability attribute of Inner Non-cacheable, Outer | Non-cacheable, must have a resultant shareability attribute of Outer | Shareable, otherwise shareability is UNPREDICTABLE Although this requirement doesn't appear to exist in the Armv8 docs, where the 'SH' field is simply ignored in this case, it's straightforward enough to set it here. Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org> --- drivers/iommu/io-pgtable-arm.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index ab440b52a5f4..4b437ead2300 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -303,9 +303,8 @@ static void __arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, if (data->iop.fmt != ARM_MALI_LPAE) pte |= ARM_LPAE_PTE_AF; - pte |= ARM_LPAE_PTE_SH_IS; - pte |= paddr_to_iopte(paddr, data); + pte |= paddr_to_iopte(paddr, data); __arm_lpae_set_pte(ptep, pte, &data->iop.cfg); } @@ -463,6 +462,11 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, if (prot & IOMMU_NOEXEC) pte |= ARM_LPAE_PTE_XN; + if (prot & IOMMU_CACHE) + pte |= ARM_LPAE_PTE_SH_IS; + else + pte |= ARM_LPAE_PTE_SH_OS; + return pte; } -- 2.25.0.rc1.283.g88dfdc4193-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-10 15:29 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-10 15:28 [PATCH 0/8] Finish off the split page table prep work Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 1/8] iommu/io-pgtable-arm: Rationalise TTBRn handling Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 2/8] iommu/io-pgtable-arm: Support non-coherent stage-2 page tables Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` Will Deacon [this message] 2020-01-10 15:28 ` [PATCH 3/8] iommu/io-pgtable-arm: Ensure non-cacheable mappings are Outer Shareable Will Deacon 2020-01-10 15:28 ` [PATCH 4/8] iommu/io-pgtable-arm: Ensure ARM_64_LPAE_S2_TCR_RES1 is unsigned Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 5/8] iommu/io-pgtable-arm: Rationalise TCR handling Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 6/8] iommu/arm-smmu: Rename public #defines under ARM_SMMU_ namespace Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 7/8] iommu/io-pgtable-arm: Rationalise VTCR handling Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-01-10 15:28 ` [PATCH 8/8] iommu/io-pgtable-arm: Prepare for TTBR1 usage Will Deacon 2020-01-10 15:28 ` Will Deacon 2020-02-19 12:27 ` Stephan Gerhold 2020-02-19 12:27 ` Stephan Gerhold 2020-02-19 17:51 ` Robin Murphy 2020-02-19 17:51 ` Robin Murphy
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