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From: Borislav Petkov <bp@alien8.de>
To: Dave Jiang <dave.jiang@intel.com>
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	vkoul@kernel.org, dan.j.williams@intel.com, tony.luck@intel.com,
	jing.lin@intel.com, ashok.raj@intel.com,
	sanjay.k.kumar@intel.com, megha.dey@intel.com,
	jacob.jun.pan@intel.com, yi.l.liu@intel.com, tglx@linutronix.de,
	mingo@redhat.com, fenghua.yu@intel.com, hpa@zytor.com
Subject: Re: [PATCH v4 1/9] x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction
Date: Mon, 13 Jan 2020 11:14:03 +0100	[thread overview]
Message-ID: <20200113101403.GD13310@zn.tnic> (raw)
In-Reply-To: <157842965854.27241.2519525691634439881.stgit@djiang5-desk3.ch.intel.com>

On Tue, Jan 07, 2020 at 01:40:58PM -0700, Dave Jiang wrote:
> With the introduction of MOVDIR64B instruction, there is now an instruction
> that can write 64 bytes of data atomically.
> 
> Quoting from Intel SDM:
> "There is no atomicity guarantee provided for the 64-byte load operation
> from source address, and processor implementations may use multiple
> load operations to read the 64-bytes. The 64-byte direct-store issued
> by MOVDIR64B guarantees 64-byte write-completion atomicity. This means
> that the data arrives at the destination in a single undivided 64-byte
> write transaction."
> 
> We have identified at least 3 different use cases for this instruction in
> the format of func(dst, src, count):
> 1) Clear poison / Initialize MKTME memory
>    @dst is normal memory.
>    @src in normal memory. Does not increment. (Copy same line to all
>    targets)
>    @count (to clear/init multiple lines)
> 2) Submit command(s) to new devices
>    @dst is a special MMIO region for a device. Does not increment.
>    @src is normal memory. Increments.
>    @count usually is 1, but can be multiple.
> 3) Copy to iomem in big chunks
>    @dst is iomem and increments
>    @src in normal memory and increments
>    @count is number of chunks to copy
> 
> Add support for case #2 to support device that will accept commands via
> this instruction. We provide a @count in order to submit a batch of
> preprogrammed descriptors in virtually contiguous memory. This
> allows the caller to submit multiple descriptors to a devices with a single

						  "to a device"

> submission. The special device requires the entire 64bytes descriptor to
> be written atomically and will accept MOVDIR64B instruction.
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>

but the above can be fixed by whoever applies this.

Acked-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2020-01-13 10:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-07 20:40 [PATCH v4 0/9] idxd driver for Intel Data Streaming Accelerator Dave Jiang
2020-01-07 20:40 ` [PATCH v4 1/9] x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction Dave Jiang
2020-01-13 10:14   ` Borislav Petkov [this message]
2020-01-07 20:41 ` [PATCH v4 2/9] dmaengine: break out channel registration Dave Jiang
2020-01-07 20:41 ` [PATCH v4 3/9] dmaengine: add new dma device registration Dave Jiang
2020-01-07 20:41 ` [PATCH v4 4/9] dmaengine: idxd: Init and probe for Intel data accelerators Dave Jiang
2020-01-07 20:41 ` [PATCH v4 5/9] dmaengine: idxd: add configuration component of driver Dave Jiang
2020-01-07 20:41 ` [PATCH v4 6/9] dmaengine: idxd: add sysfs ABI for idxd driver Dave Jiang
2020-01-07 20:41 ` [PATCH v4 7/9] dmaengine: idxd: add descriptor manipulation routines Dave Jiang
2020-01-07 20:41 ` [PATCH v4 8/9] dmaengine: idxd: connect idxd to dmaengine subsystem Dave Jiang
2020-01-07 20:41 ` [PATCH v4 9/9] dmaengine: idxd: add char driver to expose submission portal to userland Dave Jiang
2020-01-21  9:15 ` [PATCH v4 0/9] idxd driver for Intel Data Streaming Accelerator Vinod Koul
2020-01-21 17:46   ` Dave Jiang

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