* [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner
@ 2020-01-13 14:40 Christian König
2020-01-13 14:40 ` [PATCH 2/8] drm/amdgpu: explicitly sync VM update to PDs/PTs Christian König
` (7 more replies)
0 siblings, 8 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
Entirely unused.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 1 -
3 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 614919f265b9..c4a8148b9b6f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1233,7 +1233,6 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
goto error_abort;
}
- job->owner = p->filp;
p->fence = dma_fence_get(&job->base.s_fence->finished);
amdgpu_ctx_add_fence(p->ctx, entity, p->fence, &seq);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 73328d0c741d..d42be880a236 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -153,7 +153,6 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
if (r)
return r;
- job->owner = owner;
*f = dma_fence_get(&job->base.s_fence->finished);
amdgpu_job_free_resources(job);
priority = job->base.s_priority;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
index aa0e375062f2..31c4444b0203 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
@@ -49,7 +49,6 @@ struct amdgpu_job {
uint32_t preamble_status;
uint32_t preemption_status;
uint32_t num_ibs;
- void *owner;
bool vm_needs_flush;
uint64_t vm_pd_addr;
unsigned vmid;
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/8] drm/amdgpu: explicitly sync VM update to PDs/PTs
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 14:40 ` [PATCH 3/8] drm/amdgpu: use the VM as job owner Christian König
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
Explicitly sync VM updates to the moving fence in PDs and PTs.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 7 +++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 5 +++++
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
index 73fec7a0ced5..68b013be3837 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
@@ -86,6 +86,13 @@ static int amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p,
{
unsigned int i;
uint64_t value;
+ int r;
+
+ if (bo->tbo.moving) {
+ r = dma_fence_wait(bo->tbo.moving, true);
+ if (r)
+ return r;
+ }
pe += (unsigned long)amdgpu_bo_kptr(bo);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index 19b7f80758f1..4bbd8ff778ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@ -208,6 +208,11 @@ static int amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p,
uint64_t *pte;
int r;
+ /* Wait for PD/PT moves to be completed */
+ r = amdgpu_sync_fence(&p->job->sync, bo->tbo.moving, false);
+ if (r)
+ return r;
+
do {
ndw = p->num_dw_left;
ndw -= p->job->ibs->length_dw;
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/8] drm/amdgpu: use the VM as job owner
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
2020-01-13 14:40 ` [PATCH 2/8] drm/amdgpu: explicitly sync VM update to PDs/PTs Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 14:40 ` [PATCH 4/8] drm/amdgpu: rework job synchronization Christian König
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
For HMM we need to rework how VM synchronization works, so instead of the filp use VM as job owner.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index c4a8148b9b6f..cf79f30c0af6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -655,6 +655,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
{
+ struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
struct amdgpu_bo_list_entry *e;
int r;
@@ -662,7 +663,7 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
struct dma_resv *resv = bo->tbo.base.resv;
- r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp,
+ r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, &fpriv->vm,
amdgpu_bo_explicit_sync(bo));
if (r)
@@ -1210,7 +1211,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
job = p->job;
p->job = NULL;
- r = drm_sched_job_init(&job->base, entity, p->filp);
+ r = drm_sched_job_init(&job->base, entity, &fpriv->vm);
if (r)
goto error_unlock;
--
2.17.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/8] drm/amdgpu: rework job synchronization
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
2020-01-13 14:40 ` [PATCH 2/8] drm/amdgpu: explicitly sync VM update to PDs/PTs Christian König
2020-01-13 14:40 ` [PATCH 3/8] drm/amdgpu: use the VM as job owner Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 17:16 ` Felix Kuehling
2020-01-13 14:40 ` [PATCH 5/8] drm/amdgpu: rework synchronization of VM updates v2 Christian König
` (4 subsequent siblings)
7 siblings, 1 reply; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
For unlocked page table updates we need to be able
to sync to fences of a specific VM.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 6 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 49 ++++++++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 15 ++++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 2 +-
8 files changed, 59 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index d8db5ecdf9c1..9e7889c28f3e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -848,9 +848,9 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
vm_list_node) {
struct amdgpu_bo *pd = peer_vm->root.base.bo;
- ret = amdgpu_sync_resv(NULL,
- sync, pd->tbo.base.resv,
- AMDGPU_FENCE_OWNER_KFD, false);
+ ret = amdgpu_sync_resv(NULL, sync, pd->tbo.base.resv,
+ AMDGPU_SYNC_NE_OWNER,
+ AMDGPU_FENCE_OWNER_KFD);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index cf79f30c0af6..d7b5efaa091c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -662,10 +662,12 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
list_for_each_entry(e, &p->validated, tv.head) {
struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
struct dma_resv *resv = bo->tbo.base.resv;
+ enum amdgpu_sync_mode sync_mode;
- r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, &fpriv->vm,
- amdgpu_bo_explicit_sync(bo));
-
+ sync_mode = amdgpu_bo_explicit_sync(bo) ?
+ AMDGPU_SYNC_EXPLICIT : AMDGPU_SYNC_NE_OWNER;
+ r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, sync_mode,
+ &fpriv->vm);
if (r)
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index ca9f74585890..46c76e2e1281 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1419,7 +1419,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
int r;
amdgpu_sync_create(&sync);
- amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv, owner, false);
+ amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv,
+ AMDGPU_SYNC_NE_OWNER, owner);
r = amdgpu_sync_wait(&sync, intr);
amdgpu_sync_free(&sync);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index a09b6b9c27d1..c124f64e7aae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -202,18 +202,17 @@ int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
*
* @sync: sync object to add fences from reservation object to
* @resv: reservation object with embedded fence
- * @explicit_sync: true if we should only sync to the exclusive fence
+ * @mode: how owner affects which fences we sync to
+ * @owner: owner of the planned job submission
*
* Sync to the fence
*/
-int amdgpu_sync_resv(struct amdgpu_device *adev,
- struct amdgpu_sync *sync,
- struct dma_resv *resv,
- void *owner, bool explicit_sync)
+int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
+ struct dma_resv *resv, enum amdgpu_sync_mode mode,
+ void *owner)
{
struct dma_resv_list *flist;
struct dma_fence *f;
- void *fence_owner;
unsigned i;
int r = 0;
@@ -229,6 +228,8 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
return r;
for (i = 0; i < flist->shared_count; ++i) {
+ void *fence_owner;
+
f = rcu_dereference_protected(flist->shared[i],
dma_resv_held(resv));
/* We only want to trigger KFD eviction fences on
@@ -239,20 +240,34 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
owner != AMDGPU_FENCE_OWNER_UNDEFINED)
continue;
- if (amdgpu_sync_same_dev(adev, f)) {
- /* VM updates only sync with moves but not with user
- * command submissions or KFD evictions fences
- */
- if (owner == AMDGPU_FENCE_OWNER_VM &&
- fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED)
+ /* VM updates only sync with moves but not with user
+ * command submissions or KFD evictions fences
+ */
+ if (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
+ owner == AMDGPU_FENCE_OWNER_VM)
+ continue;
+
+ /* Ignore fences depending on the sync mode */
+ switch (mode) {
+ case AMDGPU_SYNC_ALWAYS:
+ break;
+
+ case AMDGPU_SYNC_NE_OWNER:
+ if (amdgpu_sync_same_dev(adev, f) &&
+ fence_owner == owner)
continue;
+ break;
- /* Ignore fence from the same owner and explicit one as
- * long as it isn't undefined.
- */
- if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
- (fence_owner == owner || explicit_sync))
+ case AMDGPU_SYNC_EQ_OWNER:
+ if (amdgpu_sync_same_dev(adev, f) &&
+ fence_owner != owner)
+ continue;
+ break;
+
+ case AMDGPU_SYNC_EXPLICIT:
+ if (owner != AMDGPU_FENCE_OWNER_UNDEFINED)
continue;
+ break;
}
r = amdgpu_sync_fence(sync, f, false);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
index d62c2b81d92b..cfbe5788b8b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
@@ -31,6 +31,13 @@ struct dma_resv;
struct amdgpu_device;
struct amdgpu_ring;
+enum amdgpu_sync_mode {
+ AMDGPU_SYNC_ALWAYS,
+ AMDGPU_SYNC_NE_OWNER,
+ AMDGPU_SYNC_EQ_OWNER,
+ AMDGPU_SYNC_EXPLICIT
+};
+
/*
* Container for fences used to sync command submissions.
*/
@@ -43,11 +50,9 @@ void amdgpu_sync_create(struct amdgpu_sync *sync);
int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
bool explicit);
int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
-int amdgpu_sync_resv(struct amdgpu_device *adev,
- struct amdgpu_sync *sync,
- struct dma_resv *resv,
- void *owner,
- bool explicit_sync);
+int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
+ struct dma_resv *resv, enum amdgpu_sync_mode mode,
+ void *owner);
struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
struct amdgpu_ring *ring);
struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index a3012edffd7a..ae1b00def5d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -2080,8 +2080,8 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
}
if (resv) {
r = amdgpu_sync_resv(adev, &job->sync, resv,
- AMDGPU_FENCE_OWNER_UNDEFINED,
- false);
+ AMDGPU_SYNC_ALWAYS,
+ AMDGPU_FENCE_OWNER_UNDEFINED);
if (r) {
DRM_ERROR("sync failed (%d).\n", r);
goto error_free;
@@ -2165,7 +2165,8 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
if (resv) {
r = amdgpu_sync_resv(adev, &job->sync, resv,
- AMDGPU_FENCE_OWNER_UNDEFINED, false);
+ AMDGPU_SYNC_ALWAYS,
+ AMDGPU_FENCE_OWNER_UNDEFINED);
if (r) {
DRM_ERROR("sync failed (%d).\n", r);
goto error_free;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index a92f3b18e657..11e8bec6582b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1099,7 +1099,8 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
goto err_free;
} else {
r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.base.resv,
- AMDGPU_FENCE_OWNER_UNDEFINED, false);
+ AMDGPU_SYNC_NE_OWNER,
+ AMDGPU_FENCE_OWNER_UNDEFINED);
if (r)
goto err_free;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index 4bbd8ff778ea..3b61317c0f08 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@ -80,7 +80,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
return 0;
return amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.base.resv,
- owner, false);
+ AMDGPU_SYNC_NE_OWNER, owner);
}
/**
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/8] drm/amdgpu: rework synchronization of VM updates v2
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
` (2 preceding siblings ...)
2020-01-13 14:40 ` [PATCH 4/8] drm/amdgpu: rework job synchronization Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 14:40 ` [PATCH 6/8] drm/amdgpu: stop using amdgpu_bo_gpu_offset in the VM backend Christian König
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
If provided we only sync to the BOs reservation
object and no longer to the root PD.
v2: update comment, cleanup amdgpu_bo_sync_wait_resv
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 37 +++++++++++++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 7 ----
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 38 ++++++++++++---------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c | 22 +++---------
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 15 +++-----
7 files changed, 65 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 46c76e2e1281..c70bbdda078c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1403,30 +1403,51 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
}
/**
- * amdgpu_sync_wait_resv - Wait for BO reservation fences
+ * amdgpu_bo_sync_wait_resv - Wait for BO reservation fences
*
- * @bo: buffer object
+ * @adev: amdgpu device pointer
+ * @resv: reservation object to sync to
+ * @sync_mode: synchronization mode
* @owner: fence owner
* @intr: Whether the wait is interruptible
*
+ * Extract the fences from the reservation object and waits for them to finish.
+ *
* Returns:
* 0 on success, errno otherwise.
*/
-int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
+int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
+ enum amdgpu_sync_mode sync_mode, void *owner,
+ bool intr)
{
- struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
struct amdgpu_sync sync;
int r;
amdgpu_sync_create(&sync);
- amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv,
- AMDGPU_SYNC_NE_OWNER, owner);
- r = amdgpu_sync_wait(&sync, intr);
+ amdgpu_sync_resv(adev, &sync, resv, sync_mode, owner);
+ r = amdgpu_sync_wait(&sync, true);
amdgpu_sync_free(&sync);
-
return r;
}
+/**
+ * amdgpu_bo_sync_wait - Wrapper for amdgpu_bo_sync_wait_resv
+ * @bo: buffer object to wait for
+ * @owner: fence owner
+ * @intr: Whether the wait is interruptible
+ *
+ * Wrapper to wait for fences in a BO.
+ * Returns:
+ * 0 on success, errno otherwise.
+ */
+int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
+{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+
+ return amdgpu_bo_sync_wait_resv(adev, bo->tbo.base.resv,
+ AMDGPU_SYNC_NE_OWNER, owner, intr);
+}
+
/**
* amdgpu_bo_gpu_offset - return GPU offset of bo
* @bo: amdgpu object for which we query the offset
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 2eeafc77c9c1..96d805889e8d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -283,6 +283,9 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo);
int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
bool shared);
+int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
+ enum amdgpu_sync_mode sync_mode, void *owner,
+ bool intr);
int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo);
int amdgpu_bo_validate(struct amdgpu_bo *bo);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
index c124f64e7aae..5816df9f8531 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
@@ -240,13 +240,6 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
owner != AMDGPU_FENCE_OWNER_UNDEFINED)
continue;
- /* VM updates only sync with moves but not with user
- * command submissions or KFD evictions fences
- */
- if (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
- owner == AMDGPU_FENCE_OWNER_VM)
- continue;
-
/* Ignore fences depending on the sync mode */
switch (mode) {
case AMDGPU_SYNC_ALWAYS:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b999b67ff57a..55165a44e4bb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -777,7 +777,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
params.vm = vm;
params.direct = direct;
- r = vm->update_funcs->prepare(¶ms, AMDGPU_FENCE_OWNER_KFD, NULL);
+ r = vm->update_funcs->prepare(¶ms, NULL, AMDGPU_SYNC_EXPLICIT);
if (r)
return r;
@@ -1273,7 +1273,7 @@ int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
params.vm = vm;
params.direct = direct;
- r = vm->update_funcs->prepare(¶ms, AMDGPU_FENCE_OWNER_VM, NULL);
+ r = vm->update_funcs->prepare(¶ms, NULL, AMDGPU_SYNC_EXPLICIT);
if (r)
return r;
@@ -1524,7 +1524,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
* @adev: amdgpu_device pointer
* @vm: requested vm
* @direct: direct submission in a page fault
- * @exclusive: fence we need to sync to
+ * @resv: fences we need to sync to
* @start: start of mapped range
* @last: last mapped entry
* @flags: flags for the entries
@@ -1539,14 +1539,14 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
*/
static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
struct amdgpu_vm *vm, bool direct,
- struct dma_fence *exclusive,
+ struct dma_resv *resv,
uint64_t start, uint64_t last,
uint64_t flags, uint64_t addr,
dma_addr_t *pages_addr,
struct dma_fence **fence)
{
struct amdgpu_vm_update_params params;
- void *owner = AMDGPU_FENCE_OWNER_VM;
+ enum amdgpu_sync_mode sync_mode;
int r;
memset(¶ms, 0, sizeof(params));
@@ -1555,9 +1555,13 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
params.direct = direct;
params.pages_addr = pages_addr;
- /* sync to everything except eviction fences on unmapping */
+ /* Implicitly sync to command submissions in the same VM before
+ * unmapping. Sync to moving fences before mapping.
+ */
if (!(flags & AMDGPU_PTE_VALID))
- owner = AMDGPU_FENCE_OWNER_KFD;
+ sync_mode = AMDGPU_SYNC_EQ_OWNER;
+ else
+ sync_mode = AMDGPU_SYNC_EXPLICIT;
mutex_lock(&vm->eviction_lock);
if (vm->evicting) {
@@ -1565,7 +1569,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
goto error_unlock;
}
- r = vm->update_funcs->prepare(¶ms, owner, exclusive);
+ r = vm->update_funcs->prepare(¶ms, resv, sync_mode);
if (r)
goto error_unlock;
@@ -1584,7 +1588,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
* amdgpu_vm_bo_split_mapping - split a mapping into smaller chunks
*
* @adev: amdgpu_device pointer
- * @exclusive: fence we need to sync to
+ * @resv: fences we need to sync to
* @pages_addr: DMA addresses to use for mapping
* @vm: requested vm
* @mapping: mapped range and flags to use for the update
@@ -1600,7 +1604,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
* 0 for success, -EINVAL for failure.
*/
static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
- struct dma_fence *exclusive,
+ struct dma_resv *resv,
dma_addr_t *pages_addr,
struct amdgpu_vm *vm,
struct amdgpu_bo_va_mapping *mapping,
@@ -1676,7 +1680,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
}
last = min((uint64_t)mapping->last, start + max_entries - 1);
- r = amdgpu_vm_bo_update_mapping(adev, vm, false, exclusive,
+ r = amdgpu_vm_bo_update_mapping(adev, vm, false, resv,
start, last, flags, addr,
dma_addr, fence);
if (r)
@@ -1715,7 +1719,8 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
dma_addr_t *pages_addr = NULL;
struct ttm_mem_reg *mem;
struct drm_mm_node *nodes;
- struct dma_fence *exclusive, **last_update;
+ struct dma_fence **last_update;
+ struct dma_resv *resv;
uint64_t flags;
struct amdgpu_device *bo_adev = adev;
int r;
@@ -1723,7 +1728,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
if (clear || !bo) {
mem = NULL;
nodes = NULL;
- exclusive = NULL;
} else {
struct ttm_dma_tt *ttm;
@@ -1733,7 +1737,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
ttm = container_of(bo->tbo.ttm, struct ttm_dma_tt, ttm);
pages_addr = ttm->dma_address;
}
- exclusive = bo->tbo.moving;
}
if (bo) {
@@ -1743,11 +1746,14 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
flags |= AMDGPU_PTE_TMZ;
bo_adev = amdgpu_ttm_adev(bo->tbo.bdev);
+ resv = bo->tbo.base.resv;
} else {
flags = 0x0;
+ resv = NULL;
}
- if (clear || (bo && bo->tbo.base.resv == vm->root.base.bo->tbo.base.resv))
+ if (clear || (bo && bo->tbo.base.resv ==
+ vm->root.base.bo->tbo.base.resv))
last_update = &vm->last_update;
else
last_update = &bo_va->last_pt_update;
@@ -1761,7 +1767,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
}
list_for_each_entry(mapping, &bo_va->invalids, list) {
- r = amdgpu_vm_bo_split_mapping(adev, exclusive, pages_addr, vm,
+ r = amdgpu_vm_bo_split_mapping(adev, resv, pages_addr, vm,
mapping, flags, bo_adev, nodes,
last_update);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 100547f094ff..f2557aee2c81 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -229,8 +229,8 @@ struct amdgpu_vm_update_params {
struct amdgpu_vm_update_funcs {
int (*map_table)(struct amdgpu_bo *bo);
- int (*prepare)(struct amdgpu_vm_update_params *p, void * owner,
- struct dma_fence *exclusive);
+ int (*prepare)(struct amdgpu_vm_update_params *p, struct dma_resv *resv,
+ enum amdgpu_sync_mode sync_mode);
int (*update)(struct amdgpu_vm_update_params *p,
struct amdgpu_bo *bo, uint64_t pe, uint64_t addr,
unsigned count, uint32_t incr, uint64_t flags);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
index 68b013be3837..e38516304070 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c
@@ -44,26 +44,14 @@ static int amdgpu_vm_cpu_map_table(struct amdgpu_bo *table)
* Returns:
* Negativ errno, 0 for success.
*/
-static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p, void *owner,
- struct dma_fence *exclusive)
+static int amdgpu_vm_cpu_prepare(struct amdgpu_vm_update_params *p,
+ struct dma_resv *resv,
+ enum amdgpu_sync_mode sync_mode)
{
- int r;
-
- /* Wait for any BO move to be completed */
- if (exclusive) {
- r = dma_fence_wait(exclusive, true);
- if (unlikely(r))
- return r;
- }
-
- /* Don't wait for submissions during page fault */
- if (p->direct)
+ if (!resv)
return 0;
- /* Wait for PT BOs to be idle. PTs share the same resv. object
- * as the root PD BO
- */
- return amdgpu_bo_sync_wait(p->vm->root.base.bo, owner, true);
+ return amdgpu_bo_sync_wait_resv(p->adev, resv, sync_mode, p->vm, true);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index 3b61317c0f08..e7a383134521 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@ -58,9 +58,9 @@ static int amdgpu_vm_sdma_map_table(struct amdgpu_bo *table)
* Negativ errno, 0 for success.
*/
static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
- void *owner, struct dma_fence *exclusive)
+ struct dma_resv *resv,
+ enum amdgpu_sync_mode sync_mode)
{
- struct amdgpu_bo *root = p->vm->root.base.bo;
unsigned int ndw = AMDGPU_VM_SDMA_MIN_NUM_DW;
int r;
@@ -70,17 +70,10 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
p->num_dw_left = ndw;
- /* Wait for moves to be completed */
- r = amdgpu_sync_fence(&p->job->sync, exclusive, false);
- if (r)
- return r;
-
- /* Don't wait for any submissions during page fault handling */
- if (p->direct)
+ if (!resv)
return 0;
- return amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.base.resv,
- AMDGPU_SYNC_NE_OWNER, owner);
+ return amdgpu_sync_resv(p->adev, &p->job->sync, resv, sync_mode, p->vm);
}
/**
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 6/8] drm/amdgpu: stop using amdgpu_bo_gpu_offset in the VM backend
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
` (3 preceding siblings ...)
2020-01-13 14:40 ` [PATCH 5/8] drm/amdgpu: rework synchronization of VM updates v2 Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 14:40 ` [PATCH 7/8] drm/amdgpu: drop unnecessary restriction for huge root PDEs Christian König
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
We need to update page tables without any lock held.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index e7a383134521..4cc7881f438c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@ -140,7 +140,7 @@ static void amdgpu_vm_sdma_copy_ptes(struct amdgpu_vm_update_params *p,
src += p->num_dw_left * 4;
- pe += amdgpu_bo_gpu_offset(bo);
+ pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
trace_amdgpu_vm_copy_ptes(pe, src, count, p->direct);
amdgpu_vm_copy_pte(p->adev, ib, pe, src, count);
@@ -167,7 +167,7 @@ static void amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p,
{
struct amdgpu_ib *ib = p->job->ibs;
- pe += amdgpu_bo_gpu_offset(bo);
+ pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->direct);
if (count < 3) {
amdgpu_vm_write_pte(p->adev, ib, pe, addr | flags,
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 7/8] drm/amdgpu: drop unnecessary restriction for huge root PDEs
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
` (4 preceding siblings ...)
2020-01-13 14:40 ` [PATCH 6/8] drm/amdgpu: stop using amdgpu_bo_gpu_offset in the VM backend Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 14:40 ` [PATCH 8/8] drm/amdgpu: make sure to never allocate PDs/PTs for invalidations Christian König
2020-01-13 18:56 ` [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Felix Kuehling
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
The root PD can also contain huge PDEs.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 25 +++++--------------------
1 file changed, 5 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 55165a44e4bb..4de9b3300870 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -94,23 +94,17 @@ struct amdgpu_prt_cb {
static unsigned amdgpu_vm_level_shift(struct amdgpu_device *adev,
unsigned level)
{
- unsigned shift = 0xff;
-
switch (level) {
case AMDGPU_VM_PDB2:
case AMDGPU_VM_PDB1:
case AMDGPU_VM_PDB0:
- shift = 9 * (AMDGPU_VM_PDB0 - level) +
+ return 9 * (AMDGPU_VM_PDB0 - level) +
adev->vm_manager.block_size;
- break;
case AMDGPU_VM_PTB:
- shift = 0;
- break;
+ return 0;
default:
- dev_err(adev->dev, "the level%d isn't supported.\n", level);
+ return ~0;
}
-
- return shift;
}
/**
@@ -1432,13 +1426,6 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
pt = cursor.entry->base.bo;
- /* The root level can't be a huge page */
- if (cursor.level == adev->vm_manager.root_level) {
- if (!amdgpu_vm_pt_descendant(adev, &cursor))
- return -ENOENT;
- continue;
- }
-
shift = amdgpu_vm_level_shift(adev, cursor.level);
parent_shift = amdgpu_vm_level_shift(adev, cursor.level - 1);
if (adev->asic_type < CHIP_VEGA10 &&
@@ -1457,11 +1444,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
if (!amdgpu_vm_pt_descendant(adev, &cursor))
return -ENOENT;
continue;
- } else if (frag >= parent_shift &&
- cursor.level - 1 != adev->vm_manager.root_level) {
+ } else if (frag >= parent_shift) {
/* If the fragment size is even larger than the parent
- * shift we should go up one level and check it again
- * unless one level up is the root level.
+ * shift we should go up one level and check it again.
*/
if (!amdgpu_vm_pt_ancestor(&cursor))
return -ENOENT;
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 8/8] drm/amdgpu: make sure to never allocate PDs/PTs for invalidations
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
` (5 preceding siblings ...)
2020-01-13 14:40 ` [PATCH 7/8] drm/amdgpu: drop unnecessary restriction for huge root PDEs Christian König
@ 2020-01-13 14:40 ` Christian König
2020-01-13 18:56 ` [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Felix Kuehling
7 siblings, 0 replies; 10+ messages in thread
From: Christian König @ 2020-01-13 14:40 UTC (permalink / raw)
To: amd-gfx, Alex.Sierra, Philip.Yang, felix.kuehling
Make sure that we never allocate a page table for an invalidation operation.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 4de9b3300870..9af5bde885a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1416,15 +1416,15 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
uint64_t incr, entry_end, pe_start;
struct amdgpu_bo *pt;
- /* make sure that the page tables covering the address range are
- * actually allocated
- */
- r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor,
- params->direct);
- if (r)
- return r;
-
- pt = cursor.entry->base.bo;
+ if (flags & AMDGPU_PTE_VALID) {
+ /* make sure that the page tables covering the
+ * address range are actually allocated
+ */
+ r = amdgpu_vm_alloc_pts(params->adev, params->vm,
+ &cursor, params->direct);
+ if (r)
+ return r;
+ }
shift = amdgpu_vm_level_shift(adev, cursor.level);
parent_shift = amdgpu_vm_level_shift(adev, cursor.level - 1);
@@ -1453,6 +1453,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
continue;
}
+ pt = cursor.entry->base.bo;
+ if (!pt)
+ return -ENOENT;
+
/* Looks good so far, calculate parameters for the update */
incr = (uint64_t)AMDGPU_GPU_PAGE_SIZE << shift;
mask = amdgpu_vm_entries_mask(adev, cursor.level);
--
2.17.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 4/8] drm/amdgpu: rework job synchronization
2020-01-13 14:40 ` [PATCH 4/8] drm/amdgpu: rework job synchronization Christian König
@ 2020-01-13 17:16 ` Felix Kuehling
0 siblings, 0 replies; 10+ messages in thread
From: Felix Kuehling @ 2020-01-13 17:16 UTC (permalink / raw)
To: Christian König, amd-gfx, Alex.Sierra, Philip.Yang
On 2020-01-13 9:40 a.m., Christian König wrote:
> For unlocked page table updates we need to be able
> to sync to fences of a specific VM.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 6 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 8 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 49 ++++++++++++-------
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 15 ++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 2 +-
> 8 files changed, 59 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> index d8db5ecdf9c1..9e7889c28f3e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
> @@ -848,9 +848,9 @@ static int process_sync_pds_resv(struct amdkfd_process_info *process_info,
> vm_list_node) {
> struct amdgpu_bo *pd = peer_vm->root.base.bo;
>
> - ret = amdgpu_sync_resv(NULL,
> - sync, pd->tbo.base.resv,
> - AMDGPU_FENCE_OWNER_KFD, false);
> + ret = amdgpu_sync_resv(NULL, sync, pd->tbo.base.resv,
> + AMDGPU_SYNC_NE_OWNER,
> + AMDGPU_FENCE_OWNER_KFD);
> if (ret)
> return ret;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index cf79f30c0af6..d7b5efaa091c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -662,10 +662,12 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p)
> list_for_each_entry(e, &p->validated, tv.head) {
> struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
> struct dma_resv *resv = bo->tbo.base.resv;
> + enum amdgpu_sync_mode sync_mode;
>
> - r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, &fpriv->vm,
> - amdgpu_bo_explicit_sync(bo));
> -
> + sync_mode = amdgpu_bo_explicit_sync(bo) ?
> + AMDGPU_SYNC_EXPLICIT : AMDGPU_SYNC_NE_OWNER;
> + r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, sync_mode,
> + &fpriv->vm);
> if (r)
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index ca9f74585890..46c76e2e1281 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -1419,7 +1419,8 @@ int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
> int r;
>
> amdgpu_sync_create(&sync);
> - amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv, owner, false);
> + amdgpu_sync_resv(adev, &sync, bo->tbo.base.resv,
> + AMDGPU_SYNC_NE_OWNER, owner);
> r = amdgpu_sync_wait(&sync, intr);
> amdgpu_sync_free(&sync);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> index a09b6b9c27d1..c124f64e7aae 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
> @@ -202,18 +202,17 @@ int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
> *
> * @sync: sync object to add fences from reservation object to
> * @resv: reservation object with embedded fence
> - * @explicit_sync: true if we should only sync to the exclusive fence
> + * @mode: how owner affects which fences we sync to
> + * @owner: owner of the planned job submission
> *
> * Sync to the fence
> */
> -int amdgpu_sync_resv(struct amdgpu_device *adev,
> - struct amdgpu_sync *sync,
> - struct dma_resv *resv,
> - void *owner, bool explicit_sync)
> +int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
> + struct dma_resv *resv, enum amdgpu_sync_mode mode,
> + void *owner)
> {
> struct dma_resv_list *flist;
> struct dma_fence *f;
> - void *fence_owner;
> unsigned i;
> int r = 0;
>
> @@ -229,6 +228,8 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
> return r;
>
> for (i = 0; i < flist->shared_count; ++i) {
> + void *fence_owner;
> +
> f = rcu_dereference_protected(flist->shared[i],
> dma_resv_held(resv));
> /* We only want to trigger KFD eviction fences on
> @@ -239,20 +240,34 @@ int amdgpu_sync_resv(struct amdgpu_device *adev,
> owner != AMDGPU_FENCE_OWNER_UNDEFINED)
> continue;
>
> - if (amdgpu_sync_same_dev(adev, f)) {
> - /* VM updates only sync with moves but not with user
> - * command submissions or KFD evictions fences
> - */
> - if (owner == AMDGPU_FENCE_OWNER_VM &&
> - fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED)
> + /* VM updates only sync with moves but not with user
> + * command submissions or KFD evictions fences
> + */
> + if (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
> + owner == AMDGPU_FENCE_OWNER_VM)
> + continue;
> +
> + /* Ignore fences depending on the sync mode */
> + switch (mode) {
> + case AMDGPU_SYNC_ALWAYS:
> + break;
> +
> + case AMDGPU_SYNC_NE_OWNER:
> + if (amdgpu_sync_same_dev(adev, f) &&
> + fence_owner == owner)
> continue;
> + break;
>
> - /* Ignore fence from the same owner and explicit one as
> - * long as it isn't undefined.
> - */
> - if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
> - (fence_owner == owner || explicit_sync))
> + case AMDGPU_SYNC_EQ_OWNER:
> + if (amdgpu_sync_same_dev(adev, f) &&
> + fence_owner != owner)
> + continue;
> + break;
> +
> + case AMDGPU_SYNC_EXPLICIT:
> + if (owner != AMDGPU_FENCE_OWNER_UNDEFINED)
> continue;
> + break;
> }
>
> r = amdgpu_sync_fence(sync, f, false);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> index d62c2b81d92b..cfbe5788b8b9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
> @@ -31,6 +31,13 @@ struct dma_resv;
> struct amdgpu_device;
> struct amdgpu_ring;
>
> +enum amdgpu_sync_mode {
> + AMDGPU_SYNC_ALWAYS,
> + AMDGPU_SYNC_NE_OWNER,
> + AMDGPU_SYNC_EQ_OWNER,
> + AMDGPU_SYNC_EXPLICIT
> +};
> +
> /*
> * Container for fences used to sync command submissions.
> */
> @@ -43,11 +50,9 @@ void amdgpu_sync_create(struct amdgpu_sync *sync);
> int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
> bool explicit);
> int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
> -int amdgpu_sync_resv(struct amdgpu_device *adev,
> - struct amdgpu_sync *sync,
> - struct dma_resv *resv,
> - void *owner,
> - bool explicit_sync);
> +int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
> + struct dma_resv *resv, enum amdgpu_sync_mode mode,
> + void *owner);
> struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
> struct amdgpu_ring *ring);
> struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index a3012edffd7a..ae1b00def5d8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -2080,8 +2080,8 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
> }
> if (resv) {
> r = amdgpu_sync_resv(adev, &job->sync, resv,
> - AMDGPU_FENCE_OWNER_UNDEFINED,
> - false);
> + AMDGPU_SYNC_ALWAYS,
> + AMDGPU_FENCE_OWNER_UNDEFINED);
> if (r) {
> DRM_ERROR("sync failed (%d).\n", r);
> goto error_free;
> @@ -2165,7 +2165,8 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
>
> if (resv) {
> r = amdgpu_sync_resv(adev, &job->sync, resv,
> - AMDGPU_FENCE_OWNER_UNDEFINED, false);
> + AMDGPU_SYNC_ALWAYS,
> + AMDGPU_FENCE_OWNER_UNDEFINED);
> if (r) {
> DRM_ERROR("sync failed (%d).\n", r);
> goto error_free;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> index a92f3b18e657..11e8bec6582b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
> @@ -1099,7 +1099,8 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
> goto err_free;
> } else {
> r = amdgpu_sync_resv(adev, &job->sync, bo->tbo.base.resv,
> - AMDGPU_FENCE_OWNER_UNDEFINED, false);
> + AMDGPU_SYNC_NE_OWNER,
Should this be AMDGPU_SYNC_ALWAYS? I think that's closer to the original
behaviour.
Regards,
Felix
> + AMDGPU_FENCE_OWNER_UNDEFINED);
> if (r)
> goto err_free;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> index 4bbd8ff778ea..3b61317c0f08 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
> @@ -80,7 +80,7 @@ static int amdgpu_vm_sdma_prepare(struct amdgpu_vm_update_params *p,
> return 0;
>
> return amdgpu_sync_resv(p->adev, &p->job->sync, root->tbo.base.resv,
> - owner, false);
> + AMDGPU_SYNC_NE_OWNER, owner);
> }
>
> /**
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
` (6 preceding siblings ...)
2020-01-13 14:40 ` [PATCH 8/8] drm/amdgpu: make sure to never allocate PDs/PTs for invalidations Christian König
@ 2020-01-13 18:56 ` Felix Kuehling
7 siblings, 0 replies; 10+ messages in thread
From: Felix Kuehling @ 2020-01-13 18:56 UTC (permalink / raw)
To: Christian König, amd-gfx, Alex.Sierra, Philip.Yang
I replied with one question about patch 4. Other than that the series is
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
On 2020-01-13 9:40 a.m., Christian König wrote:
> Entirely unused.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.h | 1 -
> 3 files changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 614919f265b9..c4a8148b9b6f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -1233,7 +1233,6 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
> goto error_abort;
> }
>
> - job->owner = p->filp;
> p->fence = dma_fence_get(&job->base.s_fence->finished);
>
> amdgpu_ctx_add_fence(p->ctx, entity, p->fence, &seq);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index 73328d0c741d..d42be880a236 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -153,7 +153,6 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
> if (r)
> return r;
>
> - job->owner = owner;
> *f = dma_fence_get(&job->base.s_fence->finished);
> amdgpu_job_free_resources(job);
> priority = job->base.s_priority;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
> index aa0e375062f2..31c4444b0203 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
> @@ -49,7 +49,6 @@ struct amdgpu_job {
> uint32_t preamble_status;
> uint32_t preemption_status;
> uint32_t num_ibs;
> - void *owner;
> bool vm_needs_flush;
> uint64_t vm_pd_addr;
> unsigned vmid;
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-01-13 18:57 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-13 14:40 [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Christian König
2020-01-13 14:40 ` [PATCH 2/8] drm/amdgpu: explicitly sync VM update to PDs/PTs Christian König
2020-01-13 14:40 ` [PATCH 3/8] drm/amdgpu: use the VM as job owner Christian König
2020-01-13 14:40 ` [PATCH 4/8] drm/amdgpu: rework job synchronization Christian König
2020-01-13 17:16 ` Felix Kuehling
2020-01-13 14:40 ` [PATCH 5/8] drm/amdgpu: rework synchronization of VM updates v2 Christian König
2020-01-13 14:40 ` [PATCH 6/8] drm/amdgpu: stop using amdgpu_bo_gpu_offset in the VM backend Christian König
2020-01-13 14:40 ` [PATCH 7/8] drm/amdgpu: drop unnecessary restriction for huge root PDEs Christian König
2020-01-13 14:40 ` [PATCH 8/8] drm/amdgpu: make sure to never allocate PDs/PTs for invalidations Christian König
2020-01-13 18:56 ` [PATCH 1/8] drm/amdgpu: drop amdgpu_job.owner Felix Kuehling
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