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From: Andrew Jones <drjones@redhat.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: eric.auger.pro@gmail.com, maz@kernel.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	andre.przywara@arm.com, peter.maydell@linaro.org,
	yuzenghui@huawei.com, alexandru.elisei@arm.com, thuth@redhat.com
Subject: Re: [kvm-unit-tests PATCH v2 07/16] arm/arm64: ITS: Set the LPI config and pending tables
Date: Mon, 13 Jan 2020 18:31:14 +0100	[thread overview]
Message-ID: <20200113173114.4cjfqebzrfb7iepg@kamzik.brq.redhat.com> (raw)
In-Reply-To: <20200110145412.14937-8-eric.auger@redhat.com>

On Fri, Jan 10, 2020 at 03:54:03PM +0100, Eric Auger wrote:
> Allocate the LPI configuration and per re-distributor pending table.
> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
> by default in the config table.
> 
> Also introduce a helper routine that allows to set the pending table
> bit for a given LPI.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
> ---
> 
> v1 -> v2:
> - remove memory attributes
> ---
>  lib/arm/asm/gic-v3-its.h |  3 ++
>  lib/arm/asm/gic-v3.h     | 12 ++++++++
>  lib/arm/gic-v3-its.c     | 60 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 75 insertions(+)
> 
> diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h
> index 5a4dfe9..2f8b8f1 100644
> --- a/lib/arm/asm/gic-v3-its.h
> +++ b/lib/arm/asm/gic-v3-its.h
> @@ -90,6 +90,9 @@ extern void its_init(void);
>  extern int its_parse_baser(int i, struct its_baser *baser);
>  extern void its_setup_baser(int i, struct its_baser *baser);
>  extern struct its_baser *its_lookup_baser(int type);
> +extern void set_lpi_config(int n, u8 val);
> +extern u8 get_lpi_config(int n);
> +extern void set_pending_table_bit(int rdist, int n, bool set);

Please prefix with 'its' or at least swap the 'lpi' and verb. E.g.
lpi_set_config, its_set_pending_table_bit.


>  
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM_GIC_V3_ITS_H_ */
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
> index ffb2e26..90a7304 100644
> --- a/lib/arm/asm/gic-v3.h
> +++ b/lib/arm/asm/gic-v3.h
> @@ -48,6 +48,16 @@
>  #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
>  	(MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>  
> +#define GICR_PROPBASER_IDBITS_MASK                      (0x1f)
> +
> +#define GICR_PENDBASER_PTZ                              BIT_ULL(62)
> +
> +#define LPI_PROP_GROUP1		(1 << 1)
> +#define LPI_PROP_ENABLED	(1 << 0)
> +#define LPI_PROP_DEFAULT_PRIO   0xa0
> +#define LPI_PROP_DEFAULT	(LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
> +				 LPI_PROP_ENABLED)
> +
>  #include <asm/arch_gicv3.h>
>  
>  #ifndef __ASSEMBLY__
> @@ -64,6 +74,8 @@ struct gicv3_data {
>  	void *dist_base;
>  	void *redist_bases[GICV3_NR_REDISTS];
>  	void *redist_base[NR_CPUS];
> +	void *lpi_prop;
> +	void *lpi_pend[NR_CPUS];
>  	unsigned int irq_nr;
>  };
>  extern struct gicv3_data gicv3_data;
> diff --git a/lib/arm/gic-v3-its.c b/lib/arm/gic-v3-its.c
> index 79946c3..6c97569 100644
> --- a/lib/arm/gic-v3-its.c
> +++ b/lib/arm/gic-v3-its.c
> @@ -117,3 +117,63 @@ void its_setup_baser(int i, struct its_baser *baser)
>  	writeq(val, gicv3_its_base() + GITS_BASER + i * 8);
>  }
>  
> +inline void set_lpi_config(int n, u8 value)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	*entry = value;
> +}
> +
> +inline u8 get_lpi_config(int n)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	return *entry;
> +}

Probably don't need the 'inline', but ok.

> +
> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
> +void alloc_lpi_tables(void);
> +void alloc_lpi_tables(void)

Why not add this to the header (renamed to lpi_alloc_tables)? Or should
this function be static?

> +{
> +	unsigned long n = SZ_64K >> PAGE_SHIFT;
> +	unsigned long order = fls(n);
> +	u64 prop_val;
> +	int cpu;
> +
> +	gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
> +
> +	/* ID bits = 13, ie. up to 14b LPI INTID */
> +	prop_val = (u64)gicv3_data.lpi_prop | 13;
> +
> +	/*
> +	 * Allocate pending tables for each redistributor
> +	 * and set PROPBASER and PENDBASER
> +	 */
> +	for_each_present_cpu(cpu) {
> +		u64 pend_val;
> +		void *ptr;
> +
> +		ptr = gicv3_data.redist_base[cpu];
> +
> +		writeq(prop_val, ptr + GICR_PROPBASER);
> +
> +		gicv3_data.lpi_pend[cpu] =
> +			(void *)virt_to_phys(alloc_pages(order));

nit: I think these line brakes on = or worse than going over 80 chars.
And, you don't need to worry about 80 chars anyway. See the README, we
allow 120.

> +
> +		pend_val = (u64)gicv3_data.lpi_pend[cpu];
> +
> +		writeq(pend_val, ptr + GICR_PENDBASER);
> +	}
> +}
> +
> +void set_pending_table_bit(int rdist, int n, bool set)
> +{
> +	u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
> +	u8 mask = 1 << (n % 8), byte;
> +
> +	ptr += (n / 8);
> +	byte = *ptr;
> +	if (set)
> +		byte |=  mask;
> +	else
> +		byte &= ~mask;
> +	*ptr = byte;
> +}
> -- 
> 2.20.1
> 

Thanks,
drew


WARNING: multiple messages have this Message-ID
From: Andrew Jones <drjones@redhat.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: peter.maydell@linaro.org, thuth@redhat.com, kvm@vger.kernel.org,
	maz@kernel.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	andre.przywara@arm.com, yuzenghui@huawei.com,
	alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu,
	eric.auger.pro@gmail.com
Subject: Re: [kvm-unit-tests PATCH v2 07/16] arm/arm64: ITS: Set the LPI config and pending tables
Date: Mon, 13 Jan 2020 18:31:14 +0100	[thread overview]
Message-ID: <20200113173114.4cjfqebzrfb7iepg@kamzik.brq.redhat.com> (raw)
In-Reply-To: <20200110145412.14937-8-eric.auger@redhat.com>

On Fri, Jan 10, 2020 at 03:54:03PM +0100, Eric Auger wrote:
> Allocate the LPI configuration and per re-distributor pending table.
> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
> by default in the config table.
> 
> Also introduce a helper routine that allows to set the pending table
> bit for a given LPI.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
> ---
> 
> v1 -> v2:
> - remove memory attributes
> ---
>  lib/arm/asm/gic-v3-its.h |  3 ++
>  lib/arm/asm/gic-v3.h     | 12 ++++++++
>  lib/arm/gic-v3-its.c     | 60 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 75 insertions(+)
> 
> diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h
> index 5a4dfe9..2f8b8f1 100644
> --- a/lib/arm/asm/gic-v3-its.h
> +++ b/lib/arm/asm/gic-v3-its.h
> @@ -90,6 +90,9 @@ extern void its_init(void);
>  extern int its_parse_baser(int i, struct its_baser *baser);
>  extern void its_setup_baser(int i, struct its_baser *baser);
>  extern struct its_baser *its_lookup_baser(int type);
> +extern void set_lpi_config(int n, u8 val);
> +extern u8 get_lpi_config(int n);
> +extern void set_pending_table_bit(int rdist, int n, bool set);

Please prefix with 'its' or at least swap the 'lpi' and verb. E.g.
lpi_set_config, its_set_pending_table_bit.


>  
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM_GIC_V3_ITS_H_ */
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
> index ffb2e26..90a7304 100644
> --- a/lib/arm/asm/gic-v3.h
> +++ b/lib/arm/asm/gic-v3.h
> @@ -48,6 +48,16 @@
>  #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
>  	(MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>  
> +#define GICR_PROPBASER_IDBITS_MASK                      (0x1f)
> +
> +#define GICR_PENDBASER_PTZ                              BIT_ULL(62)
> +
> +#define LPI_PROP_GROUP1		(1 << 1)
> +#define LPI_PROP_ENABLED	(1 << 0)
> +#define LPI_PROP_DEFAULT_PRIO   0xa0
> +#define LPI_PROP_DEFAULT	(LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
> +				 LPI_PROP_ENABLED)
> +
>  #include <asm/arch_gicv3.h>
>  
>  #ifndef __ASSEMBLY__
> @@ -64,6 +74,8 @@ struct gicv3_data {
>  	void *dist_base;
>  	void *redist_bases[GICV3_NR_REDISTS];
>  	void *redist_base[NR_CPUS];
> +	void *lpi_prop;
> +	void *lpi_pend[NR_CPUS];
>  	unsigned int irq_nr;
>  };
>  extern struct gicv3_data gicv3_data;
> diff --git a/lib/arm/gic-v3-its.c b/lib/arm/gic-v3-its.c
> index 79946c3..6c97569 100644
> --- a/lib/arm/gic-v3-its.c
> +++ b/lib/arm/gic-v3-its.c
> @@ -117,3 +117,63 @@ void its_setup_baser(int i, struct its_baser *baser)
>  	writeq(val, gicv3_its_base() + GITS_BASER + i * 8);
>  }
>  
> +inline void set_lpi_config(int n, u8 value)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	*entry = value;
> +}
> +
> +inline u8 get_lpi_config(int n)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	return *entry;
> +}

Probably don't need the 'inline', but ok.

> +
> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
> +void alloc_lpi_tables(void);
> +void alloc_lpi_tables(void)

Why not add this to the header (renamed to lpi_alloc_tables)? Or should
this function be static?

> +{
> +	unsigned long n = SZ_64K >> PAGE_SHIFT;
> +	unsigned long order = fls(n);
> +	u64 prop_val;
> +	int cpu;
> +
> +	gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
> +
> +	/* ID bits = 13, ie. up to 14b LPI INTID */
> +	prop_val = (u64)gicv3_data.lpi_prop | 13;
> +
> +	/*
> +	 * Allocate pending tables for each redistributor
> +	 * and set PROPBASER and PENDBASER
> +	 */
> +	for_each_present_cpu(cpu) {
> +		u64 pend_val;
> +		void *ptr;
> +
> +		ptr = gicv3_data.redist_base[cpu];
> +
> +		writeq(prop_val, ptr + GICR_PROPBASER);
> +
> +		gicv3_data.lpi_pend[cpu] =
> +			(void *)virt_to_phys(alloc_pages(order));

nit: I think these line brakes on = or worse than going over 80 chars.
And, you don't need to worry about 80 chars anyway. See the README, we
allow 120.

> +
> +		pend_val = (u64)gicv3_data.lpi_pend[cpu];
> +
> +		writeq(pend_val, ptr + GICR_PENDBASER);
> +	}
> +}
> +
> +void set_pending_table_bit(int rdist, int n, bool set)
> +{
> +	u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
> +	u8 mask = 1 << (n % 8), byte;
> +
> +	ptr += (n / 8);
> +	byte = *ptr;
> +	if (set)
> +		byte |=  mask;
> +	else
> +		byte &= ~mask;
> +	*ptr = byte;
> +}
> -- 
> 2.20.1
> 

Thanks,
drew



WARNING: multiple messages have this Message-ID
From: Andrew Jones <drjones@redhat.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: thuth@redhat.com, kvm@vger.kernel.org, maz@kernel.org,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	andre.przywara@arm.com, kvmarm@lists.cs.columbia.edu,
	eric.auger.pro@gmail.com
Subject: Re: [kvm-unit-tests PATCH v2 07/16] arm/arm64: ITS: Set the LPI config and pending tables
Date: Mon, 13 Jan 2020 18:31:14 +0100	[thread overview]
Message-ID: <20200113173114.4cjfqebzrfb7iepg@kamzik.brq.redhat.com> (raw)
In-Reply-To: <20200110145412.14937-8-eric.auger@redhat.com>

On Fri, Jan 10, 2020 at 03:54:03PM +0100, Eric Auger wrote:
> Allocate the LPI configuration and per re-distributor pending table.
> Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
> by default in the config table.
> 
> Also introduce a helper routine that allows to set the pending table
> bit for a given LPI.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
> ---
> 
> v1 -> v2:
> - remove memory attributes
> ---
>  lib/arm/asm/gic-v3-its.h |  3 ++
>  lib/arm/asm/gic-v3.h     | 12 ++++++++
>  lib/arm/gic-v3-its.c     | 60 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 75 insertions(+)
> 
> diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h
> index 5a4dfe9..2f8b8f1 100644
> --- a/lib/arm/asm/gic-v3-its.h
> +++ b/lib/arm/asm/gic-v3-its.h
> @@ -90,6 +90,9 @@ extern void its_init(void);
>  extern int its_parse_baser(int i, struct its_baser *baser);
>  extern void its_setup_baser(int i, struct its_baser *baser);
>  extern struct its_baser *its_lookup_baser(int type);
> +extern void set_lpi_config(int n, u8 val);
> +extern u8 get_lpi_config(int n);
> +extern void set_pending_table_bit(int rdist, int n, bool set);

Please prefix with 'its' or at least swap the 'lpi' and verb. E.g.
lpi_set_config, its_set_pending_table_bit.


>  
>  #endif /* !__ASSEMBLY__ */
>  #endif /* _ASMARM_GIC_V3_ITS_H_ */
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
> index ffb2e26..90a7304 100644
> --- a/lib/arm/asm/gic-v3.h
> +++ b/lib/arm/asm/gic-v3.h
> @@ -48,6 +48,16 @@
>  #define MPIDR_TO_SGI_AFFINITY(cluster_id, level) \
>  	(MPIDR_AFFINITY_LEVEL(cluster_id, level) << ICC_SGI1R_AFFINITY_## level ## _SHIFT)
>  
> +#define GICR_PROPBASER_IDBITS_MASK                      (0x1f)
> +
> +#define GICR_PENDBASER_PTZ                              BIT_ULL(62)
> +
> +#define LPI_PROP_GROUP1		(1 << 1)
> +#define LPI_PROP_ENABLED	(1 << 0)
> +#define LPI_PROP_DEFAULT_PRIO   0xa0
> +#define LPI_PROP_DEFAULT	(LPI_PROP_DEFAULT_PRIO | LPI_PROP_GROUP1 | \
> +				 LPI_PROP_ENABLED)
> +
>  #include <asm/arch_gicv3.h>
>  
>  #ifndef __ASSEMBLY__
> @@ -64,6 +74,8 @@ struct gicv3_data {
>  	void *dist_base;
>  	void *redist_bases[GICV3_NR_REDISTS];
>  	void *redist_base[NR_CPUS];
> +	void *lpi_prop;
> +	void *lpi_pend[NR_CPUS];
>  	unsigned int irq_nr;
>  };
>  extern struct gicv3_data gicv3_data;
> diff --git a/lib/arm/gic-v3-its.c b/lib/arm/gic-v3-its.c
> index 79946c3..6c97569 100644
> --- a/lib/arm/gic-v3-its.c
> +++ b/lib/arm/gic-v3-its.c
> @@ -117,3 +117,63 @@ void its_setup_baser(int i, struct its_baser *baser)
>  	writeq(val, gicv3_its_base() + GITS_BASER + i * 8);
>  }
>  
> +inline void set_lpi_config(int n, u8 value)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	*entry = value;
> +}
> +
> +inline u8 get_lpi_config(int n)
> +{
> +	u8 *entry = (u8 *)(gicv3_data.lpi_prop + (n - 8192));
> +	return *entry;
> +}

Probably don't need the 'inline', but ok.

> +
> +/* alloc_lpi_tables: Allocate LPI config and pending tables */
> +void alloc_lpi_tables(void);
> +void alloc_lpi_tables(void)

Why not add this to the header (renamed to lpi_alloc_tables)? Or should
this function be static?

> +{
> +	unsigned long n = SZ_64K >> PAGE_SHIFT;
> +	unsigned long order = fls(n);
> +	u64 prop_val;
> +	int cpu;
> +
> +	gicv3_data.lpi_prop = (void *)virt_to_phys(alloc_pages(order));
> +
> +	/* ID bits = 13, ie. up to 14b LPI INTID */
> +	prop_val = (u64)gicv3_data.lpi_prop | 13;
> +
> +	/*
> +	 * Allocate pending tables for each redistributor
> +	 * and set PROPBASER and PENDBASER
> +	 */
> +	for_each_present_cpu(cpu) {
> +		u64 pend_val;
> +		void *ptr;
> +
> +		ptr = gicv3_data.redist_base[cpu];
> +
> +		writeq(prop_val, ptr + GICR_PROPBASER);
> +
> +		gicv3_data.lpi_pend[cpu] =
> +			(void *)virt_to_phys(alloc_pages(order));

nit: I think these line brakes on = or worse than going over 80 chars.
And, you don't need to worry about 80 chars anyway. See the README, we
allow 120.

> +
> +		pend_val = (u64)gicv3_data.lpi_pend[cpu];
> +
> +		writeq(pend_val, ptr + GICR_PENDBASER);
> +	}
> +}
> +
> +void set_pending_table_bit(int rdist, int n, bool set)
> +{
> +	u8 *ptr = phys_to_virt((phys_addr_t)gicv3_data.lpi_pend[rdist]);
> +	u8 mask = 1 << (n % 8), byte;
> +
> +	ptr += (n / 8);
> +	byte = *ptr;
> +	if (set)
> +		byte |=  mask;
> +	else
> +		byte &= ~mask;
> +	*ptr = byte;
> +}
> -- 
> 2.20.1
> 

Thanks,
drew

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  reply	other threads:[~2020-01-13 17:31 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10 14:53 [kvm-unit-tests PATCH v2 00/16] arm/arm64: Add ITS tests Eric Auger
2020-01-10 14:53 ` Eric Auger
2020-01-10 14:53 ` Eric Auger
2020-01-10 14:53 ` [kvm-unit-tests PATCH v2 01/16] libcflat: Add other size defines Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-10 14:53 ` [kvm-unit-tests PATCH v2 02/16] arm: gic: Provide per-IRQ helper functions Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-10 14:53 ` [kvm-unit-tests PATCH v2 03/16] arm/arm64: gic: Introduce setup_irq() helper Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-10 14:53   ` Eric Auger
2020-01-13 16:53   ` Andrew Jones
2020-01-13 16:53     ` Andrew Jones
2020-01-13 16:53     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 04/16] arm/arm64: gicv3: Add some re-distributor defines Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 05/16] arm/arm64: ITS: Introspection tests Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:11   ` Andrew Jones
2020-01-13 17:11     ` Andrew Jones
2020-01-13 17:11     ` Andrew Jones
2020-01-13 17:33   ` Andrew Jones
2020-01-13 17:33     ` Andrew Jones
2020-01-13 17:33     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 06/16] arm/arm64: ITS: Test BASER Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:21   ` Andrew Jones
2020-01-13 17:21     ` Andrew Jones
2020-01-13 17:21     ` Andrew Jones
2020-01-15 17:16     ` Auger Eric
2020-01-15 17:16       ` Auger Eric
2020-01-15 17:16       ` Auger Eric
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 07/16] arm/arm64: ITS: Set the LPI config and pending tables Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:31   ` Andrew Jones [this message]
2020-01-13 17:31     ` Andrew Jones
2020-01-13 17:31     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 08/16] arm/arm64: ITS: Init the command queue Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:37   ` Andrew Jones
2020-01-13 17:37     ` Andrew Jones
2020-01-13 17:37     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 09/16] arm/arm64: ITS: Enable/Disable LPIs at re-distributor level Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:44   ` Andrew Jones
2020-01-13 17:44     ` Andrew Jones
2020-01-13 17:44     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 10/16] arm/arm64: ITS: its_enable_defaults Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 11/16] arm/arm64: ITS: Device and collection Initialization Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 17:48   ` Andrew Jones
2020-01-13 17:48     ` Andrew Jones
2020-01-13 17:48     ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 12/16] arm/arm64: ITS: commands Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 18:00   ` Andrew Jones
2020-01-13 18:00     ` Andrew Jones
2020-01-13 18:00     ` Andrew Jones
2020-01-15 17:13     ` Auger Eric
2020-01-15 17:13       ` Auger Eric
2020-01-15 17:13       ` Auger Eric
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 13/16] arm/arm64: ITS: INT functional tests Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 18:17   ` Andrew Jones
2020-01-13 18:17     ` Andrew Jones
2020-01-13 18:17     ` Andrew Jones
2020-01-15 17:11     ` Auger Eric
2020-01-15 17:11       ` Auger Eric
2020-01-15 17:11       ` Auger Eric
2020-01-16  8:06       ` Andrew Jones
2020-01-16  8:06         ` Andrew Jones
2020-01-16  8:06         ` Andrew Jones
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 14/16] arm/run: Allow Migration tests Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 18:40   ` Andrew Jones
2020-01-13 18:40     ` Andrew Jones
2020-01-13 18:40     ` Andrew Jones
2020-01-15 17:04     ` Auger Eric
2020-01-15 17:04       ` Auger Eric
2020-01-15 17:04       ` Auger Eric
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 15/16] arm/arm64: ITS: migration tests Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54 ` [kvm-unit-tests PATCH v2 16/16] arm/arm64: ITS: pending table migration test Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-10 14:54   ` Eric Auger
2020-01-13 18:45   ` Andrew Jones
2020-01-13 18:45     ` Andrew Jones
2020-01-13 18:45     ` Andrew Jones
2020-01-15 17:06     ` Auger Eric
2020-01-15 17:06       ` Auger Eric
2020-01-15 17:06       ` Auger Eric

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