[Xen-devel] [PATCH] tools/libxc: Construct 32bit PV guests with L3 A/D bits set

[Xen-devel] [PATCH] tools/libxc: Construct 32bit PV guests with L3 A/D bits set

[Andrew Cooper]

With the 32 PAE build of Xen gone, 32bit PV guests' top level pagetables no
longer behave exactly like PAE in hardware.

They should have A/D bits set, for the same performance reasons as apply to
other levels.  This brings the domain builder in line with how Xen constructs
a 32bit dom0.

As a purely code improvement, make use of range notation to initialise
identical values in adjacent array elements.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wl@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Ian Jackson <Ian.Jackson@citrix.com>

It turns out that neither Xen nor libxc sets dirty bits on L1 pagetables, but
I can't spot any documented reason for this.  My best guess is to avoid having
D/RO mappings of pagetables, but this isn't going to trip up a PV guest to
begin with.  Thoughts on reducing the performance cost there as well?
---
 tools/libxc/xc_dom_x86.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/tools/libxc/xc_dom_x86.c b/tools/libxc/xc_dom_x86.c
index 1897decedb..425b129146 100644
--- a/tools/libxc/xc_dom_x86.c
+++ b/tools/libxc/xc_dom_x86.c
@@ -277,8 +277,8 @@ static int alloc_pgtables_x86_32_pae(struct xc_dom_image *dom)
         .levels = PGTBL_LEVELS_I386,
         .vaddr_mask = bits_to_mask(VIRT_BITS_I386),
         .lvl_prot[0] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED,
-        .lvl_prot[1] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
-        .lvl_prot[2] = _PAGE_PRESENT,
+        .lvl_prot[1 ... 2] =
+            _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
     };
     struct xc_dom_image_x86 *domx86 = dom->arch_private;
 
@@ -488,9 +488,8 @@ static int alloc_pgtables_x86_64(struct xc_dom_image *dom)
         .levels = PGTBL_LEVELS_X86_64,
         .vaddr_mask = bits_to_mask(VIRT_BITS_X86_64),
         .lvl_prot[0] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED,
-        .lvl_prot[1] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
-        .lvl_prot[2] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
-        .lvl_prot[3] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
+        .lvl_prot[1 ... 3] =
+            _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
     };
     struct xc_dom_image_x86 *domx86 = dom->arch_private;
 
-- 
2.11.0


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Re: [Xen-devel] [PATCH] tools/libxc: Construct 32bit PV guests with L3 A/D bits set

[Jan Beulich]

On 14.01.2020 13:39, Andrew Cooper wrote:
> With the 32 PAE build of Xen gone, 32bit PV guests' top level pagetables no
> longer behave exactly like PAE in hardware.
> 
> They should have A/D bits set, for the same performance reasons as apply to
> other levels.  This brings the domain builder in line with how Xen constructs
> a 32bit dom0.
> 
> As a purely code improvement, make use of range notation to initialise
> identical values in adjacent array elements.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Reviewed-by: Jan Beulich <jbeulich@suse.com>

> It turns out that neither Xen nor libxc sets dirty bits on L1 pagetables, but
> I can't spot any documented reason for this.  My best guess is to avoid having
> D/RO mappings of pagetables, but this isn't going to trip up a PV guest to
> begin with.  Thoughts on reducing the performance cost there as well?

I'd ack such a patch.

> --- a/tools/libxc/xc_dom_x86.c
> +++ b/tools/libxc/xc_dom_x86.c
> @@ -277,8 +277,8 @@ static int alloc_pgtables_x86_32_pae(struct xc_dom_image *dom)
>          .levels = PGTBL_LEVELS_I386,
>          .vaddr_mask = bits_to_mask(VIRT_BITS_I386),
>          .lvl_prot[0] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED,
> -        .lvl_prot[1] = _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,
> -        .lvl_prot[2] = _PAGE_PRESENT,
> +        .lvl_prot[1 ... 2] =
> +            _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER,

Perhaps worthwhile leaving a comment as to the difference to what
readers might expect for PAE L3 entries?

Jan

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Re: [Xen-devel] [PATCH] tools/libxc: Construct 32bit PV guests with L3 A/D bits set

[Wei Liu]

On Tue, Jan 14, 2020 at 12:39:21PM +0000, Andrew Cooper wrote:
> With the 32 PAE build of Xen gone, 32bit PV guests' top level pagetables no
> longer behave exactly like PAE in hardware.
> 
> They should have A/D bits set, for the same performance reasons as apply to
> other levels.  This brings the domain builder in line with how Xen constructs
> a 32bit dom0.
> 
> As a purely code improvement, make use of range notation to initialise
> identical values in adjacent array elements.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

Acked-by: Wei Liu <wl@xen.org>

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