[Intel-gfx] [PATCH] drm/i915/gt: Undo partial gt-pm enabling on error paths

[Chris Wilson <chris@chris-wilson.co.uk>]

Undo the rps/llc enabling operations if we fail to bring up the engine
subsequently. For bonus paranoia, scrub the GT state along the error
path.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index d1c2f034296a..b8585bc8ac91 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -179,10 +179,6 @@ int intel_gt_resume(struct intel_gt *gt)
 	enum intel_engine_id id;
 	int err;
 
-	err = intel_gt_has_init_error(gt);
-	if (err)
-		return err;
-
 	GT_TRACE(gt, "\n");
 
 	/*
@@ -192,13 +188,13 @@ int intel_gt_resume(struct intel_gt *gt)
 	 * allowing us to fixup the user contexts on their first pin.
 	 */
 	intel_gt_pm_get(gt);
-
 	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
+
 	intel_rc6_sanitize(&gt->rc6);
 	gt_sanitize(gt, true);
 	if (intel_gt_is_wedged(gt)) {
 		err = -EIO;
-		goto out_fw;
+		goto err_sanitize;
 	}
 
 	/* Only when the HW is re-initialised, can we replay the requests */
@@ -223,23 +219,26 @@ int intel_gt_resume(struct intel_gt *gt)
 			dev_err(gt->i915->drm.dev,
 				"Failed to restart %s (%d)\n",
 				engine->name, err);
-			goto err_wedged;
+			goto err_disable;
 		}
 	}
 
 	intel_rc6_enable(&gt->rc6);
-
 	intel_uc_resume(&gt->uc);
 
-	user_forcewake(gt, false);
-
 out_fw:
+	user_forcewake(gt, false);
 	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
 	intel_gt_pm_put(gt);
 	return err;
 
+err_disable:
+	intel_rps_disable(&gt->rps);
+	intel_llc_disable(&gt->llc);
 err_wedged:
 	intel_gt_set_wedged(gt);
+err_sanitize:
+	gt_sanitize(gt, false);
 	goto out_fw;
 }
 
-- 
2.25.0.rc2

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